writing_musb_glue_layer.tmpl 32 KB

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  1. <?xml version="1.0" encoding="UTF-8"?>
  2. <!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
  3. "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
  4. <book id="Writing-MUSB-Glue-Layer">
  5. <bookinfo>
  6. <title>Writing an MUSB Glue Layer</title>
  7. <authorgroup>
  8. <author>
  9. <firstname>Apelete</firstname>
  10. <surname>Seketeli</surname>
  11. <affiliation>
  12. <address>
  13. <email>apelete at seketeli.net</email>
  14. </address>
  15. </affiliation>
  16. </author>
  17. </authorgroup>
  18. <copyright>
  19. <year>2014</year>
  20. <holder>Apelete Seketeli</holder>
  21. </copyright>
  22. <legalnotice>
  23. <para>
  24. This documentation is free software; you can redistribute it
  25. and/or modify it under the terms of the GNU General Public
  26. License as published by the Free Software Foundation; either
  27. version 2 of the License, or (at your option) any later version.
  28. </para>
  29. <para>
  30. This documentation is distributed in the hope that it will be
  31. useful, but WITHOUT ANY WARRANTY; without even the implied
  32. warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  33. See the GNU General Public License for more details.
  34. </para>
  35. <para>
  36. You should have received a copy of the GNU General Public License
  37. along with this documentation; if not, write to the Free Software
  38. Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  39. 02111-1307 USA
  40. </para>
  41. <para>
  42. For more details see the file COPYING in the Linux kernel source
  43. tree.
  44. </para>
  45. </legalnotice>
  46. </bookinfo>
  47. <toc></toc>
  48. <chapter id="introduction">
  49. <title>Introduction</title>
  50. <para>
  51. The Linux MUSB subsystem is part of the larger Linux USB
  52. subsystem. It provides support for embedded USB Device Controllers
  53. (UDC) that do not use Universal Host Controller Interface (UHCI)
  54. or Open Host Controller Interface (OHCI).
  55. </para>
  56. <para>
  57. Instead, these embedded UDC rely on the USB On-the-Go (OTG)
  58. specification which they implement at least partially. The silicon
  59. reference design used in most cases is the Multipoint USB
  60. Highspeed Dual-Role Controller (MUSB HDRC) found in the Mentor
  61. Graphics Inventra™ design.
  62. </para>
  63. <para>
  64. As a self-taught exercise I have written an MUSB glue layer for
  65. the Ingenic JZ4740 SoC, modelled after the many MUSB glue layers
  66. in the kernel source tree. This layer can be found at
  67. drivers/usb/musb/jz4740.c. In this documentation I will walk
  68. through the basics of the jz4740.c glue layer, explaining the
  69. different pieces and what needs to be done in order to write your
  70. own device glue layer.
  71. </para>
  72. </chapter>
  73. <chapter id="linux-musb-basics">
  74. <title>Linux MUSB Basics</title>
  75. <para>
  76. To get started on the topic, please read USB On-the-Go Basics (see
  77. Resources) which provides an introduction of USB OTG operation at
  78. the hardware level. A couple of wiki pages by Texas Instruments
  79. and Analog Devices also provide an overview of the Linux kernel
  80. MUSB configuration, albeit focused on some specific devices
  81. provided by these companies. Finally, getting acquainted with the
  82. USB specification at USB home page may come in handy, with
  83. practical instance provided through the Writing USB Device Drivers
  84. documentation (again, see Resources).
  85. </para>
  86. <para>
  87. Linux USB stack is a layered architecture in which the MUSB
  88. controller hardware sits at the lowest. The MUSB controller driver
  89. abstract the MUSB controller hardware to the Linux USB stack.
  90. </para>
  91. <programlisting>
  92. ------------------------
  93. | | &lt;------- drivers/usb/gadget
  94. | Linux USB Core Stack | &lt;------- drivers/usb/host
  95. | | &lt;------- drivers/usb/core
  96. ------------------------
  97. --------------------------
  98. | | &lt;------ drivers/usb/musb/musb_gadget.c
  99. | MUSB Controller driver | &lt;------ drivers/usb/musb/musb_host.c
  100. | | &lt;------ drivers/usb/musb/musb_core.c
  101. --------------------------
  102. ---------------------------------
  103. | MUSB Platform Specific Driver |
  104. | | &lt;-- drivers/usb/musb/jz4740.c
  105. | aka &quot;Glue Layer&quot; |
  106. ---------------------------------
  107. ---------------------------------
  108. | MUSB Controller Hardware |
  109. ---------------------------------
  110. </programlisting>
  111. <para>
  112. As outlined above, the glue layer is actually the platform
  113. specific code sitting in between the controller driver and the
  114. controller hardware.
  115. </para>
  116. <para>
  117. Just like a Linux USB driver needs to register itself with the
  118. Linux USB subsystem, the MUSB glue layer needs first to register
  119. itself with the MUSB controller driver. This will allow the
  120. controller driver to know about which device the glue layer
  121. supports and which functions to call when a supported device is
  122. detected or released; remember we are talking about an embedded
  123. controller chip here, so no insertion or removal at run-time.
  124. </para>
  125. <para>
  126. All of this information is passed to the MUSB controller driver
  127. through a platform_driver structure defined in the glue layer as:
  128. </para>
  129. <programlisting linenumbering="numbered">
  130. static struct platform_driver jz4740_driver = {
  131. .probe = jz4740_probe,
  132. .remove = jz4740_remove,
  133. .driver = {
  134. .name = "musb-jz4740",
  135. },
  136. };
  137. </programlisting>
  138. <para>
  139. The probe and remove function pointers are called when a matching
  140. device is detected and, respectively, released. The name string
  141. describes the device supported by this glue layer. In the current
  142. case it matches a platform_device structure declared in
  143. arch/mips/jz4740/platform.c. Note that we are not using device
  144. tree bindings here.
  145. </para>
  146. <para>
  147. In order to register itself to the controller driver, the glue
  148. layer goes through a few steps, basically allocating the
  149. controller hardware resources and initialising a couple of
  150. circuits. To do so, it needs to keep track of the information used
  151. throughout these steps. This is done by defining a private
  152. jz4740_glue structure:
  153. </para>
  154. <programlisting linenumbering="numbered">
  155. struct jz4740_glue {
  156. struct device *dev;
  157. struct platform_device *musb;
  158. struct clk *clk;
  159. };
  160. </programlisting>
  161. <para>
  162. The dev and musb members are both device structure variables. The
  163. first one holds generic information about the device, since it's
  164. the basic device structure, and the latter holds information more
  165. closely related to the subsystem the device is registered to. The
  166. clk variable keeps information related to the device clock
  167. operation.
  168. </para>
  169. <para>
  170. Let's go through the steps of the probe function that leads the
  171. glue layer to register itself to the controller driver.
  172. </para>
  173. <para>
  174. N.B.: For the sake of readability each function will be split in
  175. logical parts, each part being shown as if it was independent from
  176. the others.
  177. </para>
  178. <programlisting linenumbering="numbered">
  179. static int jz4740_probe(struct platform_device *pdev)
  180. {
  181. struct platform_device *musb;
  182. struct jz4740_glue *glue;
  183. struct clk *clk;
  184. int ret;
  185. glue = devm_kzalloc(&amp;pdev->dev, sizeof(*glue), GFP_KERNEL);
  186. if (!glue)
  187. return -ENOMEM;
  188. musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
  189. if (!musb) {
  190. dev_err(&amp;pdev->dev, "failed to allocate musb device\n");
  191. return -ENOMEM;
  192. }
  193. clk = devm_clk_get(&amp;pdev->dev, "udc");
  194. if (IS_ERR(clk)) {
  195. dev_err(&amp;pdev->dev, "failed to get clock\n");
  196. ret = PTR_ERR(clk);
  197. goto err_platform_device_put;
  198. }
  199. ret = clk_prepare_enable(clk);
  200. if (ret) {
  201. dev_err(&amp;pdev->dev, "failed to enable clock\n");
  202. goto err_platform_device_put;
  203. }
  204. musb->dev.parent = &amp;pdev->dev;
  205. glue->dev = &amp;pdev->dev;
  206. glue->musb = musb;
  207. glue->clk = clk;
  208. return 0;
  209. err_platform_device_put:
  210. platform_device_put(musb);
  211. return ret;
  212. }
  213. </programlisting>
  214. <para>
  215. The first few lines of the probe function allocate and assign the
  216. glue, musb and clk variables. The GFP_KERNEL flag (line 8) allows
  217. the allocation process to sleep and wait for memory, thus being
  218. usable in a blocking situation. The PLATFORM_DEVID_AUTO flag (line
  219. 12) allows automatic allocation and management of device IDs in
  220. order to avoid device namespace collisions with explicit IDs. With
  221. devm_clk_get() (line 18) the glue layer allocates the clock -- the
  222. <literal>devm_</literal> prefix indicates that clk_get() is
  223. managed: it automatically frees the allocated clock resource data
  224. when the device is released -- and enable it.
  225. </para>
  226. <para>
  227. Then comes the registration steps:
  228. </para>
  229. <programlisting linenumbering="numbered">
  230. static int jz4740_probe(struct platform_device *pdev)
  231. {
  232. struct musb_hdrc_platform_data *pdata = &amp;jz4740_musb_platform_data;
  233. pdata->platform_ops = &amp;jz4740_musb_ops;
  234. platform_set_drvdata(pdev, glue);
  235. ret = platform_device_add_resources(musb, pdev->resource,
  236. pdev->num_resources);
  237. if (ret) {
  238. dev_err(&amp;pdev->dev, "failed to add resources\n");
  239. goto err_clk_disable;
  240. }
  241. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  242. if (ret) {
  243. dev_err(&amp;pdev->dev, "failed to add platform_data\n");
  244. goto err_clk_disable;
  245. }
  246. return 0;
  247. err_clk_disable:
  248. clk_disable_unprepare(clk);
  249. err_platform_device_put:
  250. platform_device_put(musb);
  251. return ret;
  252. }
  253. </programlisting>
  254. <para>
  255. The first step is to pass the device data privately held by the
  256. glue layer on to the controller driver through
  257. platform_set_drvdata() (line 7). Next is passing on the device
  258. resources information, also privately held at that point, through
  259. platform_device_add_resources() (line 9).
  260. </para>
  261. <para>
  262. Finally comes passing on the platform specific data to the
  263. controller driver (line 16). Platform data will be discussed in
  264. <link linkend="device-platform-data">Chapter 4</link>, but here
  265. we are looking at the platform_ops function pointer (line 5) in
  266. musb_hdrc_platform_data structure (line 3). This function
  267. pointer allows the MUSB controller driver to know which function
  268. to call for device operation:
  269. </para>
  270. <programlisting linenumbering="numbered">
  271. static const struct musb_platform_ops jz4740_musb_ops = {
  272. .init = jz4740_musb_init,
  273. .exit = jz4740_musb_exit,
  274. };
  275. </programlisting>
  276. <para>
  277. Here we have the minimal case where only init and exit functions
  278. are called by the controller driver when needed. Fact is the
  279. JZ4740 MUSB controller is a basic controller, lacking some
  280. features found in other controllers, otherwise we may also have
  281. pointers to a few other functions like a power management function
  282. or a function to switch between OTG and non-OTG modes, for
  283. instance.
  284. </para>
  285. <para>
  286. At that point of the registration process, the controller driver
  287. actually calls the init function:
  288. </para>
  289. <programlisting linenumbering="numbered">
  290. static int jz4740_musb_init(struct musb *musb)
  291. {
  292. musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
  293. if (!musb->xceiv) {
  294. pr_err("HS UDC: no transceiver configured\n");
  295. return -ENODEV;
  296. }
  297. /* Silicon does not implement ConfigData register.
  298. * Set dyn_fifo to avoid reading EP config from hardware.
  299. */
  300. musb->dyn_fifo = true;
  301. musb->isr = jz4740_musb_interrupt;
  302. return 0;
  303. }
  304. </programlisting>
  305. <para>
  306. The goal of jz4740_musb_init() is to get hold of the transceiver
  307. driver data of the MUSB controller hardware and pass it on to the
  308. MUSB controller driver, as usual. The transceiver is the circuitry
  309. inside the controller hardware responsible for sending/receiving
  310. the USB data. Since it is an implementation of the physical layer
  311. of the OSI model, the transceiver is also referred to as PHY.
  312. </para>
  313. <para>
  314. Getting hold of the MUSB PHY driver data is done with
  315. usb_get_phy() which returns a pointer to the structure
  316. containing the driver instance data. The next couple of
  317. instructions (line 12 and 14) are used as a quirk and to setup
  318. IRQ handling respectively. Quirks and IRQ handling will be
  319. discussed later in <link linkend="device-quirks">Chapter
  320. 5</link> and <link linkend="handling-irqs">Chapter 3</link>.
  321. </para>
  322. <programlisting linenumbering="numbered">
  323. static int jz4740_musb_exit(struct musb *musb)
  324. {
  325. usb_put_phy(musb->xceiv);
  326. return 0;
  327. }
  328. </programlisting>
  329. <para>
  330. Acting as the counterpart of init, the exit function releases the
  331. MUSB PHY driver when the controller hardware itself is about to be
  332. released.
  333. </para>
  334. <para>
  335. Again, note that init and exit are fairly simple in this case due
  336. to the basic set of features of the JZ4740 controller hardware.
  337. When writing an musb glue layer for a more complex controller
  338. hardware, you might need to take care of more processing in those
  339. two functions.
  340. </para>
  341. <para>
  342. Returning from the init function, the MUSB controller driver jumps
  343. back into the probe function:
  344. </para>
  345. <programlisting linenumbering="numbered">
  346. static int jz4740_probe(struct platform_device *pdev)
  347. {
  348. ret = platform_device_add(musb);
  349. if (ret) {
  350. dev_err(&amp;pdev->dev, "failed to register musb device\n");
  351. goto err_clk_disable;
  352. }
  353. return 0;
  354. err_clk_disable:
  355. clk_disable_unprepare(clk);
  356. err_platform_device_put:
  357. platform_device_put(musb);
  358. return ret;
  359. }
  360. </programlisting>
  361. <para>
  362. This is the last part of the device registration process where the
  363. glue layer adds the controller hardware device to Linux kernel
  364. device hierarchy: at this stage, all known information about the
  365. device is passed on to the Linux USB core stack.
  366. </para>
  367. <programlisting linenumbering="numbered">
  368. static int jz4740_remove(struct platform_device *pdev)
  369. {
  370. struct jz4740_glue *glue = platform_get_drvdata(pdev);
  371. platform_device_unregister(glue->musb);
  372. clk_disable_unprepare(glue->clk);
  373. return 0;
  374. }
  375. </programlisting>
  376. <para>
  377. Acting as the counterpart of probe, the remove function unregister
  378. the MUSB controller hardware (line 5) and disable the clock (line
  379. 6), allowing it to be gated.
  380. </para>
  381. </chapter>
  382. <chapter id="handling-irqs">
  383. <title>Handling IRQs</title>
  384. <para>
  385. Additionally to the MUSB controller hardware basic setup and
  386. registration, the glue layer is also responsible for handling the
  387. IRQs:
  388. </para>
  389. <programlisting linenumbering="numbered">
  390. static irqreturn_t jz4740_musb_interrupt(int irq, void *__hci)
  391. {
  392. unsigned long flags;
  393. irqreturn_t retval = IRQ_NONE;
  394. struct musb *musb = __hci;
  395. spin_lock_irqsave(&amp;musb->lock, flags);
  396. musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
  397. musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
  398. musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
  399. /*
  400. * The controller is gadget only, the state of the host mode IRQ bits is
  401. * undefined. Mask them to make sure that the musb driver core will
  402. * never see them set
  403. */
  404. musb->int_usb &amp;= MUSB_INTR_SUSPEND | MUSB_INTR_RESUME |
  405. MUSB_INTR_RESET | MUSB_INTR_SOF;
  406. if (musb->int_usb || musb->int_tx || musb->int_rx)
  407. retval = musb_interrupt(musb);
  408. spin_unlock_irqrestore(&amp;musb->lock, flags);
  409. return retval;
  410. }
  411. </programlisting>
  412. <para>
  413. Here the glue layer mostly has to read the relevant hardware
  414. registers and pass their values on to the controller driver which
  415. will handle the actual event that triggered the IRQ.
  416. </para>
  417. <para>
  418. The interrupt handler critical section is protected by the
  419. spin_lock_irqsave() and counterpart spin_unlock_irqrestore()
  420. functions (line 7 and 24 respectively), which prevent the
  421. interrupt handler code to be run by two different threads at the
  422. same time.
  423. </para>
  424. <para>
  425. Then the relevant interrupt registers are read (line 9 to 11):
  426. </para>
  427. <itemizedlist>
  428. <listitem>
  429. <para>
  430. MUSB_INTRUSB: indicates which USB interrupts are currently
  431. active,
  432. </para>
  433. </listitem>
  434. <listitem>
  435. <para>
  436. MUSB_INTRTX: indicates which of the interrupts for TX
  437. endpoints are currently active,
  438. </para>
  439. </listitem>
  440. <listitem>
  441. <para>
  442. MUSB_INTRRX: indicates which of the interrupts for TX
  443. endpoints are currently active.
  444. </para>
  445. </listitem>
  446. </itemizedlist>
  447. <para>
  448. Note that musb_readb() is used to read 8-bit registers at most,
  449. while musb_readw() allows us to read at most 16-bit registers.
  450. There are other functions that can be used depending on the size
  451. of your device registers. See musb_io.h for more information.
  452. </para>
  453. <para>
  454. Instruction on line 18 is another quirk specific to the JZ4740
  455. USB device controller, which will be discussed later in <link
  456. linkend="device-quirks">Chapter 5</link>.
  457. </para>
  458. <para>
  459. The glue layer still needs to register the IRQ handler though.
  460. Remember the instruction on line 14 of the init function:
  461. </para>
  462. <programlisting linenumbering="numbered">
  463. static int jz4740_musb_init(struct musb *musb)
  464. {
  465. musb->isr = jz4740_musb_interrupt;
  466. return 0;
  467. }
  468. </programlisting>
  469. <para>
  470. This instruction sets a pointer to the glue layer IRQ handler
  471. function, in order for the controller hardware to call the handler
  472. back when an IRQ comes from the controller hardware. The interrupt
  473. handler is now implemented and registered.
  474. </para>
  475. </chapter>
  476. <chapter id="device-platform-data">
  477. <title>Device Platform Data</title>
  478. <para>
  479. In order to write an MUSB glue layer, you need to have some data
  480. describing the hardware capabilities of your controller hardware,
  481. which is called the platform data.
  482. </para>
  483. <para>
  484. Platform data is specific to your hardware, though it may cover a
  485. broad range of devices, and is generally found somewhere in the
  486. arch/ directory, depending on your device architecture.
  487. </para>
  488. <para>
  489. For instance, platform data for the JZ4740 SoC is found in
  490. arch/mips/jz4740/platform.c. In the platform.c file each device of
  491. the JZ4740 SoC is described through a set of structures.
  492. </para>
  493. <para>
  494. Here is the part of arch/mips/jz4740/platform.c that covers the
  495. USB Device Controller (UDC):
  496. </para>
  497. <programlisting linenumbering="numbered">
  498. /* USB Device Controller */
  499. struct platform_device jz4740_udc_xceiv_device = {
  500. .name = "usb_phy_gen_xceiv",
  501. .id = 0,
  502. };
  503. static struct resource jz4740_udc_resources[] = {
  504. [0] = {
  505. .start = JZ4740_UDC_BASE_ADDR,
  506. .end = JZ4740_UDC_BASE_ADDR + 0x10000 - 1,
  507. .flags = IORESOURCE_MEM,
  508. },
  509. [1] = {
  510. .start = JZ4740_IRQ_UDC,
  511. .end = JZ4740_IRQ_UDC,
  512. .flags = IORESOURCE_IRQ,
  513. .name = "mc",
  514. },
  515. };
  516. struct platform_device jz4740_udc_device = {
  517. .name = "musb-jz4740",
  518. .id = -1,
  519. .dev = {
  520. .dma_mask = &amp;jz4740_udc_device.dev.coherent_dma_mask,
  521. .coherent_dma_mask = DMA_BIT_MASK(32),
  522. },
  523. .num_resources = ARRAY_SIZE(jz4740_udc_resources),
  524. .resource = jz4740_udc_resources,
  525. };
  526. </programlisting>
  527. <para>
  528. The jz4740_udc_xceiv_device platform device structure (line 2)
  529. describes the UDC transceiver with a name and id number.
  530. </para>
  531. <para>
  532. At the time of this writing, note that
  533. &quot;usb_phy_gen_xceiv&quot; is the specific name to be used for
  534. all transceivers that are either built-in with reference USB IP or
  535. autonomous and doesn't require any PHY programming. You will need
  536. to set CONFIG_NOP_USB_XCEIV=y in the kernel configuration to make
  537. use of the corresponding transceiver driver. The id field could be
  538. set to -1 (equivalent to PLATFORM_DEVID_NONE), -2 (equivalent to
  539. PLATFORM_DEVID_AUTO) or start with 0 for the first device of this
  540. kind if we want a specific id number.
  541. </para>
  542. <para>
  543. The jz4740_udc_resources resource structure (line 7) defines the
  544. UDC registers base addresses.
  545. </para>
  546. <para>
  547. The first array (line 9 to 11) defines the UDC registers base
  548. memory addresses: start points to the first register memory
  549. address, end points to the last register memory address and the
  550. flags member defines the type of resource we are dealing with. So
  551. IORESOURCE_MEM is used to define the registers memory addresses.
  552. The second array (line 14 to 17) defines the UDC IRQ registers
  553. addresses. Since there is only one IRQ register available for the
  554. JZ4740 UDC, start and end point at the same address. The
  555. IORESOURCE_IRQ flag tells that we are dealing with IRQ resources,
  556. and the name &quot;mc&quot; is in fact hard-coded in the MUSB core
  557. in order for the controller driver to retrieve this IRQ resource
  558. by querying it by its name.
  559. </para>
  560. <para>
  561. Finally, the jz4740_udc_device platform device structure (line 21)
  562. describes the UDC itself.
  563. </para>
  564. <para>
  565. The &quot;musb-jz4740&quot; name (line 22) defines the MUSB
  566. driver that is used for this device; remember this is in fact
  567. the name that we used in the jz4740_driver platform driver
  568. structure in <link linkend="linux-musb-basics">Chapter
  569. 2</link>. The id field (line 23) is set to -1 (equivalent to
  570. PLATFORM_DEVID_NONE) since we do not need an id for the device:
  571. the MUSB controller driver was already set to allocate an
  572. automatic id in <link linkend="linux-musb-basics">Chapter
  573. 2</link>. In the dev field we care for DMA related information
  574. here. The dma_mask field (line 25) defines the width of the DMA
  575. mask that is going to be used, and coherent_dma_mask (line 26)
  576. has the same purpose but for the alloc_coherent DMA mappings: in
  577. both cases we are using a 32 bits mask. Then the resource field
  578. (line 29) is simply a pointer to the resource structure defined
  579. before, while the num_resources field (line 28) keeps track of
  580. the number of arrays defined in the resource structure (in this
  581. case there were two resource arrays defined before).
  582. </para>
  583. <para>
  584. With this quick overview of the UDC platform data at the arch/
  585. level now done, let's get back to the MUSB glue layer specific
  586. platform data in drivers/usb/musb/jz4740.c:
  587. </para>
  588. <programlisting linenumbering="numbered">
  589. static struct musb_hdrc_config jz4740_musb_config = {
  590. /* Silicon does not implement USB OTG. */
  591. .multipoint = 0,
  592. /* Max EPs scanned, driver will decide which EP can be used. */
  593. .num_eps = 4,
  594. /* RAMbits needed to configure EPs from table */
  595. .ram_bits = 9,
  596. .fifo_cfg = jz4740_musb_fifo_cfg,
  597. .fifo_cfg_size = ARRAY_SIZE(jz4740_musb_fifo_cfg),
  598. };
  599. static struct musb_hdrc_platform_data jz4740_musb_platform_data = {
  600. .mode = MUSB_PERIPHERAL,
  601. .config = &amp;jz4740_musb_config,
  602. };
  603. </programlisting>
  604. <para>
  605. First the glue layer configures some aspects of the controller
  606. driver operation related to the controller hardware specifics.
  607. This is done through the jz4740_musb_config musb_hdrc_config
  608. structure.
  609. </para>
  610. <para>
  611. Defining the OTG capability of the controller hardware, the
  612. multipoint member (line 3) is set to 0 (equivalent to false)
  613. since the JZ4740 UDC is not OTG compatible. Then num_eps (line
  614. 5) defines the number of USB endpoints of the controller
  615. hardware, including endpoint 0: here we have 3 endpoints +
  616. endpoint 0. Next is ram_bits (line 7) which is the width of the
  617. RAM address bus for the MUSB controller hardware. This
  618. information is needed when the controller driver cannot
  619. automatically configure endpoints by reading the relevant
  620. controller hardware registers. This issue will be discussed when
  621. we get to device quirks in <link linkend="device-quirks">Chapter
  622. 5</link>. Last two fields (line 8 and 9) are also about device
  623. quirks: fifo_cfg points to the USB endpoints configuration table
  624. and fifo_cfg_size keeps track of the size of the number of
  625. entries in that configuration table. More on that later in <link
  626. linkend="device-quirks">Chapter 5</link>.
  627. </para>
  628. <para>
  629. Then this configuration is embedded inside
  630. jz4740_musb_platform_data musb_hdrc_platform_data structure (line
  631. 11): config is a pointer to the configuration structure itself,
  632. and mode tells the controller driver if the controller hardware
  633. may be used as MUSB_HOST only, MUSB_PERIPHERAL only or MUSB_OTG
  634. which is a dual mode.
  635. </para>
  636. <para>
  637. Remember that jz4740_musb_platform_data is then used to convey
  638. platform data information as we have seen in the probe function
  639. in <link linkend="linux-musb-basics">Chapter 2</link>
  640. </para>
  641. </chapter>
  642. <chapter id="device-quirks">
  643. <title>Device Quirks</title>
  644. <para>
  645. Completing the platform data specific to your device, you may also
  646. need to write some code in the glue layer to work around some
  647. device specific limitations. These quirks may be due to some
  648. hardware bugs, or simply be the result of an incomplete
  649. implementation of the USB On-the-Go specification.
  650. </para>
  651. <para>
  652. The JZ4740 UDC exhibits such quirks, some of which we will discuss
  653. here for the sake of insight even though these might not be found
  654. in the controller hardware you are working on.
  655. </para>
  656. <para>
  657. Let's get back to the init function first:
  658. </para>
  659. <programlisting linenumbering="numbered">
  660. static int jz4740_musb_init(struct musb *musb)
  661. {
  662. musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
  663. if (!musb->xceiv) {
  664. pr_err("HS UDC: no transceiver configured\n");
  665. return -ENODEV;
  666. }
  667. /* Silicon does not implement ConfigData register.
  668. * Set dyn_fifo to avoid reading EP config from hardware.
  669. */
  670. musb->dyn_fifo = true;
  671. musb->isr = jz4740_musb_interrupt;
  672. return 0;
  673. }
  674. </programlisting>
  675. <para>
  676. Instruction on line 12 helps the MUSB controller driver to work
  677. around the fact that the controller hardware is missing registers
  678. that are used for USB endpoints configuration.
  679. </para>
  680. <para>
  681. Without these registers, the controller driver is unable to read
  682. the endpoints configuration from the hardware, so we use line 12
  683. instruction to bypass reading the configuration from silicon, and
  684. rely on a hard-coded table that describes the endpoints
  685. configuration instead:
  686. </para>
  687. <programlisting linenumbering="numbered">
  688. static struct musb_fifo_cfg jz4740_musb_fifo_cfg[] = {
  689. { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
  690. { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
  691. { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 64, },
  692. };
  693. </programlisting>
  694. <para>
  695. Looking at the configuration table above, we see that each
  696. endpoints is described by three fields: hw_ep_num is the endpoint
  697. number, style is its direction (either FIFO_TX for the controller
  698. driver to send packets in the controller hardware, or FIFO_RX to
  699. receive packets from hardware), and maxpacket defines the maximum
  700. size of each data packet that can be transmitted over that
  701. endpoint. Reading from the table, the controller driver knows that
  702. endpoint 1 can be used to send and receive USB data packets of 512
  703. bytes at once (this is in fact a bulk in/out endpoint), and
  704. endpoint 2 can be used to send data packets of 64 bytes at once
  705. (this is in fact an interrupt endpoint).
  706. </para>
  707. <para>
  708. Note that there is no information about endpoint 0 here: that one
  709. is implemented by default in every silicon design, with a
  710. predefined configuration according to the USB specification. For
  711. more examples of endpoint configuration tables, see musb_core.c.
  712. </para>
  713. <para>
  714. Let's now get back to the interrupt handler function:
  715. </para>
  716. <programlisting linenumbering="numbered">
  717. static irqreturn_t jz4740_musb_interrupt(int irq, void *__hci)
  718. {
  719. unsigned long flags;
  720. irqreturn_t retval = IRQ_NONE;
  721. struct musb *musb = __hci;
  722. spin_lock_irqsave(&amp;musb->lock, flags);
  723. musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
  724. musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
  725. musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
  726. /*
  727. * The controller is gadget only, the state of the host mode IRQ bits is
  728. * undefined. Mask them to make sure that the musb driver core will
  729. * never see them set
  730. */
  731. musb->int_usb &amp;= MUSB_INTR_SUSPEND | MUSB_INTR_RESUME |
  732. MUSB_INTR_RESET | MUSB_INTR_SOF;
  733. if (musb->int_usb || musb->int_tx || musb->int_rx)
  734. retval = musb_interrupt(musb);
  735. spin_unlock_irqrestore(&amp;musb->lock, flags);
  736. return retval;
  737. }
  738. </programlisting>
  739. <para>
  740. Instruction on line 18 above is a way for the controller driver to
  741. work around the fact that some interrupt bits used for USB host
  742. mode operation are missing in the MUSB_INTRUSB register, thus left
  743. in an undefined hardware state, since this MUSB controller
  744. hardware is used in peripheral mode only. As a consequence, the
  745. glue layer masks these missing bits out to avoid parasite
  746. interrupts by doing a logical AND operation between the value read
  747. from MUSB_INTRUSB and the bits that are actually implemented in
  748. the register.
  749. </para>
  750. <para>
  751. These are only a couple of the quirks found in the JZ4740 USB
  752. device controller. Some others were directly addressed in the MUSB
  753. core since the fixes were generic enough to provide a better
  754. handling of the issues for others controller hardware eventually.
  755. </para>
  756. </chapter>
  757. <chapter id="conclusion">
  758. <title>Conclusion</title>
  759. <para>
  760. Writing a Linux MUSB glue layer should be a more accessible task,
  761. as this documentation tries to show the ins and outs of this
  762. exercise.
  763. </para>
  764. <para>
  765. The JZ4740 USB device controller being fairly simple, I hope its
  766. glue layer serves as a good example for the curious mind. Used
  767. with the current MUSB glue layers, this documentation should
  768. provide enough guidance to get started; should anything gets out
  769. of hand, the linux-usb mailing list archive is another helpful
  770. resource to browse through.
  771. </para>
  772. </chapter>
  773. <chapter id="acknowledgements">
  774. <title>Acknowledgements</title>
  775. <para>
  776. Many thanks to Lars-Peter Clausen and Maarten ter Huurne for
  777. answering my questions while I was writing the JZ4740 glue layer
  778. and for helping me out getting the code in good shape.
  779. </para>
  780. <para>
  781. I would also like to thank the Qi-Hardware community at large for
  782. its cheerful guidance and support.
  783. </para>
  784. </chapter>
  785. <chapter id="resources">
  786. <title>Resources</title>
  787. <para>
  788. USB Home Page:
  789. <ulink url="http://www.usb.org">http://www.usb.org</ulink>
  790. </para>
  791. <para>
  792. linux-usb Mailing List Archives:
  793. <ulink url="http://marc.info/?l=linux-usb">http://marc.info/?l=linux-usb</ulink>
  794. </para>
  795. <para>
  796. USB On-the-Go Basics:
  797. <ulink url="http://www.maximintegrated.com/app-notes/index.mvp/id/1822">http://www.maximintegrated.com/app-notes/index.mvp/id/1822</ulink>
  798. </para>
  799. <para>
  800. Writing USB Device Drivers:
  801. <ulink url="https://www.kernel.org/doc/htmldocs/writing_usb_driver/index.html">https://www.kernel.org/doc/htmldocs/writing_usb_driver/index.html</ulink>
  802. </para>
  803. <para>
  804. Texas Instruments USB Configuration Wiki Page:
  805. <ulink url="http://processors.wiki.ti.com/index.php/Usbgeneralpage">http://processors.wiki.ti.com/index.php/Usbgeneralpage</ulink>
  806. </para>
  807. <para>
  808. Analog Devices Blackfin MUSB Configuration:
  809. <ulink url="http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:drivers:musb">http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:drivers:musb</ulink>
  810. </para>
  811. </chapter>
  812. </book>