st,clkgen-divmux.txt 1.3 KB

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  1. Binding for a ST divider and multiplexer clock driver.
  2. This binding uses the common clock binding[1].
  3. Base address is located to the parent node. See clock binding[2]
  4. [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
  5. [2] Documentation/devicetree/bindings/clock/st/st,clkgen.txt
  6. Required properties:
  7. - compatible : shall be:
  8. "st,clkgena-divmux-c65-hs", "st,clkgena-divmux"
  9. "st,clkgena-divmux-c65-ls", "st,clkgena-divmux"
  10. "st,clkgena-divmux-c32-odf0", "st,clkgena-divmux"
  11. "st,clkgena-divmux-c32-odf1", "st,clkgena-divmux"
  12. "st,clkgena-divmux-c32-odf2", "st,clkgena-divmux"
  13. "st,clkgena-divmux-c32-odf3", "st,clkgena-divmux"
  14. - #clock-cells : From common clock binding; shall be set to 1.
  15. - clocks : From common clock binding
  16. - clock-output-names : From common clock binding.
  17. Example:
  18. clockgen-a@fd345000 {
  19. reg = <0xfd345000 0xb50>;
  20. clk_m_a1_div1: clk-m-a1-div1 {
  21. #clock-cells = <1>;
  22. compatible = "st,clkgena-divmux-c32-odf1",
  23. "st,clkgena-divmux";
  24. clocks = <&clk_m_a1_osc_prediv>,
  25. <&clk_m_a1_pll0 1>, /* PLL0 PHI1 */
  26. <&clk_m_a1_pll1 1>; /* PLL1 PHI1 */
  27. clock-output-names = "clk-m-rx-icn-ts",
  28. "clk-m-rx-icn-vdp-0",
  29. "", /* unused */
  30. "clk-m-prv-t1-bus",
  31. "clk-m-icn-reg-12",
  32. "clk-m-icn-reg-10",
  33. "", /* unused */
  34. "clk-m-icn-st231";
  35. };
  36. };