mmp-dma.txt 2.2 KB

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  1. * MARVELL MMP DMA controller
  2. Marvell Peripheral DMA Controller
  3. Used platforms: pxa688, pxa910, pxa3xx, etc
  4. Required properties:
  5. - compatible: Should be "marvell,pdma-1.0"
  6. - reg: Should contain DMA registers location and length.
  7. - interrupts: Either contain all of the per-channel DMA interrupts
  8. or one irq for pdma device
  9. Optional properties:
  10. - #dma-channels: Number of DMA channels supported by the controller (defaults
  11. to 32 when not specified)
  12. "marvell,pdma-1.0"
  13. Used platforms: pxa25x, pxa27x, pxa3xx, pxa93x, pxa168, pxa910, pxa688.
  14. Examples:
  15. /*
  16. * Each channel has specific irq
  17. * ICU parse out irq channel from ICU register,
  18. * while DMA controller may not able to distinguish the irq channel
  19. * Using this method, interrupt-parent is required as demuxer
  20. * For example, pxa688 icu register 0x128, bit 0~15 is PDMA channel irq,
  21. * 18~21 is ADMA irq
  22. */
  23. pdma: dma-controller@d4000000 {
  24. compatible = "marvell,pdma-1.0";
  25. reg = <0xd4000000 0x10000>;
  26. interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
  27. interrupt-parent = <&intcmux32>;
  28. #dma-channels = <16>;
  29. };
  30. /*
  31. * One irq for all channels
  32. * Dmaengine driver (DMA controller) distinguish irq channel via
  33. * parsing internal register
  34. */
  35. pdma: dma-controller@d4000000 {
  36. compatible = "marvell,pdma-1.0";
  37. reg = <0xd4000000 0x10000>;
  38. interrupts = <47>;
  39. #dma-channels = <16>;
  40. };
  41. Marvell Two Channel DMA Controller used specifically for audio
  42. Used platforms: pxa688, pxa910
  43. Required properties:
  44. - compatible: Should be "marvell,adma-1.0" or "marvell,pxa910-squ"
  45. - reg: Should contain DMA registers location and length.
  46. - interrupts: Either contain all of the per-channel DMA interrupts
  47. or one irq for dma device
  48. "marvell,adma-1.0" used on pxa688
  49. "marvell,pxa910-squ" used on pxa910
  50. Examples:
  51. /* each channel has specific irq */
  52. adma0: dma-controller@d42a0800 {
  53. compatible = "marvell,adma-1.0";
  54. reg = <0xd42a0800 0x100>;
  55. interrupts = <18 19>;
  56. interrupt-parent = <&intcmux32>;
  57. };
  58. /* One irq for all channels */
  59. squ: dma-controller@d42a0800 {
  60. compatible = "marvell,pxa910-squ";
  61. reg = <0xd42a0800 0x100>;
  62. interrupts = <46>;
  63. };