ti-omap-hsmmc.txt 3.8 KB

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  1. * TI Highspeed MMC host controller for OMAP
  2. The Highspeed MMC Host Controller on TI OMAP family
  3. provides an interface for MMC, SD, and SDIO types of memory cards.
  4. This file documents differences between the core properties described
  5. by mmc.txt and the properties used by the omap_hsmmc driver.
  6. Required properties:
  7. - compatible:
  8. Should be "ti,omap2-hsmmc", for OMAP2 controllers
  9. Should be "ti,omap3-hsmmc", for OMAP3 controllers
  10. Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0
  11. Should be "ti,omap4-hsmmc", for OMAP4 controllers
  12. Should be "ti,am33xx-hsmmc", for AM335x controllers
  13. - ti,hwmods: Must be "mmc<n>", n is controller instance starting 1
  14. Optional properties:
  15. ti,dual-volt: boolean, supports dual voltage cards
  16. <supply-name>-supply: phandle to the regulator device tree node
  17. "supply-name" examples are "vmmc", "vmmc_aux" etc
  18. ti,non-removable: non-removable slot (like eMMC)
  19. ti,needs-special-reset: Requires a special softreset sequence
  20. ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
  21. dmas: List of DMA specifiers with the controller specific format
  22. as described in the generic DMA client binding. A tx and rx
  23. specifier is required.
  24. dma-names: List of DMA request names. These strings correspond
  25. 1:1 with the DMA specifiers listed in dmas. The string naming is
  26. to be "rx" and "tx" for RX and TX DMA requests, respectively.
  27. Examples:
  28. [hwmod populated DMA resources]
  29. mmc1: mmc@0x4809c000 {
  30. compatible = "ti,omap4-hsmmc";
  31. reg = <0x4809c000 0x400>;
  32. ti,hwmods = "mmc1";
  33. ti,dual-volt;
  34. bus-width = <4>;
  35. vmmc-supply = <&vmmc>; /* phandle to regulator node */
  36. ti,non-removable;
  37. };
  38. [generic DMA request binding]
  39. mmc1: mmc@0x4809c000 {
  40. compatible = "ti,omap4-hsmmc";
  41. reg = <0x4809c000 0x400>;
  42. ti,hwmods = "mmc1";
  43. ti,dual-volt;
  44. bus-width = <4>;
  45. vmmc-supply = <&vmmc>; /* phandle to regulator node */
  46. ti,non-removable;
  47. dmas = <&edma 24
  48. &edma 25>;
  49. dma-names = "tx", "rx";
  50. };
  51. [workaround for missing swakeup on am33xx]
  52. This SOC is missing the swakeup line, it will not detect SDIO irq
  53. while in suspend.
  54. ------
  55. | PRCM |
  56. ------
  57. ^ |
  58. swakeup | | fclk
  59. | v
  60. ------ ------- -----
  61. | card | -- CIRQ --> | hsmmc | -- IRQ --> | CPU |
  62. ------ ------- -----
  63. In suspend the fclk is off and the module is disfunctional. Even register reads
  64. will fail. A small logic in the host will request fclk restore, when an
  65. external event is detected. Once the clock is restored, the host detects the
  66. event normally. Since am33xx doesn't have this line it never wakes from
  67. suspend.
  68. The workaround is to reconfigure the dat1 line as a GPIO upon suspend. To make
  69. this work, we need to set the named pinctrl states "default" and "idle".
  70. Prepare idle to remux dat1 as a gpio, and default to remux it back as sdio
  71. dat1. The MMC driver will then toggle between idle and default state during
  72. runtime.
  73. In summary:
  74. 1. select matching 'compatible' section, see example below.
  75. 2. specify pinctrl states "default" and "idle", "sleep" is optional.
  76. 3. specify the gpio irq used for detecting sdio irq in suspend
  77. If configuration is incomplete, a warning message is emitted "falling back to
  78. polling". Also check the "sdio irq mode" in /sys/kernel/debug/mmc0/regs. Mind
  79. not every application needs SDIO irq, e.g. MMC cards.
  80. mmc1: mmc@48060100 {
  81. compatible = "ti,am33xx-hsmmc";
  82. ...
  83. pinctrl-names = "default", "idle", "sleep"
  84. pinctrl-0 = <&mmc1_pins>;
  85. pinctrl-1 = <&mmc1_idle>;
  86. pinctrl-2 = <&mmc1_sleep>;
  87. ...
  88. interrupts-extended = <&intc 64 &gpio2 28 GPIO_ACTIVE_LOW>;
  89. };
  90. mmc1_idle : pinmux_cirq_pin {
  91. pinctrl-single,pins = <
  92. 0x0f8 0x3f /* GPIO2_28 */
  93. >;
  94. };