fsl-tsec-phy.txt 5.6 KB

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  1. * MDIO IO device
  2. The MDIO is a bus to which the PHY devices are connected. For each
  3. device that exists on this bus, a child node should be created. See
  4. the definition of the PHY node in booting-without-of.txt for an example
  5. of how to define a PHY.
  6. Required properties:
  7. - reg : Offset and length of the register set for the device
  8. - compatible : Should define the compatible device type for the
  9. mdio. Currently supported strings/devices are:
  10. - "fsl,gianfar-tbi"
  11. - "fsl,gianfar-mdio"
  12. - "fsl,etsec2-tbi"
  13. - "fsl,etsec2-mdio"
  14. - "fsl,ucc-mdio"
  15. - "fsl,fman-mdio"
  16. When device_type is "mdio", the following strings are also considered:
  17. - "gianfar"
  18. - "ucc_geth_phy"
  19. Example:
  20. mdio@24520 {
  21. reg = <24520 20>;
  22. compatible = "fsl,gianfar-mdio";
  23. ethernet-phy@0 {
  24. ......
  25. };
  26. };
  27. * TBI Internal MDIO bus
  28. As of this writing, every tsec is associated with an internal TBI PHY.
  29. This PHY is accessed through the local MDIO bus. These buses are defined
  30. similarly to the mdio buses, except they are compatible with "fsl,gianfar-tbi".
  31. The TBI PHYs underneath them are similar to normal PHYs, but the reg property
  32. is considered instructive, rather than descriptive. The reg property should
  33. be chosen so it doesn't interfere with other PHYs on the bus.
  34. * Gianfar-compatible ethernet nodes
  35. Properties:
  36. - device_type : Should be "network"
  37. - model : Model of the device. Can be "TSEC", "eTSEC", or "FEC"
  38. - compatible : Should be "gianfar"
  39. - reg : Offset and length of the register set for the device
  40. - interrupts : For FEC devices, the first interrupt is the device's
  41. interrupt. For TSEC and eTSEC devices, the first interrupt is
  42. transmit, the second is receive, and the third is error.
  43. - phy-handle : See ethernet.txt file in the same directory.
  44. - fixed-link : See fixed-link.txt in the same directory.
  45. - phy-connection-type : See ethernet.txt file in the same directory.
  46. This property is only really needed if the connection is of type
  47. "rgmii-id", as all other connection types are detected by hardware.
  48. - fsl,magic-packet : If present, indicates that the hardware supports
  49. waking up via magic packet.
  50. - fsl,wake-on-filer : If present, indicates that the hardware supports
  51. waking up by Filer General Purpose Interrupt (FGPI) asserted on the
  52. Rx int line. This is an advanced power management capability allowing
  53. certain packet types (user) defined by filer rules to wake up the system.
  54. - bd-stash : If present, indicates that the hardware supports stashing
  55. buffer descriptors in the L2.
  56. - rx-stash-len : Denotes the number of bytes of a received buffer to stash
  57. in the L2.
  58. - rx-stash-idx : Denotes the index of the first byte from the received
  59. buffer to stash in the L2.
  60. Example:
  61. ethernet@24000 {
  62. device_type = "network";
  63. model = "TSEC";
  64. compatible = "gianfar";
  65. reg = <0x24000 0x1000>;
  66. local-mac-address = [ 00 E0 0C 00 73 00 ];
  67. interrupts = <29 2 30 2 34 2>;
  68. interrupt-parent = <&mpic>;
  69. phy-handle = <&phy0>
  70. };
  71. * Gianfar PTP clock nodes
  72. General Properties:
  73. - compatible Should be "fsl,etsec-ptp"
  74. - reg Offset and length of the register set for the device
  75. - interrupts There should be at least two interrupts. Some devices
  76. have as many as four PTP related interrupts.
  77. Clock Properties:
  78. - fsl,cksel Timer reference clock source.
  79. - fsl,tclk-period Timer reference clock period in nanoseconds.
  80. - fsl,tmr-prsc Prescaler, divides the output clock.
  81. - fsl,tmr-add Frequency compensation value.
  82. - fsl,tmr-fiper1 Fixed interval period pulse generator.
  83. - fsl,tmr-fiper2 Fixed interval period pulse generator.
  84. - fsl,max-adj Maximum frequency adjustment in parts per billion.
  85. These properties set the operational parameters for the PTP
  86. clock. You must choose these carefully for the clock to work right.
  87. Here is how to figure good values:
  88. TimerOsc = selected reference clock MHz
  89. tclk_period = desired clock period nanoseconds
  90. NominalFreq = 1000 / tclk_period MHz
  91. FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
  92. tmr_add = ceil(2^32 / FreqDivRatio)
  93. OutputClock = NominalFreq / tmr_prsc MHz
  94. PulseWidth = 1 / OutputClock microseconds
  95. FiperFreq1 = desired frequency in Hz
  96. FiperDiv1 = 1000000 * OutputClock / FiperFreq1
  97. tmr_fiper1 = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
  98. max_adj = 1000000000 * (FreqDivRatio - 1.0) - 1
  99. The calculation for tmr_fiper2 is the same as for tmr_fiper1. The
  100. driver expects that tmr_fiper1 will be correctly set to produce a 1
  101. Pulse Per Second (PPS) signal, since this will be offered to the PPS
  102. subsystem to synchronize the Linux clock.
  103. Reference clock source is determined by the value, which is holded
  104. in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the
  105. value, which will be directly written in those bits, that is why,
  106. according to reference manual, the next clock sources can be used:
  107. <0> - external high precision timer reference clock (TSEC_TMR_CLK
  108. input is used for this purpose);
  109. <1> - eTSEC system clock;
  110. <2> - eTSEC1 transmit clock;
  111. <3> - RTC clock input.
  112. When this attribute is not used, eTSEC system clock will serve as
  113. IEEE 1588 timer reference clock.
  114. Example:
  115. ptp_clock@24E00 {
  116. compatible = "fsl,etsec-ptp";
  117. reg = <0x24E00 0xB0>;
  118. interrupts = <12 0x8 13 0x8>;
  119. interrupt-parent = < &ipic >;
  120. fsl,cksel = <1>;
  121. fsl,tclk-period = <10>;
  122. fsl,tmr-prsc = <100>;
  123. fsl,tmr-add = <0x999999A4>;
  124. fsl,tmr-fiper1 = <0x3B9AC9F6>;
  125. fsl,tmr-fiper2 = <0x00018696>;
  126. fsl,max-adj = <659999998>;
  127. };