powercap.txt 9.1 KB

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  1. Power Capping Framework
  2. ==================================
  3. The power capping framework provides a consistent interface between the kernel
  4. and the user space that allows power capping drivers to expose the settings to
  5. user space in a uniform way.
  6. Terminology
  7. =========================
  8. The framework exposes power capping devices to user space via sysfs in the
  9. form of a tree of objects. The objects at the root level of the tree represent
  10. 'control types', which correspond to different methods of power capping. For
  11. example, the intel-rapl control type represents the Intel "Running Average
  12. Power Limit" (RAPL) technology, whereas the 'idle-injection' control type
  13. corresponds to the use of idle injection for controlling power.
  14. Power zones represent different parts of the system, which can be controlled and
  15. monitored using the power capping method determined by the control type the
  16. given zone belongs to. They each contain attributes for monitoring power, as
  17. well as controls represented in the form of power constraints. If the parts of
  18. the system represented by different power zones are hierarchical (that is, one
  19. bigger part consists of multiple smaller parts that each have their own power
  20. controls), those power zones may also be organized in a hierarchy with one
  21. parent power zone containing multiple subzones and so on to reflect the power
  22. control topology of the system. In that case, it is possible to apply power
  23. capping to a set of devices together using the parent power zone and if more
  24. fine grained control is required, it can be applied through the subzones.
  25. Example sysfs interface tree:
  26. /sys/devices/virtual/powercap
  27. ??? intel-rapl
  28. ??? intel-rapl:0
  29. ?   ??? constraint_0_name
  30. ?   ??? constraint_0_power_limit_uw
  31. ?   ??? constraint_0_time_window_us
  32. ?   ??? constraint_1_name
  33. ?   ??? constraint_1_power_limit_uw
  34. ?   ??? constraint_1_time_window_us
  35. ?   ??? device -> ../../intel-rapl
  36. ?   ??? energy_uj
  37. ?   ??? intel-rapl:0:0
  38. ?   ?   ??? constraint_0_name
  39. ?   ?   ??? constraint_0_power_limit_uw
  40. ?   ?   ??? constraint_0_time_window_us
  41. ?   ?   ??? constraint_1_name
  42. ?   ?   ??? constraint_1_power_limit_uw
  43. ?   ?   ??? constraint_1_time_window_us
  44. ?   ?   ??? device -> ../../intel-rapl:0
  45. ?   ?   ??? energy_uj
  46. ?   ?   ??? max_energy_range_uj
  47. ?   ?   ??? name
  48. ?   ?   ??? enabled
  49. ?   ?   ??? power
  50. ?   ?   ?   ??? async
  51. ?   ?   ?   []
  52. ?   ?   ??? subsystem -> ../../../../../../class/power_cap
  53. ?   ?   ??? uevent
  54. ?   ??? intel-rapl:0:1
  55. ?   ?   ??? constraint_0_name
  56. ?   ?   ??? constraint_0_power_limit_uw
  57. ?   ?   ??? constraint_0_time_window_us
  58. ?   ?   ??? constraint_1_name
  59. ?   ?   ??? constraint_1_power_limit_uw
  60. ?   ?   ??? constraint_1_time_window_us
  61. ?   ?   ??? device -> ../../intel-rapl:0
  62. ?   ?   ??? energy_uj
  63. ?   ?   ??? max_energy_range_uj
  64. ?   ?   ??? name
  65. ?   ?   ??? enabled
  66. ?   ?   ??? power
  67. ?   ?   ?   ??? async
  68. ?   ?   ?   []
  69. ?   ?   ??? subsystem -> ../../../../../../class/power_cap
  70. ?   ?   ??? uevent
  71. ?   ??? max_energy_range_uj
  72. ?   ??? max_power_range_uw
  73. ?   ??? name
  74. ?   ??? enabled
  75. ?   ??? power
  76. ?   ?   ??? async
  77. ?   ?   []
  78. ?   ??? subsystem -> ../../../../../class/power_cap
  79. ?   ??? enabled
  80. ?   ??? uevent
  81. ??? intel-rapl:1
  82. ?   ??? constraint_0_name
  83. ?   ??? constraint_0_power_limit_uw
  84. ?   ??? constraint_0_time_window_us
  85. ?   ??? constraint_1_name
  86. ?   ??? constraint_1_power_limit_uw
  87. ?   ??? constraint_1_time_window_us
  88. ?   ??? device -> ../../intel-rapl
  89. ?   ??? energy_uj
  90. ?   ??? intel-rapl:1:0
  91. ?   ?   ??? constraint_0_name
  92. ?   ?   ??? constraint_0_power_limit_uw
  93. ?   ?   ??? constraint_0_time_window_us
  94. ?   ?   ??? constraint_1_name
  95. ?   ?   ??? constraint_1_power_limit_uw
  96. ?   ?   ??? constraint_1_time_window_us
  97. ?   ?   ??? device -> ../../intel-rapl:1
  98. ?   ?   ??? energy_uj
  99. ?   ?   ??? max_energy_range_uj
  100. ?   ?   ??? name
  101. ?   ?   ??? enabled
  102. ?   ?   ??? power
  103. ?   ?   ?   ??? async
  104. ?   ?   ?   []
  105. ?   ?   ??? subsystem -> ../../../../../../class/power_cap
  106. ?   ?   ??? uevent
  107. ?   ??? intel-rapl:1:1
  108. ?   ?   ??? constraint_0_name
  109. ?   ?   ??? constraint_0_power_limit_uw
  110. ?   ?   ??? constraint_0_time_window_us
  111. ?   ?   ??? constraint_1_name
  112. ?   ?   ??? constraint_1_power_limit_uw
  113. ?   ?   ??? constraint_1_time_window_us
  114. ?   ?   ??? device -> ../../intel-rapl:1
  115. ?   ?   ??? energy_uj
  116. ?   ?   ??? max_energy_range_uj
  117. ?   ?   ??? name
  118. ?   ?   ??? enabled
  119. ?   ?   ??? power
  120. ?   ?   ?   ??? async
  121. ?   ?   ?   []
  122. ?   ?   ??? subsystem -> ../../../../../../class/power_cap
  123. ?   ?   ??? uevent
  124. ?   ??? max_energy_range_uj
  125. ?   ??? max_power_range_uw
  126. ?   ??? name
  127. ?   ??? enabled
  128. ?   ??? power
  129. ?   ?   ??? async
  130. ?   ?   []
  131. ?   ??? subsystem -> ../../../../../class/power_cap
  132. ?   ??? uevent
  133. ??? power
  134. ?   ??? async
  135. ?   []
  136. ??? subsystem -> ../../../../class/power_cap
  137. ??? enabled
  138. ??? uevent
  139. The above example illustrates a case in which the Intel RAPL technology,
  140. available in Intel® IA-64 and IA-32 Processor Architectures, is used. There is one
  141. control type called intel-rapl which contains two power zones, intel-rapl:0 and
  142. intel-rapl:1, representing CPU packages. Each of these power zones contains
  143. two subzones, intel-rapl:j:0 and intel-rapl:j:1 (j = 0, 1), representing the
  144. "core" and the "uncore" parts of the given CPU package, respectively. All of
  145. the zones and subzones contain energy monitoring attributes (energy_uj,
  146. max_energy_range_uj) and constraint attributes (constraint_*) allowing controls
  147. to be applied (the constraints in the 'package' power zones apply to the whole
  148. CPU packages and the subzone constraints only apply to the respective parts of
  149. the given package individually). Since Intel RAPL doesn't provide instantaneous
  150. power value, there is no power_uw attribute.
  151. In addition to that, each power zone contains a name attribute, allowing the
  152. part of the system represented by that zone to be identified.
  153. For example:
  154. cat /sys/class/power_cap/intel-rapl/intel-rapl:0/name
  155. package-0
  156. The Intel RAPL technology allows two constraints, short term and long term,
  157. with two different time windows to be applied to each power zone. Thus for
  158. each zone there are 2 attributes representing the constraint names, 2 power
  159. limits and 2 attributes representing the sizes of the time windows. Such that,
  160. constraint_j_* attributes correspond to the jth constraint (j = 0,1).
  161. For example:
  162. constraint_0_name
  163. constraint_0_power_limit_uw
  164. constraint_0_time_window_us
  165. constraint_1_name
  166. constraint_1_power_limit_uw
  167. constraint_1_time_window_us
  168. Power Zone Attributes
  169. =================================
  170. Monitoring attributes
  171. ----------------------
  172. energy_uj (rw): Current energy counter in micro joules. Write "0" to reset.
  173. If the counter can not be reset, then this attribute is read only.
  174. max_energy_range_uj (ro): Range of the above energy counter in micro-joules.
  175. power_uw (ro): Current power in micro watts.
  176. max_power_range_uw (ro): Range of the above power value in micro-watts.
  177. name (ro): Name of this power zone.
  178. It is possible that some domains have both power ranges and energy counter ranges;
  179. however, only one is mandatory.
  180. Constraints
  181. ----------------
  182. constraint_X_power_limit_uw (rw): Power limit in micro watts, which should be
  183. applicable for the time window specified by "constraint_X_time_window_us".
  184. constraint_X_time_window_us (rw): Time window in micro seconds.
  185. constraint_X_name (ro): An optional name of the constraint
  186. constraint_X_max_power_uw(ro): Maximum allowed power in micro watts.
  187. constraint_X_min_power_uw(ro): Minimum allowed power in micro watts.
  188. constraint_X_max_time_window_us(ro): Maximum allowed time window in micro seconds.
  189. constraint_X_min_time_window_us(ro): Minimum allowed time window in micro seconds.
  190. Except power_limit_uw and time_window_us other fields are optional.
  191. Common zone and control type attributes
  192. ----------------------------------------
  193. enabled (rw): Enable/Disable controls at zone level or for all zones using
  194. a control type.
  195. Power Cap Client Driver Interface
  196. ==================================
  197. The API summary:
  198. Call powercap_register_control_type() to register control type object.
  199. Call powercap_register_zone() to register a power zone (under a given
  200. control type), either as a top-level power zone or as a subzone of another
  201. power zone registered earlier.
  202. The number of constraints in a power zone and the corresponding callbacks have
  203. to be defined prior to calling powercap_register_zone() to register that zone.
  204. To Free a power zone call powercap_unregister_zone().
  205. To free a control type object call powercap_unregister_control_type().
  206. Detailed API can be generated using kernel-doc on include/linux/powercap.h.