setup.c 14 KB

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  1. /*
  2. * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #include <linux/seq_file.h>
  9. #include <linux/fs.h>
  10. #include <linux/delay.h>
  11. #include <linux/root_dev.h>
  12. #include <linux/console.h>
  13. #include <linux/module.h>
  14. #include <linux/cpu.h>
  15. #include <linux/clk-provider.h>
  16. #include <linux/of_fdt.h>
  17. #include <linux/of_platform.h>
  18. #include <linux/cache.h>
  19. #include <asm/sections.h>
  20. #include <asm/arcregs.h>
  21. #include <asm/tlb.h>
  22. #include <asm/setup.h>
  23. #include <asm/page.h>
  24. #include <asm/irq.h>
  25. #include <asm/unwind.h>
  26. #include <asm/clk.h>
  27. #include <asm/mach_desc.h>
  28. #include <asm/smp.h>
  29. #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
  30. unsigned int intr_to_DE_cnt;
  31. /* Part of U-boot ABI: see head.S */
  32. int __initdata uboot_tag;
  33. char __initdata *uboot_arg;
  34. const struct machine_desc *machine_desc;
  35. struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
  36. struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
  37. static void read_arc_build_cfg_regs(void)
  38. {
  39. struct bcr_perip uncached_space;
  40. struct bcr_generic bcr;
  41. struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
  42. unsigned long perip_space;
  43. FIX_PTR(cpu);
  44. READ_BCR(AUX_IDENTITY, cpu->core);
  45. READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
  46. READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers);
  47. cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
  48. READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
  49. if (uncached_space.ver < 3)
  50. perip_space = uncached_space.start << 24;
  51. else
  52. perip_space = read_aux_reg(AUX_NON_VOL) & 0xF0000000;
  53. BUG_ON(perip_space != ARC_UNCACHED_ADDR_SPACE);
  54. READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
  55. cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
  56. cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
  57. cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
  58. cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
  59. cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
  60. /* Note that we read the CCM BCRs independent of kernel config
  61. * This is to catch the cases where user doesn't know that
  62. * CCMs are present in hardware build
  63. */
  64. {
  65. struct bcr_iccm iccm;
  66. struct bcr_dccm dccm;
  67. struct bcr_dccm_base dccm_base;
  68. unsigned int bcr_32bit_val;
  69. bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
  70. if (bcr_32bit_val) {
  71. iccm = *((struct bcr_iccm *)&bcr_32bit_val);
  72. cpu->iccm.base_addr = iccm.base << 16;
  73. cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
  74. }
  75. bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
  76. if (bcr_32bit_val) {
  77. dccm = *((struct bcr_dccm *)&bcr_32bit_val);
  78. cpu->dccm.sz = 0x800 << (dccm.sz);
  79. READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
  80. cpu->dccm.base_addr = dccm_base.addr << 8;
  81. }
  82. }
  83. READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
  84. read_decode_mmu_bcr();
  85. read_decode_cache_bcr();
  86. if (is_isa_arcompact()) {
  87. struct bcr_fp_arcompact sp, dp;
  88. struct bcr_bpu_arcompact bpu;
  89. READ_BCR(ARC_REG_FP_BCR, sp);
  90. READ_BCR(ARC_REG_DPFP_BCR, dp);
  91. cpu->extn.fpu_sp = sp.ver ? 1 : 0;
  92. cpu->extn.fpu_dp = dp.ver ? 1 : 0;
  93. READ_BCR(ARC_REG_BPU_BCR, bpu);
  94. cpu->bpu.ver = bpu.ver;
  95. cpu->bpu.full = bpu.fam ? 1 : 0;
  96. if (bpu.ent) {
  97. cpu->bpu.num_cache = 256 << (bpu.ent - 1);
  98. cpu->bpu.num_pred = 256 << (bpu.ent - 1);
  99. }
  100. } else {
  101. struct bcr_fp_arcv2 spdp;
  102. struct bcr_bpu_arcv2 bpu;
  103. READ_BCR(ARC_REG_FP_V2_BCR, spdp);
  104. cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
  105. cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
  106. READ_BCR(ARC_REG_BPU_BCR, bpu);
  107. cpu->bpu.ver = bpu.ver;
  108. cpu->bpu.full = bpu.ft;
  109. cpu->bpu.num_cache = 256 << bpu.bce;
  110. cpu->bpu.num_pred = 2048 << bpu.pte;
  111. }
  112. READ_BCR(ARC_REG_AP_BCR, bcr);
  113. cpu->extn.ap = bcr.ver ? 1 : 0;
  114. READ_BCR(ARC_REG_SMART_BCR, bcr);
  115. cpu->extn.smart = bcr.ver ? 1 : 0;
  116. READ_BCR(ARC_REG_RTT_BCR, bcr);
  117. cpu->extn.rtt = bcr.ver ? 1 : 0;
  118. cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
  119. }
  120. static const struct cpuinfo_data arc_cpu_tbl[] = {
  121. #ifdef CONFIG_ISA_ARCOMPACT
  122. { {0x20, "ARC 600" }, 0x2F},
  123. { {0x30, "ARC 700" }, 0x33},
  124. { {0x34, "ARC 700 R4.10"}, 0x34},
  125. { {0x35, "ARC 700 R4.11"}, 0x35},
  126. #else
  127. { {0x50, "ARC HS38 R2.0"}, 0x51},
  128. { {0x52, "ARC HS38 R2.1"}, 0x52},
  129. #endif
  130. { {0x00, NULL } }
  131. };
  132. static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
  133. {
  134. struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
  135. struct bcr_identity *core = &cpu->core;
  136. const struct cpuinfo_data *tbl;
  137. char *isa_nm;
  138. int i, be, atomic;
  139. int n = 0;
  140. FIX_PTR(cpu);
  141. if (is_isa_arcompact()) {
  142. isa_nm = "ARCompact";
  143. be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
  144. atomic = cpu->isa.atomic1;
  145. if (!cpu->isa.ver) /* ISA BCR absent, use Kconfig info */
  146. atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
  147. } else {
  148. isa_nm = "ARCv2";
  149. be = cpu->isa.be;
  150. atomic = cpu->isa.atomic;
  151. }
  152. n += scnprintf(buf + n, len - n,
  153. "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
  154. core->family, core->cpu_id, core->chip_id);
  155. for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
  156. if ((core->family >= tbl->info.id) &&
  157. (core->family <= tbl->up_range)) {
  158. n += scnprintf(buf + n, len - n,
  159. "processor [%d]\t: %s (%s ISA) %s\n",
  160. cpu_id, tbl->info.str, isa_nm,
  161. IS_AVAIL1(be, "[Big-Endian]"));
  162. break;
  163. }
  164. }
  165. if (tbl->info.id == 0)
  166. n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
  167. n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
  168. (unsigned int)(arc_get_core_freq() / 1000000),
  169. (unsigned int)(arc_get_core_freq() / 10000) % 100);
  170. n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
  171. IS_AVAIL1(cpu->timers.t0, "Timer0 "),
  172. IS_AVAIL1(cpu->timers.t1, "Timer1 "),
  173. IS_AVAIL2(cpu->timers.rtc, "64-bit RTC ",
  174. CONFIG_ARC_HAS_RTC));
  175. n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
  176. IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
  177. IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
  178. IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
  179. if (i)
  180. n += scnprintf(buf + n, len - n, "\n\t\t: ");
  181. if (cpu->extn_mpy.ver) {
  182. if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
  183. n += scnprintf(buf + n, len - n, "mpy ");
  184. } else {
  185. int opt = 2; /* stock MPY/MPYH */
  186. if (cpu->extn_mpy.dsp) /* OPT 7-9 */
  187. opt = cpu->extn_mpy.dsp + 6;
  188. n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
  189. }
  190. n += scnprintf(buf + n, len - n, "%s",
  191. IS_USED_CFG(CONFIG_ARC_HAS_HW_MPY));
  192. }
  193. n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
  194. IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
  195. IS_AVAIL1(cpu->extn.norm, "norm "),
  196. IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
  197. IS_AVAIL1(cpu->extn.swap, "swap "),
  198. IS_AVAIL1(cpu->extn.minmax, "minmax "),
  199. IS_AVAIL1(cpu->extn.crc, "crc "),
  200. IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));
  201. if (cpu->bpu.ver)
  202. n += scnprintf(buf + n, len - n,
  203. "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
  204. IS_AVAIL1(cpu->bpu.full, "full"),
  205. IS_AVAIL1(!cpu->bpu.full, "partial"),
  206. cpu->bpu.num_cache, cpu->bpu.num_pred);
  207. return buf;
  208. }
  209. static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
  210. {
  211. int n = 0;
  212. struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
  213. FIX_PTR(cpu);
  214. n += scnprintf(buf + n, len - n,
  215. "Vector Table\t: %#x\nUncached Base\t: %#x\n",
  216. cpu->vec_base, ARC_UNCACHED_ADDR_SPACE);
  217. if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
  218. n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
  219. IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
  220. IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
  221. if (cpu->extn.debug)
  222. n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
  223. IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
  224. IS_AVAIL1(cpu->extn.smart, "smaRT "),
  225. IS_AVAIL1(cpu->extn.rtt, "RTT "));
  226. if (cpu->dccm.sz || cpu->iccm.sz)
  227. n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
  228. cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
  229. cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
  230. n += scnprintf(buf + n, len - n,
  231. "OS ABI [v3]\t: no-legacy-syscalls\n");
  232. return buf;
  233. }
  234. static void arc_chk_core_config(void)
  235. {
  236. struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
  237. int fpu_enabled;
  238. if (!cpu->timers.t0)
  239. panic("Timer0 is not present!\n");
  240. if (!cpu->timers.t1)
  241. panic("Timer1 is not present!\n");
  242. if (IS_ENABLED(CONFIG_ARC_HAS_RTC) && !cpu->timers.rtc)
  243. panic("RTC is not present\n");
  244. #ifdef CONFIG_ARC_HAS_DCCM
  245. /*
  246. * DCCM can be arbit placed in hardware.
  247. * Make sure it's placement/sz matches what Linux is built with
  248. */
  249. if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
  250. panic("Linux built with incorrect DCCM Base address\n");
  251. if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
  252. panic("Linux built with incorrect DCCM Size\n");
  253. #endif
  254. #ifdef CONFIG_ARC_HAS_ICCM
  255. if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
  256. panic("Linux built with incorrect ICCM Size\n");
  257. #endif
  258. /*
  259. * FP hardware/software config sanity
  260. * -If hardware contains DPFP, kernel needs to save/restore FPU state
  261. * -If not, it will crash trying to save/restore the non-existant regs
  262. *
  263. * (only DPDP checked since SP has no arch visible regs)
  264. */
  265. fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
  266. if (cpu->extn.fpu_dp && !fpu_enabled)
  267. pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
  268. else if (!cpu->extn.fpu_dp && fpu_enabled)
  269. panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
  270. }
  271. /*
  272. * Initialize and setup the processor core
  273. * This is called by all the CPUs thus should not do special case stuff
  274. * such as only for boot CPU etc
  275. */
  276. void setup_processor(void)
  277. {
  278. char str[512];
  279. int cpu_id = smp_processor_id();
  280. read_arc_build_cfg_regs();
  281. arc_init_IRQ();
  282. printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
  283. arc_mmu_init();
  284. arc_cache_init();
  285. printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
  286. printk(arc_platform_smp_cpuinfo());
  287. arc_chk_core_config();
  288. }
  289. static inline int is_kernel(unsigned long addr)
  290. {
  291. if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
  292. return 1;
  293. return 0;
  294. }
  295. void __init setup_arch(char **cmdline_p)
  296. {
  297. #ifdef CONFIG_ARC_UBOOT_SUPPORT
  298. /* make sure that uboot passed pointer to cmdline/dtb is valid */
  299. if (uboot_tag && is_kernel((unsigned long)uboot_arg))
  300. panic("Invalid uboot arg\n");
  301. /* See if u-boot passed an external Device Tree blob */
  302. machine_desc = setup_machine_fdt(uboot_arg); /* uboot_tag == 2 */
  303. if (!machine_desc)
  304. #endif
  305. {
  306. /* No, so try the embedded one */
  307. machine_desc = setup_machine_fdt(__dtb_start);
  308. if (!machine_desc)
  309. panic("Embedded DT invalid\n");
  310. /*
  311. * If we are here, it is established that @uboot_arg didn't
  312. * point to DT blob. Instead if u-boot says it is cmdline,
  313. * Appent to embedded DT cmdline.
  314. * setup_machine_fdt() would have populated @boot_command_line
  315. */
  316. if (uboot_tag == 1) {
  317. /* Ensure a whitespace between the 2 cmdlines */
  318. strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
  319. strlcat(boot_command_line, uboot_arg,
  320. COMMAND_LINE_SIZE);
  321. }
  322. }
  323. /* Save unparsed command line copy for /proc/cmdline */
  324. *cmdline_p = boot_command_line;
  325. /* To force early parsing of things like mem=xxx */
  326. parse_early_param();
  327. /* Platform/board specific: e.g. early console registration */
  328. if (machine_desc->init_early)
  329. machine_desc->init_early();
  330. smp_init_cpus();
  331. setup_processor();
  332. setup_arch_memory();
  333. /* copy flat DT out of .init and then unflatten it */
  334. unflatten_and_copy_device_tree();
  335. /* Can be issue if someone passes cmd line arg "ro"
  336. * But that is unlikely so keeping it as it is
  337. */
  338. root_mountflags &= ~MS_RDONLY;
  339. #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
  340. conswitchp = &dummy_con;
  341. #endif
  342. arc_unwind_init();
  343. }
  344. static int __init customize_machine(void)
  345. {
  346. of_clk_init(NULL);
  347. /*
  348. * Traverses flattened DeviceTree - registering platform devices
  349. * (if any) complete with their resources
  350. */
  351. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  352. if (machine_desc->init_machine)
  353. machine_desc->init_machine();
  354. return 0;
  355. }
  356. arch_initcall(customize_machine);
  357. static int __init init_late_machine(void)
  358. {
  359. if (machine_desc->init_late)
  360. machine_desc->init_late();
  361. return 0;
  362. }
  363. late_initcall(init_late_machine);
  364. /*
  365. * Get CPU information for use by the procfs.
  366. */
  367. #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
  368. #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
  369. static int show_cpuinfo(struct seq_file *m, void *v)
  370. {
  371. char *str;
  372. int cpu_id = ptr_to_cpu(v);
  373. if (!cpu_online(cpu_id)) {
  374. seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
  375. goto done;
  376. }
  377. str = (char *)__get_free_page(GFP_TEMPORARY);
  378. if (!str)
  379. goto done;
  380. seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
  381. seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
  382. loops_per_jiffy / (500000 / HZ),
  383. (loops_per_jiffy / (5000 / HZ)) % 100);
  384. seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
  385. seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
  386. seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
  387. seq_printf(m, arc_platform_smp_cpuinfo());
  388. free_page((unsigned long)str);
  389. done:
  390. seq_printf(m, "\n");
  391. return 0;
  392. }
  393. static void *c_start(struct seq_file *m, loff_t *pos)
  394. {
  395. /*
  396. * Callback returns cpu-id to iterator for show routine, NULL to stop.
  397. * However since NULL is also a valid cpu-id (0), we use a round-about
  398. * way to pass it w/o having to kmalloc/free a 2 byte string.
  399. * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
  400. */
  401. return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
  402. }
  403. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  404. {
  405. ++*pos;
  406. return c_start(m, pos);
  407. }
  408. static void c_stop(struct seq_file *m, void *v)
  409. {
  410. }
  411. const struct seq_operations cpuinfo_op = {
  412. .start = c_start,
  413. .next = c_next,
  414. .stop = c_stop,
  415. .show = show_cpuinfo
  416. };
  417. static DEFINE_PER_CPU(struct cpu, cpu_topology);
  418. static int __init topology_init(void)
  419. {
  420. int cpu;
  421. for_each_present_cpu(cpu)
  422. register_cpu(&per_cpu(cpu_topology, cpu), cpu);
  423. return 0;
  424. }
  425. subsys_initcall(topology_init);