pm.c 3.9 KB

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  1. /* linux/arch/arm/mach-s5pv210/pm.c
  2. *
  3. * Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * S5PV210 - Power Management support
  7. *
  8. * Based on arch/arm/mach-s3c2410/pm.c
  9. * Copyright (c) 2006 Simtec Electronics
  10. * Ben Dooks <ben@simtec.co.uk>
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. */
  16. #include <linux/init.h>
  17. #include <linux/suspend.h>
  18. #include <linux/syscore_ops.h>
  19. #include <linux/io.h>
  20. #include <asm/cacheflush.h>
  21. #include <asm/suspend.h>
  22. #include <plat/pm-common.h>
  23. #include "common.h"
  24. #include "regs-clock.h"
  25. static struct sleep_save s5pv210_core_save[] = {
  26. /* Clock ETC */
  27. SAVE_ITEM(S5P_MDNIE_SEL),
  28. };
  29. /*
  30. * VIC wake-up support (TODO)
  31. */
  32. static u32 s5pv210_irqwake_intmask = 0xffffffff;
  33. /*
  34. * Suspend helpers.
  35. */
  36. static int s5pv210_cpu_suspend(unsigned long arg)
  37. {
  38. unsigned long tmp;
  39. /* issue the standby signal into the pm unit. Note, we
  40. * issue a write-buffer drain just in case */
  41. tmp = 0;
  42. asm("b 1f\n\t"
  43. ".align 5\n\t"
  44. "1:\n\t"
  45. "mcr p15, 0, %0, c7, c10, 5\n\t"
  46. "mcr p15, 0, %0, c7, c10, 4\n\t"
  47. "wfi" : : "r" (tmp));
  48. pr_info("Failed to suspend the system\n");
  49. return 1; /* Aborting suspend */
  50. }
  51. static void s5pv210_pm_prepare(void)
  52. {
  53. unsigned int tmp;
  54. /* Set wake-up mask registers */
  55. __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK);
  56. __raw_writel(s5pv210_irqwake_intmask, S5P_WAKEUP_MASK);
  57. /* ensure at least INFORM0 has the resume address */
  58. __raw_writel(virt_to_phys(s5pv210_cpu_resume), S5P_INFORM0);
  59. tmp = __raw_readl(S5P_SLEEP_CFG);
  60. tmp &= ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN);
  61. __raw_writel(tmp, S5P_SLEEP_CFG);
  62. /* WFI for SLEEP mode configuration by SYSCON */
  63. tmp = __raw_readl(S5P_PWR_CFG);
  64. tmp &= S5P_CFG_WFI_CLEAN;
  65. tmp |= S5P_CFG_WFI_SLEEP;
  66. __raw_writel(tmp, S5P_PWR_CFG);
  67. /* SYSCON interrupt handling disable */
  68. tmp = __raw_readl(S5P_OTHERS);
  69. tmp |= S5P_OTHER_SYSC_INTOFF;
  70. __raw_writel(tmp, S5P_OTHERS);
  71. s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
  72. }
  73. /*
  74. * Suspend operations.
  75. */
  76. static int s5pv210_suspend_enter(suspend_state_t state)
  77. {
  78. int ret;
  79. s3c_pm_debug_init();
  80. S3C_PMDBG("%s: suspending the system...\n", __func__);
  81. S3C_PMDBG("%s: wakeup masks: %08x,%08x\n", __func__,
  82. s5pv210_irqwake_intmask, exynos_get_eint_wake_mask());
  83. if (s5pv210_irqwake_intmask == -1U
  84. && exynos_get_eint_wake_mask() == -1U) {
  85. pr_err("%s: No wake-up sources!\n", __func__);
  86. pr_err("%s: Aborting sleep\n", __func__);
  87. return -EINVAL;
  88. }
  89. s3c_pm_save_uarts();
  90. s5pv210_pm_prepare();
  91. flush_cache_all();
  92. s3c_pm_check_store();
  93. ret = cpu_suspend(0, s5pv210_cpu_suspend);
  94. if (ret)
  95. return ret;
  96. s3c_pm_restore_uarts();
  97. S3C_PMDBG("%s: wakeup stat: %08x\n", __func__,
  98. __raw_readl(S5P_WAKEUP_STAT));
  99. s3c_pm_check_restore();
  100. S3C_PMDBG("%s: resuming the system...\n", __func__);
  101. return 0;
  102. }
  103. static int s5pv210_suspend_prepare(void)
  104. {
  105. s3c_pm_check_prepare();
  106. return 0;
  107. }
  108. static void s5pv210_suspend_finish(void)
  109. {
  110. s3c_pm_check_cleanup();
  111. }
  112. static const struct platform_suspend_ops s5pv210_suspend_ops = {
  113. .enter = s5pv210_suspend_enter,
  114. .prepare = s5pv210_suspend_prepare,
  115. .finish = s5pv210_suspend_finish,
  116. .valid = suspend_valid_only_mem,
  117. };
  118. /*
  119. * Syscore operations used to delay restore of certain registers.
  120. */
  121. static void s5pv210_pm_resume(void)
  122. {
  123. u32 tmp;
  124. tmp = __raw_readl(S5P_OTHERS);
  125. tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF |\
  126. S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART);
  127. __raw_writel(tmp , S5P_OTHERS);
  128. s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
  129. }
  130. static struct syscore_ops s5pv210_pm_syscore_ops = {
  131. .resume = s5pv210_pm_resume,
  132. };
  133. /*
  134. * Initialization entry point.
  135. */
  136. void __init s5pv210_pm_init(void)
  137. {
  138. register_syscore_ops(&s5pv210_pm_syscore_ops);
  139. suspend_set_ops(&s5pv210_suspend_ops);
  140. }