irq.c 2.3 KB

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  1. /*
  2. * Copyright (C) 2011 Google, Inc.
  3. *
  4. * Author:
  5. * Colin Cross <ccross@android.com>
  6. *
  7. * Copyright (C) 2010,2013, NVIDIA Corporation
  8. *
  9. * This software is licensed under the terms of the GNU General Public
  10. * License version 2, as published by the Free Software Foundation, and
  11. * may be copied, distributed, and modified under those terms.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. */
  19. #include <linux/cpu_pm.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/io.h>
  22. #include <linux/irqchip/arm-gic.h>
  23. #include <linux/irq.h>
  24. #include <linux/kernel.h>
  25. #include <linux/of_address.h>
  26. #include <linux/of.h>
  27. #include <linux/syscore_ops.h>
  28. #include "board.h"
  29. #include "iomap.h"
  30. #define SGI_MASK 0xFFFF
  31. #ifdef CONFIG_PM_SLEEP
  32. static void __iomem *tegra_gic_cpu_base;
  33. #endif
  34. bool tegra_pending_sgi(void)
  35. {
  36. u32 pending_set;
  37. void __iomem *distbase = IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE);
  38. pending_set = readl_relaxed(distbase + GIC_DIST_PENDING_SET);
  39. if (pending_set & SGI_MASK)
  40. return true;
  41. return false;
  42. }
  43. #ifdef CONFIG_PM_SLEEP
  44. static int tegra_gic_notifier(struct notifier_block *self,
  45. unsigned long cmd, void *v)
  46. {
  47. switch (cmd) {
  48. case CPU_PM_ENTER:
  49. writel_relaxed(0x1E0, tegra_gic_cpu_base + GIC_CPU_CTRL);
  50. break;
  51. }
  52. return NOTIFY_OK;
  53. }
  54. static struct notifier_block tegra_gic_notifier_block = {
  55. .notifier_call = tegra_gic_notifier,
  56. };
  57. static const struct of_device_id tegra114_dt_gic_match[] __initconst = {
  58. { .compatible = "arm,cortex-a15-gic" },
  59. { }
  60. };
  61. static void tegra114_gic_cpu_pm_registration(void)
  62. {
  63. struct device_node *dn;
  64. dn = of_find_matching_node(NULL, tegra114_dt_gic_match);
  65. if (!dn)
  66. return;
  67. tegra_gic_cpu_base = of_iomap(dn, 1);
  68. cpu_pm_register_notifier(&tegra_gic_notifier_block);
  69. }
  70. #else
  71. static void tegra114_gic_cpu_pm_registration(void) { }
  72. #endif
  73. static const struct of_device_id tegra_ictlr_match[] __initconst = {
  74. { .compatible = "nvidia,tegra20-ictlr" },
  75. { .compatible = "nvidia,tegra30-ictlr" },
  76. { }
  77. };
  78. void __init tegra_init_irq(void)
  79. {
  80. if (WARN_ON(!of_find_matching_node(NULL, tegra_ictlr_match)))
  81. pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
  82. tegra114_gic_cpu_pm_registration();
  83. }