socfpga_stratix10.dtsi 7.7 KB

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  1. /*
  2. * Copyright Altera Corporation (C) 2015. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program. If not, see <http://www.gnu.org/licenses/>.
  15. */
  16. /dts-v1/;
  17. / {
  18. compatible = "altr,socfpga-stratix10";
  19. #address-cells = <2>;
  20. #size-cells = <2>;
  21. cpus {
  22. #address-cells = <1>;
  23. #size-cells = <0>;
  24. cpu0: cpu@0 {
  25. compatible = "arm,cortex-a53", "arm,armv8";
  26. device_type = "cpu";
  27. enable-method = "psci";
  28. reg = <0x0>;
  29. };
  30. cpu1: cpu@1 {
  31. compatible = "arm,cortex-a53", "arm,armv8";
  32. device_type = "cpu";
  33. enable-method = "psci";
  34. reg = <0x1>;
  35. };
  36. cpu2: cpu@2 {
  37. compatible = "arm,cortex-a53", "arm,armv8";
  38. device_type = "cpu";
  39. enable-method = "psci";
  40. reg = <0x2>;
  41. };
  42. cpu3: cpu@3 {
  43. compatible = "arm,cortex-a53", "arm,armv8";
  44. device_type = "cpu";
  45. enable-method = "psci";
  46. reg = <0x3>;
  47. };
  48. };
  49. pmu {
  50. compatible = "arm,armv8-pmuv3";
  51. interrupts = <0 120 8>,
  52. <0 121 8>,
  53. <0 122 8>,
  54. <0 123 8>;
  55. interrupt-affinity = <&cpu0>,
  56. <&cpu1>,
  57. <&cpu2>,
  58. <&cpu3>;
  59. };
  60. psci {
  61. compatible = "arm,psci-0.2";
  62. method = "smc";
  63. };
  64. intc: intc@fffc1000 {
  65. compatible = "arm,gic-400", "arm,cortex-a15-gic";
  66. #interrupt-cells = <3>;
  67. interrupt-controller;
  68. reg = <0x0 0xfffc1000 0x1000>,
  69. <0x0 0xfffc2000 0x2000>,
  70. <0x0 0xfffc4000 0x2000>,
  71. <0x0 0xfffc6000 0x2000>;
  72. };
  73. soc {
  74. #address-cells = <1>;
  75. #size-cells = <1>;
  76. compatible = "simple-bus";
  77. device_type = "soc";
  78. interrupt-parent = <&intc>;
  79. ranges = <0 0 0 0xffffffff>;
  80. clkmgr@ffd1000 {
  81. compatible = "altr,clk-mgr";
  82. reg = <0xffd10000 0x1000>;
  83. };
  84. gmac0: ethernet@ff800000 {
  85. compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac";
  86. reg = <0xff800000 0x2000>;
  87. interrupts = <0 90 4>;
  88. interrupt-names = "macirq";
  89. mac-address = [00 00 00 00 00 00];
  90. status = "disabled";
  91. };
  92. gmac1: ethernet@ff802000 {
  93. compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac";
  94. reg = <0xff802000 0x2000>;
  95. interrupts = <0 91 4>;
  96. interrupt-names = "macirq";
  97. mac-address = [00 00 00 00 00 00];
  98. status = "disabled";
  99. };
  100. gmac2: ethernet@ff804000 {
  101. compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac";
  102. reg = <0xff804000 0x2000>;
  103. interrupts = <0 92 4>;
  104. interrupt-names = "macirq";
  105. mac-address = [00 00 00 00 00 00];
  106. status = "disabled";
  107. };
  108. gpio0: gpio@ffc03200 {
  109. #address-cells = <1>;
  110. #size-cells = <0>;
  111. compatible = "snps,dw-apb-gpio";
  112. reg = <0xffc03200 0x100>;
  113. status = "disabled";
  114. porta: gpio-controller@0 {
  115. compatible = "snps,dw-apb-gpio-port";
  116. gpio-controller;
  117. #gpio-cells = <2>;
  118. snps,nr-gpios = <24>;
  119. reg = <0>;
  120. interrupt-controller;
  121. #interrupt-cells = <2>;
  122. interrupts = <0 110 4>;
  123. };
  124. };
  125. gpio1: gpio@ffc03300 {
  126. #address-cells = <1>;
  127. #size-cells = <0>;
  128. compatible = "snps,dw-apb-gpio";
  129. reg = <0xffc03300 0x100>;
  130. status = "disabled";
  131. portb: gpio-controller@0 {
  132. compatible = "snps,dw-apb-gpio-port";
  133. gpio-controller;
  134. #gpio-cells = <2>;
  135. snps,nr-gpios = <24>;
  136. reg = <0>;
  137. interrupt-controller;
  138. #interrupt-cells = <2>;
  139. interrupts = <0 110 4>;
  140. };
  141. };
  142. i2c0: i2c@ffc02800 {
  143. #address-cells = <1>;
  144. #size-cells = <0>;
  145. compatible = "snps,designware-i2c";
  146. reg = <0xffc02800 0x100>;
  147. interrupts = <0 103 4>;
  148. status = "disabled";
  149. };
  150. i2c1: i2c@ffc02900 {
  151. #address-cells = <1>;
  152. #size-cells = <0>;
  153. compatible = "snps,designware-i2c";
  154. reg = <0xffc02900 0x100>;
  155. interrupts = <0 104 4>;
  156. status = "disabled";
  157. };
  158. i2c2: i2c@ffc02a00 {
  159. #address-cells = <1>;
  160. #size-cells = <0>;
  161. compatible = "snps,designware-i2c";
  162. reg = <0xffc02a00 0x100>;
  163. interrupts = <0 105 4>;
  164. status = "disabled";
  165. };
  166. i2c3: i2c@ffc02b00 {
  167. #address-cells = <1>;
  168. #size-cells = <0>;
  169. compatible = "snps,designware-i2c";
  170. reg = <0xffc02b00 0x100>;
  171. interrupts = <0 106 4>;
  172. status = "disabled";
  173. };
  174. i2c4: i2c@ffc02c00 {
  175. #address-cells = <1>;
  176. #size-cells = <0>;
  177. compatible = "snps,designware-i2c";
  178. reg = <0xffc02c00 0x100>;
  179. interrupts = <0 107 4>;
  180. status = "disabled";
  181. };
  182. mmc: dwmmc0@ff808000 {
  183. #address-cells = <1>;
  184. #size-cells = <0>;
  185. compatible = "altr,socfpga-dw-mshc";
  186. reg = <0xff808000 0x1000>;
  187. interrupts = <0 96 4>;
  188. fifo-depth = <0x400>;
  189. status = "disabled";
  190. };
  191. ocram: sram@ffe00000 {
  192. compatible = "mmio-sram";
  193. reg = <0xffe00000 0x100000>;
  194. };
  195. rst: rstmgr@ffd11000 {
  196. #reset-cells = <1>;
  197. compatible = "altr,rst-mgr";
  198. reg = <0xffd11000 0x1000>;
  199. };
  200. spi0: spi@ffda4000 {
  201. compatible = "snps,dw-apb-ssi";
  202. #address-cells = <1>;
  203. #size-cells = <0>;
  204. reg = <0xffda4000 0x1000>;
  205. interrupts = <0 101 4>;
  206. num-chipselect = <4>;
  207. bus-num = <0>;
  208. status = "disabled";
  209. };
  210. spi1: spi@ffda5000 {
  211. compatible = "snps,dw-apb-ssi";
  212. #address-cells = <1>;
  213. #size-cells = <0>;
  214. reg = <0xffda5000 0x1000>;
  215. interrupts = <0 102 4>;
  216. num-chipselect = <4>;
  217. bus-num = <0>;
  218. status = "disabled";
  219. };
  220. sysmgr: sysmgr@ffd12000 {
  221. compatible = "altr,sys-mgr", "syscon";
  222. reg = <0xffd12000 0x228>;
  223. };
  224. /* Local timer */
  225. timer {
  226. compatible = "arm,armv8-timer";
  227. interrupts = <1 13 0xf01>,
  228. <1 14 0xf01>,
  229. <1 11 0xf01>,
  230. <1 10 0xf01>;
  231. };
  232. timer0: timer0@ffc03000 {
  233. compatible = "snps,dw-apb-timer";
  234. interrupts = <0 113 4>;
  235. reg = <0xffc03000 0x100>;
  236. };
  237. timer1: timer1@ffc03100 {
  238. compatible = "snps,dw-apb-timer";
  239. interrupts = <0 114 4>;
  240. reg = <0xffc03100 0x100>;
  241. };
  242. timer2: timer2@ffd00000 {
  243. compatible = "snps,dw-apb-timer";
  244. interrupts = <0 115 4>;
  245. reg = <0xffd00000 0x100>;
  246. };
  247. timer3: timer3@ffd00100 {
  248. compatible = "snps,dw-apb-timer";
  249. interrupts = <0 116 4>;
  250. reg = <0xffd00100 0x100>;
  251. };
  252. uart0: serial0@ffc02000 {
  253. compatible = "snps,dw-apb-uart";
  254. reg = <0xffc02000 0x100>;
  255. interrupts = <0 108 4>;
  256. reg-shift = <2>;
  257. reg-io-width = <4>;
  258. status = "disabled";
  259. };
  260. uart1: serial1@ffc02100 {
  261. compatible = "snps,dw-apb-uart";
  262. reg = <0xffc02100 0x100>;
  263. interrupts = <0 109 4>;
  264. reg-shift = <2>;
  265. reg-io-width = <4>;
  266. status = "disabled";
  267. };
  268. usbphy0: usbphy@0 {
  269. #phy-cells = <0>;
  270. compatible = "usb-nop-xceiv";
  271. status = "okay";
  272. };
  273. usb0: usb@ffb00000 {
  274. compatible = "snps,dwc2";
  275. reg = <0xffb00000 0x40000>;
  276. interrupts = <0 93 4>;
  277. phys = <&usbphy0>;
  278. phy-names = "usb2-phy";
  279. status = "disabled";
  280. };
  281. usb1: usb@ffb40000 {
  282. compatible = "snps,dwc2";
  283. reg = <0xffb40000 0x40000>;
  284. interrupts = <0 94 4>;
  285. phys = <&usbphy0>;
  286. phy-names = "usb2-phy";
  287. status = "disabled";
  288. };
  289. watchdog0: watchdog@ffd00200 {
  290. compatible = "snps,dw-wdt";
  291. reg = <0xffd00200 0x100>;
  292. interrupts = <0 117 4>;
  293. status = "disabled";
  294. };
  295. watchdog1: watchdog@ffd00300 {
  296. compatible = "snps,dw-wdt";
  297. reg = <0xffd00300 0x100>;
  298. interrupts = <0 118 4>;
  299. status = "disabled";
  300. };
  301. watchdog2: watchdog@ffd00400 {
  302. compatible = "snps,dw-wdt";
  303. reg = <0xffd00400 0x100>;
  304. interrupts = <0 125 4>;
  305. status = "disabled";
  306. };
  307. watchdog3: watchdog@ffd00500 {
  308. compatible = "snps,dw-wdt";
  309. reg = <0xffd00500 0x100>;
  310. interrupts = <0 126 4>;
  311. status = "disabled";
  312. };
  313. };
  314. };