sys_regs_generic_v8.c 3.0 KB

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  1. /*
  2. * Copyright (C) 2012,2013 - ARM Ltd
  3. * Author: Marc Zyngier <marc.zyngier@arm.com>
  4. *
  5. * Based on arch/arm/kvm/coproc_a15.c:
  6. * Copyright (C) 2012 - Virtual Open Systems and Columbia University
  7. * Authors: Rusty Russell <rusty@rustcorp.au>
  8. * Christoffer Dall <c.dall@virtualopensystems.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License, version 2, as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  21. */
  22. #include <linux/kvm_host.h>
  23. #include <asm/cputype.h>
  24. #include <asm/kvm_arm.h>
  25. #include <asm/kvm_asm.h>
  26. #include <asm/kvm_host.h>
  27. #include <asm/kvm_emulate.h>
  28. #include <asm/kvm_coproc.h>
  29. #include <linux/init.h>
  30. #include "sys_regs.h"
  31. static bool access_actlr(struct kvm_vcpu *vcpu,
  32. struct sys_reg_params *p,
  33. const struct sys_reg_desc *r)
  34. {
  35. if (p->is_write)
  36. return ignore_write(vcpu, p);
  37. p->regval = vcpu_sys_reg(vcpu, ACTLR_EL1);
  38. return true;
  39. }
  40. static void reset_actlr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
  41. {
  42. u64 actlr;
  43. asm volatile("mrs %0, actlr_el1\n" : "=r" (actlr));
  44. vcpu_sys_reg(vcpu, ACTLR_EL1) = actlr;
  45. }
  46. /*
  47. * Implementation specific sys-reg registers.
  48. * Important: Must be sorted ascending by Op0, Op1, CRn, CRm, Op2
  49. */
  50. static const struct sys_reg_desc genericv8_sys_regs[] = {
  51. /* ACTLR_EL1 */
  52. { Op0(0b11), Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001),
  53. access_actlr, reset_actlr, ACTLR_EL1 },
  54. };
  55. static const struct sys_reg_desc genericv8_cp15_regs[] = {
  56. /* ACTLR */
  57. { Op1(0b000), CRn(0b0001), CRm(0b0000), Op2(0b001),
  58. access_actlr },
  59. };
  60. static struct kvm_sys_reg_target_table genericv8_target_table = {
  61. .table64 = {
  62. .table = genericv8_sys_regs,
  63. .num = ARRAY_SIZE(genericv8_sys_regs),
  64. },
  65. .table32 = {
  66. .table = genericv8_cp15_regs,
  67. .num = ARRAY_SIZE(genericv8_cp15_regs),
  68. },
  69. };
  70. static int __init sys_reg_genericv8_init(void)
  71. {
  72. unsigned int i;
  73. for (i = 1; i < ARRAY_SIZE(genericv8_sys_regs); i++)
  74. BUG_ON(cmp_sys_reg(&genericv8_sys_regs[i-1],
  75. &genericv8_sys_regs[i]) >= 0);
  76. kvm_register_target_sys_reg_table(KVM_ARM_TARGET_AEM_V8,
  77. &genericv8_target_table);
  78. kvm_register_target_sys_reg_table(KVM_ARM_TARGET_FOUNDATION_V8,
  79. &genericv8_target_table);
  80. kvm_register_target_sys_reg_table(KVM_ARM_TARGET_CORTEX_A53,
  81. &genericv8_target_table);
  82. kvm_register_target_sys_reg_table(KVM_ARM_TARGET_CORTEX_A57,
  83. &genericv8_target_table);
  84. kvm_register_target_sys_reg_table(KVM_ARM_TARGET_XGENE_POTENZA,
  85. &genericv8_target_table);
  86. kvm_register_target_sys_reg_table(KVM_ARM_TARGET_GENERIC_V8,
  87. &genericv8_target_table);
  88. return 0;
  89. }
  90. late_initcall(sys_reg_genericv8_init);