clock.c 6.5 KB

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  1. /*
  2. * Clock management for AT32AP CPUs
  3. *
  4. * Copyright (C) 2006 Atmel Corporation
  5. *
  6. * Based on arch/arm/mach-at91/clock.c
  7. * Copyright (C) 2005 David Brownell
  8. * Copyright (C) 2005 Ivan Kokshaysky
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/clk.h>
  15. #include <linux/err.h>
  16. #include <linux/export.h>
  17. #include <linux/device.h>
  18. #include <linux/string.h>
  19. #include <linux/list.h>
  20. #include <mach/chip.h>
  21. #include "clock.h"
  22. /* at32 clock list */
  23. static LIST_HEAD(at32_clock_list);
  24. static DEFINE_SPINLOCK(clk_lock);
  25. static DEFINE_SPINLOCK(clk_list_lock);
  26. void at32_clk_register(struct clk *clk)
  27. {
  28. spin_lock(&clk_list_lock);
  29. /* add the new item to the end of the list */
  30. list_add_tail(&clk->list, &at32_clock_list);
  31. spin_unlock(&clk_list_lock);
  32. }
  33. static struct clk *__clk_get(struct device *dev, const char *id)
  34. {
  35. struct clk *clk;
  36. list_for_each_entry(clk, &at32_clock_list, list) {
  37. if (clk->dev == dev && strcmp(id, clk->name) == 0) {
  38. return clk;
  39. }
  40. }
  41. return ERR_PTR(-ENOENT);
  42. }
  43. struct clk *clk_get(struct device *dev, const char *id)
  44. {
  45. struct clk *clk;
  46. spin_lock(&clk_list_lock);
  47. clk = __clk_get(dev, id);
  48. spin_unlock(&clk_list_lock);
  49. return clk;
  50. }
  51. EXPORT_SYMBOL(clk_get);
  52. void clk_put(struct clk *clk)
  53. {
  54. /* clocks are static for now, we can't free them */
  55. }
  56. EXPORT_SYMBOL(clk_put);
  57. static void __clk_enable(struct clk *clk)
  58. {
  59. if (clk->parent)
  60. __clk_enable(clk->parent);
  61. if (clk->users++ == 0 && clk->mode)
  62. clk->mode(clk, 1);
  63. }
  64. int clk_enable(struct clk *clk)
  65. {
  66. unsigned long flags;
  67. if (!clk)
  68. return 0;
  69. spin_lock_irqsave(&clk_lock, flags);
  70. __clk_enable(clk);
  71. spin_unlock_irqrestore(&clk_lock, flags);
  72. return 0;
  73. }
  74. EXPORT_SYMBOL(clk_enable);
  75. static void __clk_disable(struct clk *clk)
  76. {
  77. if (clk->users == 0) {
  78. printk(KERN_ERR "%s: mismatched disable\n", clk->name);
  79. WARN_ON(1);
  80. return;
  81. }
  82. if (--clk->users == 0 && clk->mode)
  83. clk->mode(clk, 0);
  84. if (clk->parent)
  85. __clk_disable(clk->parent);
  86. }
  87. void clk_disable(struct clk *clk)
  88. {
  89. unsigned long flags;
  90. if (IS_ERR_OR_NULL(clk))
  91. return;
  92. spin_lock_irqsave(&clk_lock, flags);
  93. __clk_disable(clk);
  94. spin_unlock_irqrestore(&clk_lock, flags);
  95. }
  96. EXPORT_SYMBOL(clk_disable);
  97. unsigned long clk_get_rate(struct clk *clk)
  98. {
  99. unsigned long flags;
  100. unsigned long rate;
  101. if (!clk)
  102. return 0;
  103. spin_lock_irqsave(&clk_lock, flags);
  104. rate = clk->get_rate(clk);
  105. spin_unlock_irqrestore(&clk_lock, flags);
  106. return rate;
  107. }
  108. EXPORT_SYMBOL(clk_get_rate);
  109. long clk_round_rate(struct clk *clk, unsigned long rate)
  110. {
  111. unsigned long flags, actual_rate;
  112. if (!clk)
  113. return 0;
  114. if (!clk->set_rate)
  115. return -ENOSYS;
  116. spin_lock_irqsave(&clk_lock, flags);
  117. actual_rate = clk->set_rate(clk, rate, 0);
  118. spin_unlock_irqrestore(&clk_lock, flags);
  119. return actual_rate;
  120. }
  121. EXPORT_SYMBOL(clk_round_rate);
  122. int clk_set_rate(struct clk *clk, unsigned long rate)
  123. {
  124. unsigned long flags;
  125. long ret;
  126. if (!clk)
  127. return 0;
  128. if (!clk->set_rate)
  129. return -ENOSYS;
  130. spin_lock_irqsave(&clk_lock, flags);
  131. ret = clk->set_rate(clk, rate, 1);
  132. spin_unlock_irqrestore(&clk_lock, flags);
  133. return (ret < 0) ? ret : 0;
  134. }
  135. EXPORT_SYMBOL(clk_set_rate);
  136. int clk_set_parent(struct clk *clk, struct clk *parent)
  137. {
  138. unsigned long flags;
  139. int ret;
  140. if (!clk)
  141. return 0;
  142. if (!clk->set_parent)
  143. return -ENOSYS;
  144. spin_lock_irqsave(&clk_lock, flags);
  145. ret = clk->set_parent(clk, parent);
  146. spin_unlock_irqrestore(&clk_lock, flags);
  147. return ret;
  148. }
  149. EXPORT_SYMBOL(clk_set_parent);
  150. struct clk *clk_get_parent(struct clk *clk)
  151. {
  152. return !clk ? NULL : clk->parent;
  153. }
  154. EXPORT_SYMBOL(clk_get_parent);
  155. #ifdef CONFIG_DEBUG_FS
  156. /* /sys/kernel/debug/at32ap_clk */
  157. #include <linux/io.h>
  158. #include <linux/debugfs.h>
  159. #include <linux/seq_file.h>
  160. #include "pm.h"
  161. #define NEST_DELTA 2
  162. #define NEST_MAX 6
  163. struct clkinf {
  164. struct seq_file *s;
  165. unsigned nest;
  166. };
  167. static void
  168. dump_clock(struct clk *parent, struct clkinf *r)
  169. {
  170. unsigned nest = r->nest;
  171. char buf[16 + NEST_MAX];
  172. struct clk *clk;
  173. unsigned i;
  174. /* skip clocks coupled to devices that aren't registered */
  175. if (parent->dev && !dev_name(parent->dev) && !parent->users)
  176. return;
  177. /* <nest spaces> name <pad to end> */
  178. memset(buf, ' ', sizeof(buf) - 1);
  179. buf[sizeof(buf) - 1] = 0;
  180. i = strlen(parent->name);
  181. memcpy(buf + nest, parent->name,
  182. min(i, (unsigned)(sizeof(buf) - 1 - nest)));
  183. seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz",
  184. buf, parent->set_parent ? '*' : ' ',
  185. parent->users,
  186. parent->users ? "on" : "off", /* NOTE: not-paranoid!! */
  187. clk_get_rate(parent));
  188. if (parent->dev)
  189. seq_printf(r->s, ", for %s", dev_name(parent->dev));
  190. seq_printf(r->s, "\n");
  191. /* cost of this scan is small, but not linear... */
  192. r->nest = nest + NEST_DELTA;
  193. list_for_each_entry(clk, &at32_clock_list, list) {
  194. if (clk->parent == parent)
  195. dump_clock(clk, r);
  196. }
  197. r->nest = nest;
  198. }
  199. static int clk_show(struct seq_file *s, void *unused)
  200. {
  201. struct clkinf r;
  202. int i;
  203. struct clk *clk;
  204. /* show all the power manager registers */
  205. seq_printf(s, "MCCTRL = %8x\n", pm_readl(MCCTRL));
  206. seq_printf(s, "CKSEL = %8x\n", pm_readl(CKSEL));
  207. seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK));
  208. seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK));
  209. seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK));
  210. seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK));
  211. seq_printf(s, "PLL0 = %8x\n", pm_readl(PLL0));
  212. seq_printf(s, "PLL1 = %8x\n", pm_readl(PLL1));
  213. seq_printf(s, "IMR = %8x\n", pm_readl(IMR));
  214. for (i = 0; i < 8; i++) {
  215. if (i == 5)
  216. continue;
  217. seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i)));
  218. }
  219. seq_printf(s, "\n");
  220. r.s = s;
  221. r.nest = 0;
  222. /* protected from changes on the list while dumping */
  223. spin_lock(&clk_list_lock);
  224. /* show clock tree as derived from the three oscillators */
  225. clk = __clk_get(NULL, "osc32k");
  226. dump_clock(clk, &r);
  227. clk_put(clk);
  228. clk = __clk_get(NULL, "osc0");
  229. dump_clock(clk, &r);
  230. clk_put(clk);
  231. clk = __clk_get(NULL, "osc1");
  232. dump_clock(clk, &r);
  233. clk_put(clk);
  234. spin_unlock(&clk_list_lock);
  235. return 0;
  236. }
  237. static int clk_open(struct inode *inode, struct file *file)
  238. {
  239. return single_open(file, clk_show, NULL);
  240. }
  241. static const struct file_operations clk_operations = {
  242. .open = clk_open,
  243. .read = seq_read,
  244. .llseek = seq_lseek,
  245. .release = single_release,
  246. };
  247. static int __init clk_debugfs_init(void)
  248. {
  249. (void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO,
  250. NULL, NULL, &clk_operations);
  251. return 0;
  252. }
  253. postcore_initcall(clk_debugfs_init);
  254. #endif