ezbrd.c 18 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/export.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/i2c.h>
  17. #include <linux/irq.h>
  18. #include <linux/interrupt.h>
  19. #include <asm/dma.h>
  20. #include <asm/bfin5xx_spi.h>
  21. #include <asm/reboot.h>
  22. #include <asm/portmux.h>
  23. #include <asm/dpmc.h>
  24. #include <asm/bfin_sdh.h>
  25. #include <linux/spi/ad7877.h>
  26. #include <net/dsa.h>
  27. /*
  28. * Name the Board for the /proc/cpuinfo
  29. */
  30. const char bfin_board_name[] = "ADI BF518F-EZBRD";
  31. /*
  32. * Driver needs to know address, irq and flag pin.
  33. */
  34. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  35. static struct mtd_partition ezbrd_partitions[] = {
  36. {
  37. .name = "bootloader(nor)",
  38. .size = 0x40000,
  39. .offset = 0,
  40. }, {
  41. .name = "linux kernel(nor)",
  42. .size = 0x1C0000,
  43. .offset = MTDPART_OFS_APPEND,
  44. }, {
  45. .name = "file system(nor)",
  46. .size = MTDPART_SIZ_FULL,
  47. .offset = MTDPART_OFS_APPEND,
  48. }
  49. };
  50. static struct physmap_flash_data ezbrd_flash_data = {
  51. .width = 2,
  52. .parts = ezbrd_partitions,
  53. .nr_parts = ARRAY_SIZE(ezbrd_partitions),
  54. };
  55. static struct resource ezbrd_flash_resource = {
  56. .start = 0x20000000,
  57. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  58. .end = 0x202fffff,
  59. #else
  60. .end = 0x203fffff,
  61. #endif
  62. .flags = IORESOURCE_MEM,
  63. };
  64. static struct platform_device ezbrd_flash_device = {
  65. .name = "physmap-flash",
  66. .id = 0,
  67. .dev = {
  68. .platform_data = &ezbrd_flash_data,
  69. },
  70. .num_resources = 1,
  71. .resource = &ezbrd_flash_resource,
  72. };
  73. #endif
  74. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  75. static struct platform_device rtc_device = {
  76. .name = "rtc-bfin",
  77. .id = -1,
  78. };
  79. #endif
  80. #if IS_ENABLED(CONFIG_BFIN_MAC)
  81. #include <linux/bfin_mac.h>
  82. static const unsigned short bfin_mac_peripherals[] = {
  83. P_MII0_ETxD0,
  84. P_MII0_ETxD1,
  85. P_MII0_ETxEN,
  86. P_MII0_ERxD0,
  87. P_MII0_ERxD1,
  88. P_MII0_TxCLK,
  89. P_MII0_PHYINT,
  90. P_MII0_CRS,
  91. P_MII0_MDC,
  92. P_MII0_MDIO,
  93. 0
  94. };
  95. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  96. {
  97. #if IS_ENABLED(CONFIG_NET_DSA_KSZ8893M)
  98. .addr = 3,
  99. #else
  100. .addr = 1,
  101. #endif
  102. .irq = IRQ_MAC_PHYINT,
  103. },
  104. };
  105. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  106. .phydev_number = 1,
  107. .phydev_data = bfin_phydev_data,
  108. .phy_mode = PHY_INTERFACE_MODE_MII,
  109. .mac_peripherals = bfin_mac_peripherals,
  110. #if IS_ENABLED(CONFIG_NET_DSA_KSZ8893M)
  111. .phy_mask = 0xfff7, /* Only probe the port phy connect to the on chip MAC */
  112. #endif
  113. .vlan1_mask = 1,
  114. .vlan2_mask = 2,
  115. };
  116. static struct platform_device bfin_mii_bus = {
  117. .name = "bfin_mii_bus",
  118. .dev = {
  119. .platform_data = &bfin_mii_bus_data,
  120. }
  121. };
  122. static struct platform_device bfin_mac_device = {
  123. .name = "bfin_mac",
  124. .dev = {
  125. .platform_data = &bfin_mii_bus,
  126. }
  127. };
  128. #if IS_ENABLED(CONFIG_NET_DSA_KSZ8893M)
  129. static struct dsa_chip_data ksz8893m_switch_chip_data = {
  130. .mii_bus = &bfin_mii_bus.dev,
  131. .port_names = {
  132. NULL,
  133. "eth%d",
  134. "eth%d",
  135. "cpu",
  136. },
  137. };
  138. static struct dsa_platform_data ksz8893m_switch_data = {
  139. .nr_chips = 1,
  140. .netdev = &bfin_mac_device.dev,
  141. .chip = &ksz8893m_switch_chip_data,
  142. };
  143. static struct platform_device ksz8893m_switch_device = {
  144. .name = "dsa",
  145. .id = 0,
  146. .num_resources = 0,
  147. .dev.platform_data = &ksz8893m_switch_data,
  148. };
  149. #endif
  150. #endif
  151. #if IS_ENABLED(CONFIG_MTD_M25P80)
  152. static struct mtd_partition bfin_spi_flash_partitions[] = {
  153. {
  154. .name = "bootloader(spi)",
  155. .size = 0x00040000,
  156. .offset = 0,
  157. .mask_flags = MTD_CAP_ROM
  158. }, {
  159. .name = "linux kernel(spi)",
  160. .size = MTDPART_SIZ_FULL,
  161. .offset = MTDPART_OFS_APPEND,
  162. }
  163. };
  164. static struct flash_platform_data bfin_spi_flash_data = {
  165. .name = "m25p80",
  166. .parts = bfin_spi_flash_partitions,
  167. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  168. .type = "m25p16",
  169. };
  170. /* SPI flash chip (m25p64) */
  171. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  172. .enable_dma = 0, /* use dma transfer with this chip*/
  173. };
  174. #endif
  175. #if IS_ENABLED(CONFIG_MMC_SPI)
  176. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  177. .enable_dma = 0,
  178. };
  179. #endif
  180. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
  181. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  182. .model = 7877,
  183. .vref_delay_usecs = 50, /* internal, no capacitor */
  184. .x_plate_ohms = 419,
  185. .y_plate_ohms = 486,
  186. .pressure_max = 1000,
  187. .pressure_min = 0,
  188. .stopacq_polarity = 1,
  189. .first_conversion_delay = 3,
  190. .acquisition_time = 1,
  191. .averaging = 1,
  192. .pen_down_acc_interval = 1,
  193. };
  194. #endif
  195. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  196. #if IS_ENABLED(CONFIG_MTD_M25P80)
  197. {
  198. /* the modalias must be the same as spi device driver name */
  199. .modalias = "m25p80", /* Name of spi_driver for this device */
  200. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  201. .bus_num = 0, /* Framework bus number */
  202. .chip_select = 2, /* On BF518F-EZBRD it's SPI0_SSEL2 */
  203. .platform_data = &bfin_spi_flash_data,
  204. .controller_data = &spi_flash_chip_info,
  205. .mode = SPI_MODE_3,
  206. },
  207. #endif
  208. #if IS_ENABLED(CONFIG_BFIN_MAC)
  209. #if IS_ENABLED(CONFIG_NET_DSA_KSZ8893M)
  210. {
  211. .modalias = "ksz8893m",
  212. .max_speed_hz = 5000000,
  213. .bus_num = 0,
  214. .chip_select = 1,
  215. .platform_data = NULL,
  216. .mode = SPI_MODE_3,
  217. },
  218. #endif
  219. #endif
  220. #if IS_ENABLED(CONFIG_MMC_SPI)
  221. {
  222. .modalias = "mmc_spi",
  223. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  224. .bus_num = 0,
  225. .chip_select = 5,
  226. .controller_data = &mmc_spi_chip_info,
  227. .mode = SPI_MODE_3,
  228. },
  229. #endif
  230. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
  231. {
  232. .modalias = "ad7877",
  233. .platform_data = &bfin_ad7877_ts_info,
  234. .irq = IRQ_PF8,
  235. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  236. .bus_num = 0,
  237. .chip_select = 2,
  238. },
  239. #endif
  240. #if IS_ENABLED(CONFIG_SND_SOC_WM8731) \
  241. && defined(CONFIG_SND_SOC_WM8731_SPI)
  242. {
  243. .modalias = "wm8731",
  244. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  245. .bus_num = 0,
  246. .chip_select = 5,
  247. .mode = SPI_MODE_0,
  248. },
  249. #endif
  250. #if IS_ENABLED(CONFIG_SPI_SPIDEV)
  251. {
  252. .modalias = "spidev",
  253. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  254. .bus_num = 0,
  255. .chip_select = 1,
  256. },
  257. #endif
  258. #if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
  259. {
  260. .modalias = "bfin-lq035q1-spi",
  261. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  262. .bus_num = 0,
  263. .chip_select = 1,
  264. .mode = SPI_CPHA | SPI_CPOL,
  265. },
  266. #endif
  267. };
  268. /* SPI controller data */
  269. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  270. /* SPI (0) */
  271. static struct bfin5xx_spi_master bfin_spi0_info = {
  272. .num_chipselect = 6,
  273. .enable_dma = 1, /* master has the ability to do dma transfer */
  274. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  275. };
  276. static struct resource bfin_spi0_resource[] = {
  277. [0] = {
  278. .start = SPI0_REGBASE,
  279. .end = SPI0_REGBASE + 0xFF,
  280. .flags = IORESOURCE_MEM,
  281. },
  282. [1] = {
  283. .start = CH_SPI0,
  284. .end = CH_SPI0,
  285. .flags = IORESOURCE_DMA,
  286. },
  287. [2] = {
  288. .start = IRQ_SPI0,
  289. .end = IRQ_SPI0,
  290. .flags = IORESOURCE_IRQ,
  291. },
  292. };
  293. static struct platform_device bfin_spi0_device = {
  294. .name = "bfin-spi",
  295. .id = 0, /* Bus number */
  296. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  297. .resource = bfin_spi0_resource,
  298. .dev = {
  299. .platform_data = &bfin_spi0_info, /* Passed to driver */
  300. },
  301. };
  302. /* SPI (1) */
  303. static struct bfin5xx_spi_master bfin_spi1_info = {
  304. .num_chipselect = 6,
  305. .enable_dma = 1, /* master has the ability to do dma transfer */
  306. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  307. };
  308. static struct resource bfin_spi1_resource[] = {
  309. [0] = {
  310. .start = SPI1_REGBASE,
  311. .end = SPI1_REGBASE + 0xFF,
  312. .flags = IORESOURCE_MEM,
  313. },
  314. [1] = {
  315. .start = CH_SPI1,
  316. .end = CH_SPI1,
  317. .flags = IORESOURCE_DMA,
  318. },
  319. [2] = {
  320. .start = IRQ_SPI1,
  321. .end = IRQ_SPI1,
  322. .flags = IORESOURCE_IRQ,
  323. },
  324. };
  325. static struct platform_device bfin_spi1_device = {
  326. .name = "bfin-spi",
  327. .id = 1, /* Bus number */
  328. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  329. .resource = bfin_spi1_resource,
  330. .dev = {
  331. .platform_data = &bfin_spi1_info, /* Passed to driver */
  332. },
  333. };
  334. #endif /* spi master and devices */
  335. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  336. #ifdef CONFIG_SERIAL_BFIN_UART0
  337. static struct resource bfin_uart0_resources[] = {
  338. {
  339. .start = UART0_THR,
  340. .end = UART0_GCTL+2,
  341. .flags = IORESOURCE_MEM,
  342. },
  343. {
  344. .start = IRQ_UART0_TX,
  345. .end = IRQ_UART0_TX,
  346. .flags = IORESOURCE_IRQ,
  347. },
  348. {
  349. .start = IRQ_UART0_RX,
  350. .end = IRQ_UART0_RX,
  351. .flags = IORESOURCE_IRQ,
  352. },
  353. {
  354. .start = IRQ_UART0_ERROR,
  355. .end = IRQ_UART0_ERROR,
  356. .flags = IORESOURCE_IRQ,
  357. },
  358. {
  359. .start = CH_UART0_TX,
  360. .end = CH_UART0_TX,
  361. .flags = IORESOURCE_DMA,
  362. },
  363. {
  364. .start = CH_UART0_RX,
  365. .end = CH_UART0_RX,
  366. .flags = IORESOURCE_DMA,
  367. },
  368. };
  369. static unsigned short bfin_uart0_peripherals[] = {
  370. P_UART0_TX, P_UART0_RX, 0
  371. };
  372. static struct platform_device bfin_uart0_device = {
  373. .name = "bfin-uart",
  374. .id = 0,
  375. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  376. .resource = bfin_uart0_resources,
  377. .dev = {
  378. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  379. },
  380. };
  381. #endif
  382. #ifdef CONFIG_SERIAL_BFIN_UART1
  383. static struct resource bfin_uart1_resources[] = {
  384. {
  385. .start = UART1_THR,
  386. .end = UART1_GCTL+2,
  387. .flags = IORESOURCE_MEM,
  388. },
  389. {
  390. .start = IRQ_UART1_TX,
  391. .end = IRQ_UART1_TX,
  392. .flags = IORESOURCE_IRQ,
  393. },
  394. {
  395. .start = IRQ_UART1_RX,
  396. .end = IRQ_UART1_RX,
  397. .flags = IORESOURCE_IRQ,
  398. },
  399. {
  400. .start = IRQ_UART1_ERROR,
  401. .end = IRQ_UART1_ERROR,
  402. .flags = IORESOURCE_IRQ,
  403. },
  404. {
  405. .start = CH_UART1_TX,
  406. .end = CH_UART1_TX,
  407. .flags = IORESOURCE_DMA,
  408. },
  409. {
  410. .start = CH_UART1_RX,
  411. .end = CH_UART1_RX,
  412. .flags = IORESOURCE_DMA,
  413. },
  414. };
  415. static unsigned short bfin_uart1_peripherals[] = {
  416. P_UART1_TX, P_UART1_RX, 0
  417. };
  418. static struct platform_device bfin_uart1_device = {
  419. .name = "bfin-uart",
  420. .id = 1,
  421. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  422. .resource = bfin_uart1_resources,
  423. .dev = {
  424. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  425. },
  426. };
  427. #endif
  428. #endif
  429. #if IS_ENABLED(CONFIG_BFIN_SIR)
  430. #ifdef CONFIG_BFIN_SIR0
  431. static struct resource bfin_sir0_resources[] = {
  432. {
  433. .start = 0xFFC00400,
  434. .end = 0xFFC004FF,
  435. .flags = IORESOURCE_MEM,
  436. },
  437. {
  438. .start = IRQ_UART0_RX,
  439. .end = IRQ_UART0_RX+1,
  440. .flags = IORESOURCE_IRQ,
  441. },
  442. {
  443. .start = CH_UART0_RX,
  444. .end = CH_UART0_RX+1,
  445. .flags = IORESOURCE_DMA,
  446. },
  447. };
  448. static struct platform_device bfin_sir0_device = {
  449. .name = "bfin_sir",
  450. .id = 0,
  451. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  452. .resource = bfin_sir0_resources,
  453. };
  454. #endif
  455. #ifdef CONFIG_BFIN_SIR1
  456. static struct resource bfin_sir1_resources[] = {
  457. {
  458. .start = 0xFFC02000,
  459. .end = 0xFFC020FF,
  460. .flags = IORESOURCE_MEM,
  461. },
  462. {
  463. .start = IRQ_UART1_RX,
  464. .end = IRQ_UART1_RX+1,
  465. .flags = IORESOURCE_IRQ,
  466. },
  467. {
  468. .start = CH_UART1_RX,
  469. .end = CH_UART1_RX+1,
  470. .flags = IORESOURCE_DMA,
  471. },
  472. };
  473. static struct platform_device bfin_sir1_device = {
  474. .name = "bfin_sir",
  475. .id = 1,
  476. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  477. .resource = bfin_sir1_resources,
  478. };
  479. #endif
  480. #endif
  481. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
  482. static struct platform_device bfin_i2s = {
  483. .name = "bfin-i2s",
  484. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  485. /* TODO: add platform data here */
  486. };
  487. #endif
  488. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  489. static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
  490. static struct resource bfin_twi0_resource[] = {
  491. [0] = {
  492. .start = TWI0_REGBASE,
  493. .end = TWI0_REGBASE,
  494. .flags = IORESOURCE_MEM,
  495. },
  496. [1] = {
  497. .start = IRQ_TWI,
  498. .end = IRQ_TWI,
  499. .flags = IORESOURCE_IRQ,
  500. },
  501. };
  502. static struct platform_device i2c_bfin_twi_device = {
  503. .name = "i2c-bfin-twi",
  504. .id = 0,
  505. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  506. .resource = bfin_twi0_resource,
  507. .dev = {
  508. .platform_data = &bfin_twi0_pins,
  509. },
  510. };
  511. #endif
  512. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  513. #if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
  514. {
  515. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  516. },
  517. #endif
  518. #if IS_ENABLED(CONFIG_INPUT_PCF8574)
  519. {
  520. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  521. .irq = IRQ_PF8,
  522. },
  523. #endif
  524. #if IS_ENABLED(CONFIG_SND_SOC_SSM2602)
  525. {
  526. I2C_BOARD_INFO("ssm2602", 0x1b),
  527. },
  528. #endif
  529. };
  530. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  531. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  532. static struct resource bfin_sport0_uart_resources[] = {
  533. {
  534. .start = SPORT0_TCR1,
  535. .end = SPORT0_MRCS3+4,
  536. .flags = IORESOURCE_MEM,
  537. },
  538. {
  539. .start = IRQ_SPORT0_RX,
  540. .end = IRQ_SPORT0_RX+1,
  541. .flags = IORESOURCE_IRQ,
  542. },
  543. {
  544. .start = IRQ_SPORT0_ERROR,
  545. .end = IRQ_SPORT0_ERROR,
  546. .flags = IORESOURCE_IRQ,
  547. },
  548. };
  549. static unsigned short bfin_sport0_peripherals[] = {
  550. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  551. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  552. };
  553. static struct platform_device bfin_sport0_uart_device = {
  554. .name = "bfin-sport-uart",
  555. .id = 0,
  556. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  557. .resource = bfin_sport0_uart_resources,
  558. .dev = {
  559. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  560. },
  561. };
  562. #endif
  563. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  564. static struct resource bfin_sport1_uart_resources[] = {
  565. {
  566. .start = SPORT1_TCR1,
  567. .end = SPORT1_MRCS3+4,
  568. .flags = IORESOURCE_MEM,
  569. },
  570. {
  571. .start = IRQ_SPORT1_RX,
  572. .end = IRQ_SPORT1_RX+1,
  573. .flags = IORESOURCE_IRQ,
  574. },
  575. {
  576. .start = IRQ_SPORT1_ERROR,
  577. .end = IRQ_SPORT1_ERROR,
  578. .flags = IORESOURCE_IRQ,
  579. },
  580. };
  581. static unsigned short bfin_sport1_peripherals[] = {
  582. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  583. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  584. };
  585. static struct platform_device bfin_sport1_uart_device = {
  586. .name = "bfin-sport-uart",
  587. .id = 1,
  588. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  589. .resource = bfin_sport1_uart_resources,
  590. .dev = {
  591. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  592. },
  593. };
  594. #endif
  595. #endif
  596. #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
  597. #include <linux/input.h>
  598. #include <linux/gpio_keys.h>
  599. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  600. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  601. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  602. };
  603. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  604. .buttons = bfin_gpio_keys_table,
  605. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  606. };
  607. static struct platform_device bfin_device_gpiokeys = {
  608. .name = "gpio-keys",
  609. .dev = {
  610. .platform_data = &bfin_gpio_keys_data,
  611. },
  612. };
  613. #endif
  614. #if IS_ENABLED(CONFIG_SDH_BFIN)
  615. static struct bfin_sd_host bfin_sdh_data = {
  616. .dma_chan = CH_RSI,
  617. .irq_int0 = IRQ_RSI_INT0,
  618. .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
  619. };
  620. static struct platform_device bf51x_sdh_device = {
  621. .name = "bfin-sdh",
  622. .id = 0,
  623. .dev = {
  624. .platform_data = &bfin_sdh_data,
  625. },
  626. };
  627. #endif
  628. static const unsigned int cclk_vlev_datasheet[] =
  629. {
  630. VRPAIR(VLEV_100, 400000000),
  631. VRPAIR(VLEV_105, 426000000),
  632. VRPAIR(VLEV_110, 500000000),
  633. VRPAIR(VLEV_115, 533000000),
  634. VRPAIR(VLEV_120, 600000000),
  635. };
  636. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  637. .tuple_tab = cclk_vlev_datasheet,
  638. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  639. .vr_settling_time = 25 /* us */,
  640. };
  641. static struct platform_device bfin_dpmc = {
  642. .name = "bfin dpmc",
  643. .dev = {
  644. .platform_data = &bfin_dmpc_vreg_data,
  645. },
  646. };
  647. static struct platform_device *stamp_devices[] __initdata = {
  648. &bfin_dpmc,
  649. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  650. &rtc_device,
  651. #endif
  652. #if IS_ENABLED(CONFIG_BFIN_MAC)
  653. &bfin_mii_bus,
  654. &bfin_mac_device,
  655. #if IS_ENABLED(CONFIG_NET_DSA_KSZ8893M)
  656. &ksz8893m_switch_device,
  657. #endif
  658. #endif
  659. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  660. &bfin_spi0_device,
  661. &bfin_spi1_device,
  662. #endif
  663. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  664. #ifdef CONFIG_SERIAL_BFIN_UART0
  665. &bfin_uart0_device,
  666. #endif
  667. #ifdef CONFIG_SERIAL_BFIN_UART1
  668. &bfin_uart1_device,
  669. #endif
  670. #endif
  671. #if IS_ENABLED(CONFIG_BFIN_SIR)
  672. #ifdef CONFIG_BFIN_SIR0
  673. &bfin_sir0_device,
  674. #endif
  675. #ifdef CONFIG_BFIN_SIR1
  676. &bfin_sir1_device,
  677. #endif
  678. #endif
  679. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  680. &i2c_bfin_twi_device,
  681. #endif
  682. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
  683. &bfin_i2s,
  684. #endif
  685. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  686. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  687. &bfin_sport0_uart_device,
  688. #endif
  689. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  690. &bfin_sport1_uart_device,
  691. #endif
  692. #endif
  693. #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
  694. &bfin_device_gpiokeys,
  695. #endif
  696. #if IS_ENABLED(CONFIG_SDH_BFIN)
  697. &bf51x_sdh_device,
  698. #endif
  699. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  700. &ezbrd_flash_device,
  701. #endif
  702. };
  703. static int __init ezbrd_init(void)
  704. {
  705. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  706. i2c_register_board_info(0, bfin_i2c_board_info,
  707. ARRAY_SIZE(bfin_i2c_board_info));
  708. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  709. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  710. /* setup BF518-EZBRD GPIO pin PG11 to AMS2, PG15 to AMS3. */
  711. peripheral_request(P_AMS2, "ParaFlash");
  712. #if !IS_ENABLED(CONFIG_SPI_BFIN5XX)
  713. peripheral_request(P_AMS3, "ParaFlash");
  714. #endif
  715. return 0;
  716. }
  717. arch_initcall(ezbrd_init);
  718. static struct platform_device *ezbrd_early_devices[] __initdata = {
  719. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  720. #ifdef CONFIG_SERIAL_BFIN_UART0
  721. &bfin_uart0_device,
  722. #endif
  723. #ifdef CONFIG_SERIAL_BFIN_UART1
  724. &bfin_uart1_device,
  725. #endif
  726. #endif
  727. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  728. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  729. &bfin_sport0_uart_device,
  730. #endif
  731. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  732. &bfin_sport1_uart_device,
  733. #endif
  734. #endif
  735. };
  736. void __init native_machine_early_platform_add_devices(void)
  737. {
  738. printk(KERN_INFO "register early platform devices\n");
  739. early_platform_add_devices(ezbrd_early_devices,
  740. ARRAY_SIZE(ezbrd_early_devices));
  741. }
  742. void native_machine_restart(char *cmd)
  743. {
  744. /* workaround reboot hang when booting from SPI */
  745. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  746. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  747. }
  748. int bfin_get_ether_addr(char *addr)
  749. {
  750. /* the MAC is stored in OTP memory page 0xDF */
  751. u32 ret;
  752. u64 otp_mac;
  753. u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
  754. ret = otp_read(0xDF, 0x00, &otp_mac);
  755. if (!(ret & 0x1)) {
  756. char *otp_mac_p = (char *)&otp_mac;
  757. for (ret = 0; ret < 6; ++ret)
  758. addr[ret] = otp_mac_p[5 - ret];
  759. }
  760. return 0;
  761. }
  762. EXPORT_SYMBOL(bfin_get_ether_addr);