ad7160eval.c 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868
  1. /*
  2. * Copyright 2004-20010 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/export.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/i2c.h>
  17. #include <linux/irq.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/usb/musb.h>
  20. #include <linux/leds.h>
  21. #include <linux/input.h>
  22. #include <asm/dma.h>
  23. #include <asm/bfin5xx_spi.h>
  24. #include <asm/reboot.h>
  25. #include <asm/nand.h>
  26. #include <asm/portmux.h>
  27. #include <asm/dpmc.h>
  28. /*
  29. * Name the Board for the /proc/cpuinfo
  30. */
  31. const char bfin_board_name[] = "ADI BF527-AD7160EVAL";
  32. /*
  33. * Driver needs to know address, irq and flag pin.
  34. */
  35. #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
  36. static struct resource musb_resources[] = {
  37. [0] = {
  38. .start = 0xffc03800,
  39. .end = 0xffc03cff,
  40. .flags = IORESOURCE_MEM,
  41. },
  42. [1] = { /* general IRQ */
  43. .start = IRQ_USB_INT0,
  44. .end = IRQ_USB_INT0,
  45. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  46. },
  47. [2] = { /* DMA IRQ */
  48. .start = IRQ_USB_DMA,
  49. .end = IRQ_USB_DMA,
  50. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  51. },
  52. };
  53. static struct musb_hdrc_config musb_config = {
  54. .multipoint = 0,
  55. .dyn_fifo = 0,
  56. .soft_con = 1,
  57. .dma = 1,
  58. .num_eps = 8,
  59. .dma_channels = 8,
  60. .gpio_vrsel = GPIO_PG13,
  61. /* Some custom boards need to be active low, just set it to "0"
  62. * if it is the case.
  63. */
  64. .gpio_vrsel_active = 1,
  65. .clkin = 24, /* musb CLKIN in MHZ */
  66. };
  67. static struct musb_hdrc_platform_data musb_plat = {
  68. #if defined(CONFIG_USB_MUSB_OTG)
  69. .mode = MUSB_OTG,
  70. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  71. .mode = MUSB_HOST,
  72. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  73. .mode = MUSB_PERIPHERAL,
  74. #endif
  75. .config = &musb_config,
  76. };
  77. static u64 musb_dmamask = ~(u32)0;
  78. static struct platform_device musb_device = {
  79. .name = "musb-blackfin",
  80. .id = 0,
  81. .dev = {
  82. .dma_mask = &musb_dmamask,
  83. .coherent_dma_mask = 0xffffffff,
  84. .platform_data = &musb_plat,
  85. },
  86. .num_resources = ARRAY_SIZE(musb_resources),
  87. .resource = musb_resources,
  88. };
  89. #endif
  90. #if IS_ENABLED(CONFIG_FB_BFIN_RA158Z)
  91. static struct resource bf52x_ra158z_resources[] = {
  92. {
  93. .start = IRQ_PPI_ERROR,
  94. .end = IRQ_PPI_ERROR,
  95. .flags = IORESOURCE_IRQ,
  96. },
  97. };
  98. static struct platform_device bf52x_ra158z_device = {
  99. .name = "bfin-ra158z",
  100. .id = -1,
  101. .num_resources = ARRAY_SIZE(bf52x_ra158z_resources),
  102. .resource = bf52x_ra158z_resources,
  103. };
  104. #endif
  105. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  106. static struct mtd_partition ad7160eval_partitions[] = {
  107. {
  108. .name = "bootloader(nor)",
  109. .size = 0x40000,
  110. .offset = 0,
  111. }, {
  112. .name = "linux kernel(nor)",
  113. .size = 0x1C0000,
  114. .offset = MTDPART_OFS_APPEND,
  115. }, {
  116. .name = "file system(nor)",
  117. .size = MTDPART_SIZ_FULL,
  118. .offset = MTDPART_OFS_APPEND,
  119. }
  120. };
  121. static struct physmap_flash_data ad7160eval_flash_data = {
  122. .width = 2,
  123. .parts = ad7160eval_partitions,
  124. .nr_parts = ARRAY_SIZE(ad7160eval_partitions),
  125. };
  126. static struct resource ad7160eval_flash_resource = {
  127. .start = 0x20000000,
  128. .end = 0x203fffff,
  129. .flags = IORESOURCE_MEM,
  130. };
  131. static struct platform_device ad7160eval_flash_device = {
  132. .name = "physmap-flash",
  133. .id = 0,
  134. .dev = {
  135. .platform_data = &ad7160eval_flash_data,
  136. },
  137. .num_resources = 1,
  138. .resource = &ad7160eval_flash_resource,
  139. };
  140. #endif
  141. #if IS_ENABLED(CONFIG_MTD_NAND_BF5XX)
  142. static struct mtd_partition partition_info[] = {
  143. {
  144. .name = "linux kernel(nand)",
  145. .offset = 0,
  146. .size = 4 * 1024 * 1024,
  147. },
  148. {
  149. .name = "file system(nand)",
  150. .offset = MTDPART_OFS_APPEND,
  151. .size = MTDPART_SIZ_FULL,
  152. },
  153. };
  154. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  155. .data_width = NFC_NWIDTH_8,
  156. .partitions = partition_info,
  157. .nr_partitions = ARRAY_SIZE(partition_info),
  158. .rd_dly = 3,
  159. .wr_dly = 3,
  160. };
  161. static struct resource bf5xx_nand_resources[] = {
  162. {
  163. .start = NFC_CTL,
  164. .end = NFC_DATA_RD + 2,
  165. .flags = IORESOURCE_MEM,
  166. },
  167. {
  168. .start = CH_NFC,
  169. .end = CH_NFC,
  170. .flags = IORESOURCE_IRQ,
  171. },
  172. };
  173. static struct platform_device bf5xx_nand_device = {
  174. .name = "bf5xx-nand",
  175. .id = 0,
  176. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  177. .resource = bf5xx_nand_resources,
  178. .dev = {
  179. .platform_data = &bf5xx_nand_platform,
  180. },
  181. };
  182. #endif
  183. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  184. static struct platform_device rtc_device = {
  185. .name = "rtc-bfin",
  186. .id = -1,
  187. };
  188. #endif
  189. #if IS_ENABLED(CONFIG_BFIN_MAC)
  190. #include <linux/bfin_mac.h>
  191. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  192. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  193. {
  194. .addr = 1,
  195. .irq = IRQ_MAC_PHYINT,
  196. },
  197. };
  198. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  199. .phydev_number = 1,
  200. .phydev_data = bfin_phydev_data,
  201. .phy_mode = PHY_INTERFACE_MODE_RMII,
  202. .mac_peripherals = bfin_mac_peripherals,
  203. };
  204. static struct platform_device bfin_mii_bus = {
  205. .name = "bfin_mii_bus",
  206. .dev = {
  207. .platform_data = &bfin_mii_bus_data,
  208. }
  209. };
  210. static struct platform_device bfin_mac_device = {
  211. .name = "bfin_mac",
  212. .dev = {
  213. .platform_data = &bfin_mii_bus,
  214. }
  215. };
  216. #endif
  217. #if IS_ENABLED(CONFIG_MTD_M25P80)
  218. static struct mtd_partition bfin_spi_flash_partitions[] = {
  219. {
  220. .name = "bootloader(spi)",
  221. .size = 0x00040000,
  222. .offset = 0,
  223. .mask_flags = MTD_CAP_ROM
  224. }, {
  225. .name = "linux kernel(spi)",
  226. .size = MTDPART_SIZ_FULL,
  227. .offset = MTDPART_OFS_APPEND,
  228. }
  229. };
  230. static struct flash_platform_data bfin_spi_flash_data = {
  231. .name = "m25p80",
  232. .parts = bfin_spi_flash_partitions,
  233. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  234. .type = "m25p16",
  235. };
  236. /* SPI flash chip (m25p64) */
  237. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  238. .enable_dma = 0, /* use dma transfer with this chip*/
  239. };
  240. #endif
  241. #if IS_ENABLED(CONFIG_MMC_SPI)
  242. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  243. .enable_dma = 0,
  244. };
  245. #endif
  246. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
  247. static struct platform_device bfin_i2s = {
  248. .name = "bfin-i2s",
  249. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  250. /* TODO: add platform data here */
  251. };
  252. #endif
  253. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  254. #if IS_ENABLED(CONFIG_MTD_M25P80)
  255. {
  256. /* the modalias must be the same as spi device driver name */
  257. .modalias = "m25p80", /* Name of spi_driver for this device */
  258. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  259. .bus_num = 0, /* Framework bus number */
  260. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  261. .platform_data = &bfin_spi_flash_data,
  262. .controller_data = &spi_flash_chip_info,
  263. .mode = SPI_MODE_3,
  264. },
  265. #endif
  266. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
  267. {
  268. .modalias = "ad183x",
  269. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  270. .bus_num = 0,
  271. .chip_select = 4,
  272. },
  273. #endif
  274. #if IS_ENABLED(CONFIG_MMC_SPI)
  275. {
  276. .modalias = "mmc_spi",
  277. .max_speed_hz = 30000000, /* max spi clock (SCK) speed in HZ */
  278. .bus_num = 0,
  279. .chip_select = GPIO_PH3 + MAX_CTRL_CS,
  280. .controller_data = &mmc_spi_chip_info,
  281. .mode = SPI_MODE_3,
  282. },
  283. #endif
  284. #if IS_ENABLED(CONFIG_SPI_SPIDEV)
  285. {
  286. .modalias = "spidev",
  287. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  288. .bus_num = 0,
  289. .chip_select = 1,
  290. },
  291. #endif
  292. };
  293. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  294. /* SPI controller data */
  295. static struct bfin5xx_spi_master bfin_spi0_info = {
  296. .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
  297. .enable_dma = 1, /* master has the ability to do dma transfer */
  298. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  299. };
  300. /* SPI (0) */
  301. static struct resource bfin_spi0_resource[] = {
  302. [0] = {
  303. .start = SPI0_REGBASE,
  304. .end = SPI0_REGBASE + 0xFF,
  305. .flags = IORESOURCE_MEM,
  306. },
  307. [1] = {
  308. .start = CH_SPI,
  309. .end = CH_SPI,
  310. .flags = IORESOURCE_DMA,
  311. },
  312. [2] = {
  313. .start = IRQ_SPI,
  314. .end = IRQ_SPI,
  315. .flags = IORESOURCE_IRQ,
  316. },
  317. };
  318. static struct platform_device bfin_spi0_device = {
  319. .name = "bfin-spi",
  320. .id = 0, /* Bus number */
  321. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  322. .resource = bfin_spi0_resource,
  323. .dev = {
  324. .platform_data = &bfin_spi0_info, /* Passed to driver */
  325. },
  326. };
  327. #endif /* spi master and devices */
  328. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  329. #ifdef CONFIG_SERIAL_BFIN_UART0
  330. static struct resource bfin_uart0_resources[] = {
  331. {
  332. .start = UART0_THR,
  333. .end = UART0_GCTL+2,
  334. .flags = IORESOURCE_MEM,
  335. },
  336. {
  337. .start = IRQ_UART0_TX,
  338. .end = IRQ_UART0_TX,
  339. .flags = IORESOURCE_IRQ,
  340. },
  341. {
  342. .start = IRQ_UART0_RX,
  343. .end = IRQ_UART0_RX,
  344. .flags = IORESOURCE_IRQ,
  345. },
  346. {
  347. .start = IRQ_UART0_ERROR,
  348. .end = IRQ_UART0_ERROR,
  349. .flags = IORESOURCE_IRQ,
  350. },
  351. {
  352. .start = CH_UART0_TX,
  353. .end = CH_UART0_TX,
  354. .flags = IORESOURCE_DMA,
  355. },
  356. {
  357. .start = CH_UART0_RX,
  358. .end = CH_UART0_RX,
  359. .flags = IORESOURCE_DMA,
  360. },
  361. };
  362. static unsigned short bfin_uart0_peripherals[] = {
  363. P_UART0_TX, P_UART0_RX, 0
  364. };
  365. static struct platform_device bfin_uart0_device = {
  366. .name = "bfin-uart",
  367. .id = 0,
  368. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  369. .resource = bfin_uart0_resources,
  370. .dev = {
  371. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  372. },
  373. };
  374. #endif
  375. #ifdef CONFIG_SERIAL_BFIN_UART1
  376. static struct resource bfin_uart1_resources[] = {
  377. {
  378. .start = UART1_THR,
  379. .end = UART1_GCTL+2,
  380. .flags = IORESOURCE_MEM,
  381. },
  382. {
  383. .start = IRQ_UART1_TX,
  384. .end = IRQ_UART1_TX,
  385. .flags = IORESOURCE_IRQ,
  386. },
  387. {
  388. .start = IRQ_UART1_RX,
  389. .end = IRQ_UART1_RX,
  390. .flags = IORESOURCE_IRQ,
  391. },
  392. {
  393. .start = IRQ_UART1_ERROR,
  394. .end = IRQ_UART1_ERROR,
  395. .flags = IORESOURCE_IRQ,
  396. },
  397. {
  398. .start = CH_UART1_TX,
  399. .end = CH_UART1_TX,
  400. .flags = IORESOURCE_DMA,
  401. },
  402. {
  403. .start = CH_UART1_RX,
  404. .end = CH_UART1_RX,
  405. .flags = IORESOURCE_DMA,
  406. },
  407. #ifdef CONFIG_BFIN_UART1_CTSRTS
  408. { /* CTS pin */
  409. .start = GPIO_PF9,
  410. .end = GPIO_PF9,
  411. .flags = IORESOURCE_IO,
  412. },
  413. { /* RTS pin */
  414. .start = GPIO_PF10,
  415. .end = GPIO_PF10,
  416. .flags = IORESOURCE_IO,
  417. },
  418. #endif
  419. };
  420. static unsigned short bfin_uart1_peripherals[] = {
  421. P_UART1_TX, P_UART1_RX, 0
  422. };
  423. static struct platform_device bfin_uart1_device = {
  424. .name = "bfin-uart",
  425. .id = 1,
  426. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  427. .resource = bfin_uart1_resources,
  428. .dev = {
  429. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  430. },
  431. };
  432. #endif
  433. #endif
  434. #if IS_ENABLED(CONFIG_BFIN_SIR)
  435. #ifdef CONFIG_BFIN_SIR0
  436. static struct resource bfin_sir0_resources[] = {
  437. {
  438. .start = 0xFFC00400,
  439. .end = 0xFFC004FF,
  440. .flags = IORESOURCE_MEM,
  441. },
  442. {
  443. .start = IRQ_UART0_RX,
  444. .end = IRQ_UART0_RX+1,
  445. .flags = IORESOURCE_IRQ,
  446. },
  447. {
  448. .start = CH_UART0_RX,
  449. .end = CH_UART0_RX+1,
  450. .flags = IORESOURCE_DMA,
  451. },
  452. };
  453. static struct platform_device bfin_sir0_device = {
  454. .name = "bfin_sir",
  455. .id = 0,
  456. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  457. .resource = bfin_sir0_resources,
  458. };
  459. #endif
  460. #ifdef CONFIG_BFIN_SIR1
  461. static struct resource bfin_sir1_resources[] = {
  462. {
  463. .start = 0xFFC02000,
  464. .end = 0xFFC020FF,
  465. .flags = IORESOURCE_MEM,
  466. },
  467. {
  468. .start = IRQ_UART1_RX,
  469. .end = IRQ_UART1_RX+1,
  470. .flags = IORESOURCE_IRQ,
  471. },
  472. {
  473. .start = CH_UART1_RX,
  474. .end = CH_UART1_RX+1,
  475. .flags = IORESOURCE_DMA,
  476. },
  477. };
  478. static struct platform_device bfin_sir1_device = {
  479. .name = "bfin_sir",
  480. .id = 1,
  481. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  482. .resource = bfin_sir1_resources,
  483. };
  484. #endif
  485. #endif
  486. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7160)
  487. #include <linux/input/ad7160.h>
  488. static const struct ad7160_platform_data bfin_ad7160_ts_info = {
  489. .sensor_x_res = 854,
  490. .sensor_y_res = 480,
  491. .pressure = 100,
  492. .filter_coef = 3,
  493. .coord_pref = AD7160_ORIG_TOP_LEFT,
  494. .first_touch_window = 5,
  495. .move_window = 3,
  496. .event_cabs = AD7160_EMIT_ABS_MT_TRACKING_ID |
  497. AD7160_EMIT_ABS_MT_PRESSURE |
  498. AD7160_TRACKING_ID_ASCENDING,
  499. .finger_act_ctrl = 0x64,
  500. .haptic_effect1_ctrl = AD7160_HAPTIC_SLOT_A(60) |
  501. AD7160_HAPTIC_SLOT_A_LVL_HIGH |
  502. AD7160_HAPTIC_SLOT_B(60) |
  503. AD7160_HAPTIC_SLOT_B_LVL_LOW,
  504. .haptic_effect2_ctrl = AD7160_HAPTIC_SLOT_A(20) |
  505. AD7160_HAPTIC_SLOT_A_LVL_HIGH |
  506. AD7160_HAPTIC_SLOT_B(80) |
  507. AD7160_HAPTIC_SLOT_B_LVL_LOW |
  508. AD7160_HAPTIC_SLOT_C(120) |
  509. AD7160_HAPTIC_SLOT_C_LVL_HIGH |
  510. AD7160_HAPTIC_SLOT_D(30) |
  511. AD7160_HAPTIC_SLOT_D_LVL_LOW,
  512. };
  513. #endif
  514. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  515. static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
  516. static struct resource bfin_twi0_resource[] = {
  517. [0] = {
  518. .start = TWI0_REGBASE,
  519. .end = TWI0_REGBASE,
  520. .flags = IORESOURCE_MEM,
  521. },
  522. [1] = {
  523. .start = IRQ_TWI,
  524. .end = IRQ_TWI,
  525. .flags = IORESOURCE_IRQ,
  526. },
  527. };
  528. static struct platform_device i2c_bfin_twi_device = {
  529. .name = "i2c-bfin-twi",
  530. .id = 0,
  531. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  532. .resource = bfin_twi0_resource,
  533. .dev = {
  534. .platform_data = &bfin_twi0_pins,
  535. },
  536. };
  537. #endif
  538. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  539. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7160)
  540. {
  541. I2C_BOARD_INFO("ad7160", 0x33),
  542. .irq = IRQ_PH1,
  543. .platform_data = (void *)&bfin_ad7160_ts_info,
  544. },
  545. #endif
  546. };
  547. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  548. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  549. static struct resource bfin_sport0_uart_resources[] = {
  550. {
  551. .start = SPORT0_TCR1,
  552. .end = SPORT0_MRCS3+4,
  553. .flags = IORESOURCE_MEM,
  554. },
  555. {
  556. .start = IRQ_SPORT0_RX,
  557. .end = IRQ_SPORT0_RX+1,
  558. .flags = IORESOURCE_IRQ,
  559. },
  560. {
  561. .start = IRQ_SPORT0_ERROR,
  562. .end = IRQ_SPORT0_ERROR,
  563. .flags = IORESOURCE_IRQ,
  564. },
  565. };
  566. static unsigned short bfin_sport0_peripherals[] = {
  567. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  568. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  569. };
  570. static struct platform_device bfin_sport0_uart_device = {
  571. .name = "bfin-sport-uart",
  572. .id = 0,
  573. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  574. .resource = bfin_sport0_uart_resources,
  575. .dev = {
  576. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  577. },
  578. };
  579. #endif
  580. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  581. static struct resource bfin_sport1_uart_resources[] = {
  582. {
  583. .start = SPORT1_TCR1,
  584. .end = SPORT1_MRCS3+4,
  585. .flags = IORESOURCE_MEM,
  586. },
  587. {
  588. .start = IRQ_SPORT1_RX,
  589. .end = IRQ_SPORT1_RX+1,
  590. .flags = IORESOURCE_IRQ,
  591. },
  592. {
  593. .start = IRQ_SPORT1_ERROR,
  594. .end = IRQ_SPORT1_ERROR,
  595. .flags = IORESOURCE_IRQ,
  596. },
  597. };
  598. static unsigned short bfin_sport1_peripherals[] = {
  599. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  600. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  601. };
  602. static struct platform_device bfin_sport1_uart_device = {
  603. .name = "bfin-sport-uart",
  604. .id = 1,
  605. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  606. .resource = bfin_sport1_uart_resources,
  607. .dev = {
  608. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  609. },
  610. };
  611. #endif
  612. #endif
  613. #if IS_ENABLED(CONFIG_INPUT_BFIN_ROTARY)
  614. #include <linux/platform_data/bfin_rotary.h>
  615. static const u16 per_cnt[] = {
  616. P_CNT_CUD,
  617. P_CNT_CDG,
  618. P_CNT_CZM,
  619. 0
  620. };
  621. static struct bfin_rotary_platform_data bfin_rotary_data = {
  622. /*.rotary_up_key = KEY_UP,*/
  623. /*.rotary_down_key = KEY_DOWN,*/
  624. .rotary_rel_code = REL_WHEEL,
  625. .rotary_button_key = KEY_ENTER,
  626. .debounce = 10, /* 0..17 */
  627. .mode = ROT_QUAD_ENC | ROT_DEBE,
  628. .pm_wakeup = 1,
  629. .pin_list = per_cnt,
  630. };
  631. static struct resource bfin_rotary_resources[] = {
  632. {
  633. .start = CNT_CONFIG,
  634. .end = CNT_CONFIG + 0xff,
  635. .flags = IORESOURCE_MEM,
  636. },
  637. {
  638. .start = IRQ_CNT,
  639. .end = IRQ_CNT,
  640. .flags = IORESOURCE_IRQ,
  641. },
  642. };
  643. static struct platform_device bfin_rotary_device = {
  644. .name = "bfin-rotary",
  645. .id = -1,
  646. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  647. .resource = bfin_rotary_resources,
  648. .dev = {
  649. .platform_data = &bfin_rotary_data,
  650. },
  651. };
  652. #endif
  653. static const unsigned int cclk_vlev_datasheet[] = {
  654. VRPAIR(VLEV_100, 400000000),
  655. VRPAIR(VLEV_105, 426000000),
  656. VRPAIR(VLEV_110, 500000000),
  657. VRPAIR(VLEV_115, 533000000),
  658. VRPAIR(VLEV_120, 600000000),
  659. };
  660. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  661. .tuple_tab = cclk_vlev_datasheet,
  662. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  663. .vr_settling_time = 25 /* us */,
  664. };
  665. static struct platform_device bfin_dpmc = {
  666. .name = "bfin dpmc",
  667. .dev = {
  668. .platform_data = &bfin_dmpc_vreg_data,
  669. },
  670. };
  671. static struct platform_device *stamp_devices[] __initdata = {
  672. &bfin_dpmc,
  673. #if IS_ENABLED(CONFIG_MTD_NAND_BF5XX)
  674. &bf5xx_nand_device,
  675. #endif
  676. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  677. &rtc_device,
  678. #endif
  679. #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
  680. &musb_device,
  681. #endif
  682. #if IS_ENABLED(CONFIG_BFIN_MAC)
  683. &bfin_mii_bus,
  684. &bfin_mac_device,
  685. #endif
  686. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  687. &bfin_spi0_device,
  688. #endif
  689. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  690. #ifdef CONFIG_SERIAL_BFIN_UART0
  691. &bfin_uart0_device,
  692. #endif
  693. #ifdef CONFIG_SERIAL_BFIN_UART1
  694. &bfin_uart1_device,
  695. #endif
  696. #endif
  697. #if IS_ENABLED(CONFIG_FB_BFIN_RA158Z)
  698. &bf52x_ra158z_device,
  699. #endif
  700. #if IS_ENABLED(CONFIG_BFIN_SIR)
  701. #ifdef CONFIG_BFIN_SIR0
  702. &bfin_sir0_device,
  703. #endif
  704. #ifdef CONFIG_BFIN_SIR1
  705. &bfin_sir1_device,
  706. #endif
  707. #endif
  708. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  709. &i2c_bfin_twi_device,
  710. #endif
  711. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  712. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  713. &bfin_sport0_uart_device,
  714. #endif
  715. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  716. &bfin_sport1_uart_device,
  717. #endif
  718. #endif
  719. #if IS_ENABLED(CONFIG_INPUT_BFIN_ROTARY)
  720. &bfin_rotary_device,
  721. #endif
  722. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  723. &ad7160eval_flash_device,
  724. #endif
  725. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
  726. &bfin_i2s,
  727. #endif
  728. };
  729. static int __init ad7160eval_init(void)
  730. {
  731. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  732. i2c_register_board_info(0, bfin_i2c_board_info,
  733. ARRAY_SIZE(bfin_i2c_board_info));
  734. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  735. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  736. return 0;
  737. }
  738. arch_initcall(ad7160eval_init);
  739. static struct platform_device *ad7160eval_early_devices[] __initdata = {
  740. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  741. #ifdef CONFIG_SERIAL_BFIN_UART0
  742. &bfin_uart0_device,
  743. #endif
  744. #ifdef CONFIG_SERIAL_BFIN_UART1
  745. &bfin_uart1_device,
  746. #endif
  747. #endif
  748. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  749. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  750. &bfin_sport0_uart_device,
  751. #endif
  752. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  753. &bfin_sport1_uart_device,
  754. #endif
  755. #endif
  756. };
  757. void __init native_machine_early_platform_add_devices(void)
  758. {
  759. printk(KERN_INFO "register early platform devices\n");
  760. early_platform_add_devices(ad7160eval_early_devices,
  761. ARRAY_SIZE(ad7160eval_early_devices));
  762. }
  763. void native_machine_restart(char *cmd)
  764. {
  765. /* workaround reboot hang when booting from SPI */
  766. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  767. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  768. }
  769. int bfin_get_ether_addr(char *addr)
  770. {
  771. /* the MAC is stored in OTP memory page 0xDF */
  772. u32 ret;
  773. u64 otp_mac;
  774. u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
  775. ret = otp_read(0xDF, 0x00, &otp_mac);
  776. if (!(ret & 0x1)) {
  777. char *otp_mac_p = (char *)&otp_mac;
  778. for (ret = 0; ret < 6; ++ret)
  779. addr[ret] = otp_mac_p[5 - ret];
  780. }
  781. return 0;
  782. }
  783. EXPORT_SYMBOL(bfin_get_ether_addr);