cm_bf527.c 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992
  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/export.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/partitions.h>
  14. #include <linux/mtd/physmap.h>
  15. #include <linux/spi/spi.h>
  16. #include <linux/spi/flash.h>
  17. #include <linux/etherdevice.h>
  18. #include <linux/i2c.h>
  19. #include <linux/irq.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/usb/musb.h>
  22. #include <asm/dma.h>
  23. #include <asm/bfin5xx_spi.h>
  24. #include <asm/reboot.h>
  25. #include <asm/nand.h>
  26. #include <asm/portmux.h>
  27. #include <asm/dpmc.h>
  28. #include <linux/spi/ad7877.h>
  29. /*
  30. * Name the Board for the /proc/cpuinfo
  31. */
  32. const char bfin_board_name[] = "Bluetechnix CM-BF527";
  33. /*
  34. * Driver needs to know address, irq and flag pin.
  35. */
  36. #if IS_ENABLED(CONFIG_USB_ISP1760_HCD)
  37. #include <linux/usb/isp1760.h>
  38. static struct resource bfin_isp1760_resources[] = {
  39. [0] = {
  40. .start = 0x203C0000,
  41. .end = 0x203C0000 + 0x000fffff,
  42. .flags = IORESOURCE_MEM,
  43. },
  44. [1] = {
  45. .start = IRQ_PF7,
  46. .end = IRQ_PF7,
  47. .flags = IORESOURCE_IRQ,
  48. },
  49. };
  50. static struct isp1760_platform_data isp1760_priv = {
  51. .is_isp1761 = 0,
  52. .bus_width_16 = 1,
  53. .port1_otg = 0,
  54. .analog_oc = 0,
  55. .dack_polarity_high = 0,
  56. .dreq_polarity_high = 0,
  57. };
  58. static struct platform_device bfin_isp1760_device = {
  59. .name = "isp1760",
  60. .id = 0,
  61. .dev = {
  62. .platform_data = &isp1760_priv,
  63. },
  64. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  65. .resource = bfin_isp1760_resources,
  66. };
  67. #endif
  68. #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
  69. static struct resource musb_resources[] = {
  70. [0] = {
  71. .start = 0xffc03800,
  72. .end = 0xffc03cff,
  73. .flags = IORESOURCE_MEM,
  74. },
  75. [1] = { /* general IRQ */
  76. .start = IRQ_USB_INT0,
  77. .end = IRQ_USB_INT0,
  78. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  79. .name = "mc"
  80. },
  81. [2] = { /* DMA IRQ */
  82. .start = IRQ_USB_DMA,
  83. .end = IRQ_USB_DMA,
  84. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  85. .name = "dma"
  86. },
  87. };
  88. static struct musb_hdrc_config musb_config = {
  89. .multipoint = 0,
  90. .dyn_fifo = 0,
  91. .soft_con = 1,
  92. .dma = 1,
  93. .num_eps = 8,
  94. .dma_channels = 8,
  95. .gpio_vrsel = GPIO_PF11,
  96. /* Some custom boards need to be active low, just set it to "0"
  97. * if it is the case.
  98. */
  99. .gpio_vrsel_active = 1,
  100. .clkin = 24, /* musb CLKIN in MHZ */
  101. };
  102. static struct musb_hdrc_platform_data musb_plat = {
  103. #if defined(CONFIG_USB_MUSB_OTG)
  104. .mode = MUSB_OTG,
  105. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  106. .mode = MUSB_HOST,
  107. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  108. .mode = MUSB_PERIPHERAL,
  109. #endif
  110. .config = &musb_config,
  111. };
  112. static u64 musb_dmamask = ~(u32)0;
  113. static struct platform_device musb_device = {
  114. .name = "musb-blackfin",
  115. .id = 0,
  116. .dev = {
  117. .dma_mask = &musb_dmamask,
  118. .coherent_dma_mask = 0xffffffff,
  119. .platform_data = &musb_plat,
  120. },
  121. .num_resources = ARRAY_SIZE(musb_resources),
  122. .resource = musb_resources,
  123. };
  124. #endif
  125. #if IS_ENABLED(CONFIG_MTD_NAND_BF5XX)
  126. static struct mtd_partition partition_info[] = {
  127. {
  128. .name = "linux kernel(nand)",
  129. .offset = 0,
  130. .size = 4 * 1024 * 1024,
  131. },
  132. {
  133. .name = "file system(nand)",
  134. .offset = MTDPART_OFS_APPEND,
  135. .size = MTDPART_SIZ_FULL,
  136. },
  137. };
  138. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  139. .data_width = NFC_NWIDTH_8,
  140. .partitions = partition_info,
  141. .nr_partitions = ARRAY_SIZE(partition_info),
  142. .rd_dly = 3,
  143. .wr_dly = 3,
  144. };
  145. static struct resource bf5xx_nand_resources[] = {
  146. {
  147. .start = NFC_CTL,
  148. .end = NFC_DATA_RD + 2,
  149. .flags = IORESOURCE_MEM,
  150. },
  151. {
  152. .start = CH_NFC,
  153. .end = CH_NFC,
  154. .flags = IORESOURCE_IRQ,
  155. },
  156. };
  157. static struct platform_device bf5xx_nand_device = {
  158. .name = "bf5xx-nand",
  159. .id = 0,
  160. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  161. .resource = bf5xx_nand_resources,
  162. .dev = {
  163. .platform_data = &bf5xx_nand_platform,
  164. },
  165. };
  166. #endif
  167. #if IS_ENABLED(CONFIG_BFIN_CFPCMCIA)
  168. static struct resource bfin_pcmcia_cf_resources[] = {
  169. {
  170. .start = 0x20310000, /* IO PORT */
  171. .end = 0x20312000,
  172. .flags = IORESOURCE_MEM,
  173. }, {
  174. .start = 0x20311000, /* Attribute Memory */
  175. .end = 0x20311FFF,
  176. .flags = IORESOURCE_MEM,
  177. }, {
  178. .start = IRQ_PF4,
  179. .end = IRQ_PF4,
  180. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  181. }, {
  182. .start = 6, /* Card Detect PF6 */
  183. .end = 6,
  184. .flags = IORESOURCE_IRQ,
  185. },
  186. };
  187. static struct platform_device bfin_pcmcia_cf_device = {
  188. .name = "bfin_cf_pcmcia",
  189. .id = -1,
  190. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  191. .resource = bfin_pcmcia_cf_resources,
  192. };
  193. #endif
  194. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  195. static struct platform_device rtc_device = {
  196. .name = "rtc-bfin",
  197. .id = -1,
  198. };
  199. #endif
  200. #if IS_ENABLED(CONFIG_SMC91X)
  201. #include <linux/smc91x.h>
  202. static struct smc91x_platdata smc91x_info = {
  203. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  204. .leda = RPC_LED_100_10,
  205. .ledb = RPC_LED_TX_RX,
  206. };
  207. static struct resource smc91x_resources[] = {
  208. {
  209. .name = "smc91x-regs",
  210. .start = 0x20300300,
  211. .end = 0x20300300 + 16,
  212. .flags = IORESOURCE_MEM,
  213. }, {
  214. .start = IRQ_PF7,
  215. .end = IRQ_PF7,
  216. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  217. },
  218. };
  219. static struct platform_device smc91x_device = {
  220. .name = "smc91x",
  221. .id = 0,
  222. .num_resources = ARRAY_SIZE(smc91x_resources),
  223. .resource = smc91x_resources,
  224. .dev = {
  225. .platform_data = &smc91x_info,
  226. },
  227. };
  228. #endif
  229. #if IS_ENABLED(CONFIG_DM9000)
  230. static struct resource dm9000_resources[] = {
  231. [0] = {
  232. .start = 0x203FB800,
  233. .end = 0x203FB800 + 1,
  234. .flags = IORESOURCE_MEM,
  235. },
  236. [1] = {
  237. .start = 0x203FB804,
  238. .end = 0x203FB804 + 1,
  239. .flags = IORESOURCE_MEM,
  240. },
  241. [2] = {
  242. .start = IRQ_PF9,
  243. .end = IRQ_PF9,
  244. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  245. },
  246. };
  247. static struct platform_device dm9000_device = {
  248. .name = "dm9000",
  249. .id = -1,
  250. .num_resources = ARRAY_SIZE(dm9000_resources),
  251. .resource = dm9000_resources,
  252. };
  253. #endif
  254. #if IS_ENABLED(CONFIG_BFIN_MAC)
  255. #include <linux/bfin_mac.h>
  256. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  257. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  258. {
  259. .addr = 1,
  260. .irq = IRQ_MAC_PHYINT,
  261. },
  262. };
  263. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  264. .phydev_number = 1,
  265. .phydev_data = bfin_phydev_data,
  266. .phy_mode = PHY_INTERFACE_MODE_RMII,
  267. .mac_peripherals = bfin_mac_peripherals,
  268. };
  269. static struct platform_device bfin_mii_bus = {
  270. .name = "bfin_mii_bus",
  271. .dev = {
  272. .platform_data = &bfin_mii_bus_data,
  273. }
  274. };
  275. static struct platform_device bfin_mac_device = {
  276. .name = "bfin_mac",
  277. .dev = {
  278. .platform_data = &bfin_mii_bus,
  279. }
  280. };
  281. #endif
  282. #if IS_ENABLED(CONFIG_USB_NET2272)
  283. static struct resource net2272_bfin_resources[] = {
  284. {
  285. .start = 0x20300000,
  286. .end = 0x20300000 + 0x100,
  287. .flags = IORESOURCE_MEM,
  288. }, {
  289. .start = IRQ_PF7,
  290. .end = IRQ_PF7,
  291. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  292. },
  293. };
  294. static struct platform_device net2272_bfin_device = {
  295. .name = "net2272",
  296. .id = -1,
  297. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  298. .resource = net2272_bfin_resources,
  299. };
  300. #endif
  301. #if IS_ENABLED(CONFIG_MTD_M25P80)
  302. static struct mtd_partition bfin_spi_flash_partitions[] = {
  303. {
  304. .name = "bootloader(spi)",
  305. .size = 0x00040000,
  306. .offset = 0,
  307. .mask_flags = MTD_CAP_ROM
  308. }, {
  309. .name = "linux kernel(spi)",
  310. .size = MTDPART_SIZ_FULL,
  311. .offset = MTDPART_OFS_APPEND,
  312. }
  313. };
  314. static struct flash_platform_data bfin_spi_flash_data = {
  315. .name = "m25p80",
  316. .parts = bfin_spi_flash_partitions,
  317. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  318. .type = "m25p16",
  319. };
  320. /* SPI flash chip (m25p64) */
  321. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  322. .enable_dma = 0, /* use dma transfer with this chip*/
  323. };
  324. #endif
  325. #if IS_ENABLED(CONFIG_MMC_SPI)
  326. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  327. .enable_dma = 0,
  328. };
  329. #endif
  330. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
  331. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  332. .model = 7877,
  333. .vref_delay_usecs = 50, /* internal, no capacitor */
  334. .x_plate_ohms = 419,
  335. .y_plate_ohms = 486,
  336. .pressure_max = 1000,
  337. .pressure_min = 0,
  338. .stopacq_polarity = 1,
  339. .first_conversion_delay = 3,
  340. .acquisition_time = 1,
  341. .averaging = 1,
  342. .pen_down_acc_interval = 1,
  343. };
  344. #endif
  345. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  346. #if IS_ENABLED(CONFIG_MTD_M25P80)
  347. {
  348. /* the modalias must be the same as spi device driver name */
  349. .modalias = "m25p80", /* Name of spi_driver for this device */
  350. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  351. .bus_num = 0, /* Framework bus number */
  352. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  353. .platform_data = &bfin_spi_flash_data,
  354. .controller_data = &spi_flash_chip_info,
  355. .mode = SPI_MODE_3,
  356. },
  357. #endif
  358. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
  359. {
  360. .modalias = "ad183x",
  361. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  362. .bus_num = 0,
  363. .chip_select = 4,
  364. },
  365. #endif
  366. #if IS_ENABLED(CONFIG_MMC_SPI)
  367. {
  368. .modalias = "mmc_spi",
  369. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  370. .bus_num = 0,
  371. .chip_select = 5,
  372. .controller_data = &mmc_spi_chip_info,
  373. .mode = SPI_MODE_3,
  374. },
  375. #endif
  376. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
  377. {
  378. .modalias = "ad7877",
  379. .platform_data = &bfin_ad7877_ts_info,
  380. .irq = IRQ_PF8,
  381. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  382. .bus_num = 0,
  383. .chip_select = 2,
  384. },
  385. #endif
  386. #if IS_ENABLED(CONFIG_SND_SOC_WM8731) \
  387. && defined(CONFIG_SND_SOC_WM8731_SPI)
  388. {
  389. .modalias = "wm8731",
  390. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  391. .bus_num = 0,
  392. .chip_select = 5,
  393. .mode = SPI_MODE_0,
  394. },
  395. #endif
  396. #if IS_ENABLED(CONFIG_SPI_SPIDEV)
  397. {
  398. .modalias = "spidev",
  399. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  400. .bus_num = 0,
  401. .chip_select = 1,
  402. },
  403. #endif
  404. };
  405. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  406. /* SPI controller data */
  407. static struct bfin5xx_spi_master bfin_spi0_info = {
  408. .num_chipselect = 8,
  409. .enable_dma = 1, /* master has the ability to do dma transfer */
  410. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  411. };
  412. /* SPI (0) */
  413. static struct resource bfin_spi0_resource[] = {
  414. [0] = {
  415. .start = SPI0_REGBASE,
  416. .end = SPI0_REGBASE + 0xFF,
  417. .flags = IORESOURCE_MEM,
  418. },
  419. [1] = {
  420. .start = CH_SPI,
  421. .end = CH_SPI,
  422. .flags = IORESOURCE_DMA,
  423. },
  424. [2] = {
  425. .start = IRQ_SPI,
  426. .end = IRQ_SPI,
  427. .flags = IORESOURCE_IRQ,
  428. },
  429. };
  430. static struct platform_device bfin_spi0_device = {
  431. .name = "bfin-spi",
  432. .id = 0, /* Bus number */
  433. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  434. .resource = bfin_spi0_resource,
  435. .dev = {
  436. .platform_data = &bfin_spi0_info, /* Passed to driver */
  437. },
  438. };
  439. #endif /* spi master and devices */
  440. #if IS_ENABLED(CONFIG_MTD_GPIO_ADDR)
  441. static struct mtd_partition cm_partitions[] = {
  442. {
  443. .name = "bootloader(nor)",
  444. .size = 0x40000,
  445. .offset = 0,
  446. }, {
  447. .name = "linux kernel(nor)",
  448. .size = 0x100000,
  449. .offset = MTDPART_OFS_APPEND,
  450. }, {
  451. .name = "file system(nor)",
  452. .size = MTDPART_SIZ_FULL,
  453. .offset = MTDPART_OFS_APPEND,
  454. }
  455. };
  456. static struct physmap_flash_data cm_flash_data = {
  457. .width = 2,
  458. .parts = cm_partitions,
  459. .nr_parts = ARRAY_SIZE(cm_partitions),
  460. };
  461. static unsigned cm_flash_gpios[] = { GPIO_PH9, GPIO_PG11 };
  462. static struct resource cm_flash_resource[] = {
  463. {
  464. .name = "cfi_probe",
  465. .start = 0x20000000,
  466. .end = 0x201fffff,
  467. .flags = IORESOURCE_MEM,
  468. }, {
  469. .start = (unsigned long)cm_flash_gpios,
  470. .end = ARRAY_SIZE(cm_flash_gpios),
  471. .flags = IORESOURCE_IRQ,
  472. }
  473. };
  474. static struct platform_device cm_flash_device = {
  475. .name = "gpio-addr-flash",
  476. .id = 0,
  477. .dev = {
  478. .platform_data = &cm_flash_data,
  479. },
  480. .num_resources = ARRAY_SIZE(cm_flash_resource),
  481. .resource = cm_flash_resource,
  482. };
  483. #endif
  484. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  485. #ifdef CONFIG_SERIAL_BFIN_UART0
  486. static struct resource bfin_uart0_resources[] = {
  487. {
  488. .start = UART0_THR,
  489. .end = UART0_GCTL+2,
  490. .flags = IORESOURCE_MEM,
  491. },
  492. {
  493. .start = IRQ_UART0_TX,
  494. .end = IRQ_UART0_TX,
  495. .flags = IORESOURCE_IRQ,
  496. },
  497. {
  498. .start = IRQ_UART0_RX,
  499. .end = IRQ_UART0_RX,
  500. .flags = IORESOURCE_IRQ,
  501. },
  502. {
  503. .start = IRQ_UART0_ERROR,
  504. .end = IRQ_UART0_ERROR,
  505. .flags = IORESOURCE_IRQ,
  506. },
  507. {
  508. .start = CH_UART0_TX,
  509. .end = CH_UART0_TX,
  510. .flags = IORESOURCE_DMA,
  511. },
  512. {
  513. .start = CH_UART0_RX,
  514. .end = CH_UART0_RX,
  515. .flags = IORESOURCE_DMA,
  516. },
  517. };
  518. static unsigned short bfin_uart0_peripherals[] = {
  519. P_UART0_TX, P_UART0_RX, 0
  520. };
  521. static struct platform_device bfin_uart0_device = {
  522. .name = "bfin-uart",
  523. .id = 0,
  524. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  525. .resource = bfin_uart0_resources,
  526. .dev = {
  527. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  528. },
  529. };
  530. #endif
  531. #ifdef CONFIG_SERIAL_BFIN_UART1
  532. static struct resource bfin_uart1_resources[] = {
  533. {
  534. .start = UART1_THR,
  535. .end = UART1_GCTL+2,
  536. .flags = IORESOURCE_MEM,
  537. },
  538. {
  539. .start = IRQ_UART1_TX,
  540. .end = IRQ_UART1_TX,
  541. .flags = IORESOURCE_IRQ,
  542. },
  543. {
  544. .start = IRQ_UART1_RX,
  545. .end = IRQ_UART1_RX,
  546. .flags = IORESOURCE_IRQ,
  547. },
  548. {
  549. .start = IRQ_UART1_ERROR,
  550. .end = IRQ_UART1_ERROR,
  551. .flags = IORESOURCE_IRQ,
  552. },
  553. {
  554. .start = CH_UART1_TX,
  555. .end = CH_UART1_TX,
  556. .flags = IORESOURCE_DMA,
  557. },
  558. {
  559. .start = CH_UART1_RX,
  560. .end = CH_UART1_RX,
  561. .flags = IORESOURCE_DMA,
  562. },
  563. #ifdef CONFIG_BFIN_UART1_CTSRTS
  564. { /* CTS pin */
  565. .start = GPIO_PF9,
  566. .end = GPIO_PF9,
  567. .flags = IORESOURCE_IO,
  568. },
  569. { /* RTS pin */
  570. .start = GPIO_PF10,
  571. .end = GPIO_PF10,
  572. .flags = IORESOURCE_IO,
  573. },
  574. #endif
  575. };
  576. static unsigned short bfin_uart1_peripherals[] = {
  577. P_UART1_TX, P_UART1_RX, 0
  578. };
  579. static struct platform_device bfin_uart1_device = {
  580. .name = "bfin-uart",
  581. .id = 1,
  582. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  583. .resource = bfin_uart1_resources,
  584. .dev = {
  585. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  586. },
  587. };
  588. #endif
  589. #endif
  590. #if IS_ENABLED(CONFIG_BFIN_SIR)
  591. #ifdef CONFIG_BFIN_SIR0
  592. static struct resource bfin_sir0_resources[] = {
  593. {
  594. .start = 0xFFC00400,
  595. .end = 0xFFC004FF,
  596. .flags = IORESOURCE_MEM,
  597. },
  598. {
  599. .start = IRQ_UART0_RX,
  600. .end = IRQ_UART0_RX+1,
  601. .flags = IORESOURCE_IRQ,
  602. },
  603. {
  604. .start = CH_UART0_RX,
  605. .end = CH_UART0_RX+1,
  606. .flags = IORESOURCE_DMA,
  607. },
  608. };
  609. static struct platform_device bfin_sir0_device = {
  610. .name = "bfin_sir",
  611. .id = 0,
  612. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  613. .resource = bfin_sir0_resources,
  614. };
  615. #endif
  616. #ifdef CONFIG_BFIN_SIR1
  617. static struct resource bfin_sir1_resources[] = {
  618. {
  619. .start = 0xFFC02000,
  620. .end = 0xFFC020FF,
  621. .flags = IORESOURCE_MEM,
  622. },
  623. {
  624. .start = IRQ_UART1_RX,
  625. .end = IRQ_UART1_RX+1,
  626. .flags = IORESOURCE_IRQ,
  627. },
  628. {
  629. .start = CH_UART1_RX,
  630. .end = CH_UART1_RX+1,
  631. .flags = IORESOURCE_DMA,
  632. },
  633. };
  634. static struct platform_device bfin_sir1_device = {
  635. .name = "bfin_sir",
  636. .id = 1,
  637. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  638. .resource = bfin_sir1_resources,
  639. };
  640. #endif
  641. #endif
  642. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  643. static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
  644. static struct resource bfin_twi0_resource[] = {
  645. [0] = {
  646. .start = TWI0_REGBASE,
  647. .end = TWI0_REGBASE,
  648. .flags = IORESOURCE_MEM,
  649. },
  650. [1] = {
  651. .start = IRQ_TWI,
  652. .end = IRQ_TWI,
  653. .flags = IORESOURCE_IRQ,
  654. },
  655. };
  656. static struct platform_device i2c_bfin_twi_device = {
  657. .name = "i2c-bfin-twi",
  658. .id = 0,
  659. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  660. .resource = bfin_twi0_resource,
  661. .dev = {
  662. .platform_data = &bfin_twi0_pins,
  663. },
  664. };
  665. #endif
  666. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  667. #if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
  668. {
  669. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  670. },
  671. #endif
  672. #if IS_ENABLED(CONFIG_INPUT_PCF8574)
  673. {
  674. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  675. .irq = IRQ_PF8,
  676. },
  677. #endif
  678. #if IS_ENABLED(CONFIG_FB_BFIN_7393)
  679. {
  680. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  681. },
  682. #endif
  683. };
  684. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  685. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  686. static struct resource bfin_sport0_uart_resources[] = {
  687. {
  688. .start = SPORT0_TCR1,
  689. .end = SPORT0_MRCS3+4,
  690. .flags = IORESOURCE_MEM,
  691. },
  692. {
  693. .start = IRQ_SPORT0_RX,
  694. .end = IRQ_SPORT0_RX+1,
  695. .flags = IORESOURCE_IRQ,
  696. },
  697. {
  698. .start = IRQ_SPORT0_ERROR,
  699. .end = IRQ_SPORT0_ERROR,
  700. .flags = IORESOURCE_IRQ,
  701. },
  702. };
  703. static unsigned short bfin_sport0_peripherals[] = {
  704. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  705. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  706. };
  707. static struct platform_device bfin_sport0_uart_device = {
  708. .name = "bfin-sport-uart",
  709. .id = 0,
  710. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  711. .resource = bfin_sport0_uart_resources,
  712. .dev = {
  713. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  714. },
  715. };
  716. #endif
  717. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  718. static struct resource bfin_sport1_uart_resources[] = {
  719. {
  720. .start = SPORT1_TCR1,
  721. .end = SPORT1_MRCS3+4,
  722. .flags = IORESOURCE_MEM,
  723. },
  724. {
  725. .start = IRQ_SPORT1_RX,
  726. .end = IRQ_SPORT1_RX+1,
  727. .flags = IORESOURCE_IRQ,
  728. },
  729. {
  730. .start = IRQ_SPORT1_ERROR,
  731. .end = IRQ_SPORT1_ERROR,
  732. .flags = IORESOURCE_IRQ,
  733. },
  734. };
  735. static unsigned short bfin_sport1_peripherals[] = {
  736. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  737. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  738. };
  739. static struct platform_device bfin_sport1_uart_device = {
  740. .name = "bfin-sport-uart",
  741. .id = 1,
  742. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  743. .resource = bfin_sport1_uart_resources,
  744. .dev = {
  745. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  746. },
  747. };
  748. #endif
  749. #endif
  750. #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
  751. #include <linux/input.h>
  752. #include <linux/gpio_keys.h>
  753. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  754. {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"},
  755. };
  756. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  757. .buttons = bfin_gpio_keys_table,
  758. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  759. };
  760. static struct platform_device bfin_device_gpiokeys = {
  761. .name = "gpio-keys",
  762. .dev = {
  763. .platform_data = &bfin_gpio_keys_data,
  764. },
  765. };
  766. #endif
  767. static const unsigned int cclk_vlev_datasheet[] =
  768. {
  769. VRPAIR(VLEV_100, 400000000),
  770. VRPAIR(VLEV_105, 426000000),
  771. VRPAIR(VLEV_110, 500000000),
  772. VRPAIR(VLEV_115, 533000000),
  773. VRPAIR(VLEV_120, 600000000),
  774. };
  775. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  776. .tuple_tab = cclk_vlev_datasheet,
  777. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  778. .vr_settling_time = 25 /* us */,
  779. };
  780. static struct platform_device bfin_dpmc = {
  781. .name = "bfin dpmc",
  782. .dev = {
  783. .platform_data = &bfin_dmpc_vreg_data,
  784. },
  785. };
  786. static struct platform_device *cmbf527_devices[] __initdata = {
  787. &bfin_dpmc,
  788. #if IS_ENABLED(CONFIG_MTD_NAND_BF5XX)
  789. &bf5xx_nand_device,
  790. #endif
  791. #if IS_ENABLED(CONFIG_BFIN_CFPCMCIA)
  792. &bfin_pcmcia_cf_device,
  793. #endif
  794. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  795. &rtc_device,
  796. #endif
  797. #if IS_ENABLED(CONFIG_USB_ISP1760_HCD)
  798. &bfin_isp1760_device,
  799. #endif
  800. #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
  801. &musb_device,
  802. #endif
  803. #if IS_ENABLED(CONFIG_SMC91X)
  804. &smc91x_device,
  805. #endif
  806. #if IS_ENABLED(CONFIG_DM9000)
  807. &dm9000_device,
  808. #endif
  809. #if IS_ENABLED(CONFIG_BFIN_MAC)
  810. &bfin_mii_bus,
  811. &bfin_mac_device,
  812. #endif
  813. #if IS_ENABLED(CONFIG_USB_NET2272)
  814. &net2272_bfin_device,
  815. #endif
  816. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  817. &bfin_spi0_device,
  818. #endif
  819. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  820. #ifdef CONFIG_SERIAL_BFIN_UART0
  821. &bfin_uart0_device,
  822. #endif
  823. #ifdef CONFIG_SERIAL_BFIN_UART1
  824. &bfin_uart1_device,
  825. #endif
  826. #endif
  827. #if IS_ENABLED(CONFIG_BFIN_SIR)
  828. #ifdef CONFIG_BFIN_SIR0
  829. &bfin_sir0_device,
  830. #endif
  831. #ifdef CONFIG_BFIN_SIR1
  832. &bfin_sir1_device,
  833. #endif
  834. #endif
  835. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  836. &i2c_bfin_twi_device,
  837. #endif
  838. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  839. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  840. &bfin_sport0_uart_device,
  841. #endif
  842. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  843. &bfin_sport1_uart_device,
  844. #endif
  845. #endif
  846. #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
  847. &bfin_device_gpiokeys,
  848. #endif
  849. #if IS_ENABLED(CONFIG_MTD_GPIO_ADDR)
  850. &cm_flash_device,
  851. #endif
  852. };
  853. static int __init cm_init(void)
  854. {
  855. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  856. i2c_register_board_info(0, bfin_i2c_board_info,
  857. ARRAY_SIZE(bfin_i2c_board_info));
  858. platform_add_devices(cmbf527_devices, ARRAY_SIZE(cmbf527_devices));
  859. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  860. return 0;
  861. }
  862. arch_initcall(cm_init);
  863. static struct platform_device *cmbf527_early_devices[] __initdata = {
  864. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  865. #ifdef CONFIG_SERIAL_BFIN_UART0
  866. &bfin_uart0_device,
  867. #endif
  868. #ifdef CONFIG_SERIAL_BFIN_UART1
  869. &bfin_uart1_device,
  870. #endif
  871. #endif
  872. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  873. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  874. &bfin_sport0_uart_device,
  875. #endif
  876. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  877. &bfin_sport1_uart_device,
  878. #endif
  879. #endif
  880. };
  881. void __init native_machine_early_platform_add_devices(void)
  882. {
  883. printk(KERN_INFO "register early platform devices\n");
  884. early_platform_add_devices(cmbf527_early_devices,
  885. ARRAY_SIZE(cmbf527_early_devices));
  886. }
  887. void native_machine_restart(char *cmd)
  888. {
  889. /* workaround reboot hang when booting from SPI */
  890. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  891. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  892. }
  893. int bfin_get_ether_addr(char *addr)
  894. {
  895. return 1;
  896. }
  897. EXPORT_SYMBOL(bfin_get_ether_addr);