tll6527m.c 21 KB

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  1. /* File: arch/blackfin/mach-bf527/boards/tll6527m.c
  2. * Based on: arch/blackfin/mach-bf527/boards/ezkit.c
  3. * Author: Ashish Gupta
  4. *
  5. * Copyright: 2010 - The Learning Labs Inc.
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/export.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/partitions.h>
  14. #include <linux/mtd/physmap.h>
  15. #include <linux/spi/spi.h>
  16. #include <linux/spi/flash.h>
  17. #include <linux/i2c.h>
  18. #include <linux/irq.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/usb/musb.h>
  21. #include <linux/leds.h>
  22. #include <linux/input.h>
  23. #include <asm/dma.h>
  24. #include <asm/bfin5xx_spi.h>
  25. #include <asm/reboot.h>
  26. #include <asm/nand.h>
  27. #include <asm/portmux.h>
  28. #include <asm/dpmc.h>
  29. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879)
  30. #include <linux/spi/ad7879.h>
  31. #define LCD_BACKLIGHT_GPIO 0x40
  32. /* TLL6527M uses TLL7UIQ35 / ADI LCD EZ Extender. AD7879 AUX GPIO is used for
  33. * LCD Backlight Enable
  34. */
  35. #endif
  36. /*
  37. * Name the Board for the /proc/cpuinfo
  38. */
  39. const char bfin_board_name[] = "TLL6527M";
  40. /*
  41. * Driver needs to know address, irq and flag pin.
  42. */
  43. #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
  44. static struct resource musb_resources[] = {
  45. [0] = {
  46. .start = 0xffc03800,
  47. .end = 0xffc03cff,
  48. .flags = IORESOURCE_MEM,
  49. },
  50. [1] = { /* general IRQ */
  51. .start = IRQ_USB_INT0,
  52. .end = IRQ_USB_INT0,
  53. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  54. },
  55. [2] = { /* DMA IRQ */
  56. .start = IRQ_USB_DMA,
  57. .end = IRQ_USB_DMA,
  58. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  59. },
  60. };
  61. static struct musb_hdrc_config musb_config = {
  62. .multipoint = 0,
  63. .dyn_fifo = 0,
  64. .soft_con = 1,
  65. .dma = 1,
  66. .num_eps = 8,
  67. .dma_channels = 8,
  68. /*.gpio_vrsel = GPIO_PG13,*/
  69. /* Some custom boards need to be active low, just set it to "0"
  70. * if it is the case.
  71. */
  72. .gpio_vrsel_active = 1,
  73. };
  74. static struct musb_hdrc_platform_data musb_plat = {
  75. #if defined(CONFIG_USB_MUSB_OTG)
  76. .mode = MUSB_OTG,
  77. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  78. .mode = MUSB_HOST,
  79. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  80. .mode = MUSB_PERIPHERAL,
  81. #endif
  82. .config = &musb_config,
  83. };
  84. static u64 musb_dmamask = ~(u32)0;
  85. static struct platform_device musb_device = {
  86. .name = "musb-blackfin",
  87. .id = 0,
  88. .dev = {
  89. .dma_mask = &musb_dmamask,
  90. .coherent_dma_mask = 0xffffffff,
  91. .platform_data = &musb_plat,
  92. },
  93. .num_resources = ARRAY_SIZE(musb_resources),
  94. .resource = musb_resources,
  95. };
  96. #endif
  97. #if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
  98. #include <asm/bfin-lq035q1.h>
  99. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  100. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  101. .ppi_mode = USE_RGB565_16_BIT_PPI,
  102. .use_bl = 1,
  103. .gpio_bl = LCD_BACKLIGHT_GPIO,
  104. };
  105. static struct resource bfin_lq035q1_resources[] = {
  106. {
  107. .start = IRQ_PPI_ERROR,
  108. .end = IRQ_PPI_ERROR,
  109. .flags = IORESOURCE_IRQ,
  110. },
  111. };
  112. static struct platform_device bfin_lq035q1_device = {
  113. .name = "bfin-lq035q1",
  114. .id = -1,
  115. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  116. .resource = bfin_lq035q1_resources,
  117. .dev = {
  118. .platform_data = &bfin_lq035q1_data,
  119. },
  120. };
  121. #endif
  122. #if IS_ENABLED(CONFIG_MTD_GPIO_ADDR)
  123. static struct mtd_partition tll6527m_partitions[] = {
  124. {
  125. .name = "bootloader(nor)",
  126. .size = 0xA0000,
  127. .offset = 0,
  128. }, {
  129. .name = "linux kernel(nor)",
  130. .size = 0xD00000,
  131. .offset = MTDPART_OFS_APPEND,
  132. }, {
  133. .name = "file system(nor)",
  134. .size = MTDPART_SIZ_FULL,
  135. .offset = MTDPART_OFS_APPEND,
  136. }
  137. };
  138. static struct physmap_flash_data tll6527m_flash_data = {
  139. .width = 2,
  140. .parts = tll6527m_partitions,
  141. .nr_parts = ARRAY_SIZE(tll6527m_partitions),
  142. };
  143. static unsigned tll6527m_flash_gpios[] = { GPIO_PG11, GPIO_PH11, GPIO_PH12 };
  144. static struct resource tll6527m_flash_resource[] = {
  145. {
  146. .name = "cfi_probe",
  147. .start = 0x20000000,
  148. .end = 0x201fffff,
  149. .flags = IORESOURCE_MEM,
  150. }, {
  151. .start = (unsigned long)tll6527m_flash_gpios,
  152. .end = ARRAY_SIZE(tll6527m_flash_gpios),
  153. .flags = IORESOURCE_IRQ,
  154. }
  155. };
  156. static struct platform_device tll6527m_flash_device = {
  157. .name = "gpio-addr-flash",
  158. .id = 0,
  159. .dev = {
  160. .platform_data = &tll6527m_flash_data,
  161. },
  162. .num_resources = ARRAY_SIZE(tll6527m_flash_resource),
  163. .resource = tll6527m_flash_resource,
  164. };
  165. #endif
  166. #if IS_ENABLED(CONFIG_GPIO_DECODER)
  167. /* An SN74LVC138A 3:8 decoder chip has been used to generate 7 augmented
  168. * outputs used as SPI CS lines for all SPI SLAVE devices on TLL6527v1-0.
  169. * EXP_GPIO_SPISEL_BASE is the base number for the expanded outputs being
  170. * used as SPI CS lines, this should be > MAX_BLACKFIN_GPIOS
  171. */
  172. #include <linux/gpio-decoder.h>
  173. #define EXP_GPIO_SPISEL_BASE 0x64
  174. static unsigned gpio_addr_inputs[] = {
  175. GPIO_PG1, GPIO_PH9, GPIO_PH10
  176. };
  177. static struct gpio_decoder_platform_data spi_decoded_cs = {
  178. .base = EXP_GPIO_SPISEL_BASE,
  179. .input_addrs = gpio_addr_inputs,
  180. .nr_input_addrs = ARRAY_SIZE(gpio_addr_inputs),
  181. .default_output = 0,
  182. /* .default_output = (1 << ARRAY_SIZE(gpio_addr_inputs)) - 1 */
  183. };
  184. static struct platform_device spi_decoded_gpio = {
  185. .name = "gpio-decoder",
  186. .id = 0,
  187. .dev = {
  188. .platform_data = &spi_decoded_cs,
  189. },
  190. };
  191. #else
  192. #define EXP_GPIO_SPISEL_BASE 0x0
  193. #endif
  194. #if IS_ENABLED(CONFIG_INPUT_ADXL34X)
  195. #include <linux/input/adxl34x.h>
  196. static const struct adxl34x_platform_data adxl345_info = {
  197. .x_axis_offset = 0,
  198. .y_axis_offset = 0,
  199. .z_axis_offset = 0,
  200. .tap_threshold = 0x31,
  201. .tap_duration = 0x10,
  202. .tap_latency = 0x60,
  203. .tap_window = 0xF0,
  204. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  205. .act_axis_control = 0xFF,
  206. .activity_threshold = 5,
  207. .inactivity_threshold = 2,
  208. .inactivity_time = 2,
  209. .free_fall_threshold = 0x7,
  210. .free_fall_time = 0x20,
  211. .data_rate = 0x8,
  212. .data_range = ADXL_FULL_RES,
  213. .ev_type = EV_ABS,
  214. .ev_code_x = ABS_X, /* EV_REL */
  215. .ev_code_y = ABS_Y, /* EV_REL */
  216. .ev_code_z = ABS_Z, /* EV_REL */
  217. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  218. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  219. .ev_code_act_inactivity = KEY_A, /* EV_KEY */
  220. .use_int2 = 1,
  221. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  222. .fifo_mode = ADXL_FIFO_STREAM,
  223. };
  224. #endif
  225. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  226. static struct platform_device rtc_device = {
  227. .name = "rtc-bfin",
  228. .id = -1,
  229. };
  230. #endif
  231. #if IS_ENABLED(CONFIG_BFIN_MAC)
  232. #include <linux/bfin_mac.h>
  233. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  234. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  235. {
  236. .addr = 1,
  237. .irq = IRQ_MAC_PHYINT,
  238. },
  239. };
  240. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  241. .phydev_number = 1,
  242. .phydev_data = bfin_phydev_data,
  243. .phy_mode = PHY_INTERFACE_MODE_RMII,
  244. .mac_peripherals = bfin_mac_peripherals,
  245. };
  246. static struct platform_device bfin_mii_bus = {
  247. .name = "bfin_mii_bus",
  248. .dev = {
  249. .platform_data = &bfin_mii_bus_data,
  250. }
  251. };
  252. static struct platform_device bfin_mac_device = {
  253. .name = "bfin_mac",
  254. .dev = {
  255. .platform_data = &bfin_mii_bus,
  256. }
  257. };
  258. #endif
  259. #if IS_ENABLED(CONFIG_MTD_M25P80)
  260. static struct mtd_partition bfin_spi_flash_partitions[] = {
  261. {
  262. .name = "bootloader(spi)",
  263. .size = 0x00040000,
  264. .offset = 0,
  265. .mask_flags = MTD_CAP_ROM
  266. }, {
  267. .name = "linux kernel(spi)",
  268. .size = MTDPART_SIZ_FULL,
  269. .offset = MTDPART_OFS_APPEND,
  270. }
  271. };
  272. static struct flash_platform_data bfin_spi_flash_data = {
  273. .name = "m25p80",
  274. .parts = bfin_spi_flash_partitions,
  275. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  276. .type = "m25p16",
  277. };
  278. /* SPI flash chip (m25p64) */
  279. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  280. .enable_dma = 0, /* use dma transfer with this chip*/
  281. };
  282. #endif
  283. #if IS_ENABLED(CONFIG_MMC_SPI)
  284. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  285. .enable_dma = 0,
  286. };
  287. #endif
  288. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879)
  289. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  290. .model = 7879, /* Model = AD7879 */
  291. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  292. .pressure_max = 10000,
  293. .pressure_min = 0,
  294. .first_conversion_delay = 3,
  295. /* wait 512us before do a first conversion */
  296. .acquisition_time = 1, /* 4us acquisition time per sample */
  297. .median = 2, /* do 8 measurements */
  298. .averaging = 1,
  299. /* take the average of 4 middle samples */
  300. .pen_down_acc_interval = 255, /* 9.4 ms */
  301. .gpio_export = 1, /* configure AUX as GPIO output*/
  302. .gpio_base = LCD_BACKLIGHT_GPIO,
  303. };
  304. #endif
  305. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
  306. static struct platform_device bfin_i2s = {
  307. .name = "bfin-i2s",
  308. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  309. /* TODO: add platform data here */
  310. };
  311. #endif
  312. #if IS_ENABLED(CONFIG_GPIO_MCP23S08)
  313. #include <linux/spi/mcp23s08.h>
  314. static const struct mcp23s08_platform_data bfin_mcp23s08_sys_gpio_info = {
  315. .chip[0].is_present = true,
  316. .base = 0x30,
  317. };
  318. static const struct mcp23s08_platform_data bfin_mcp23s08_usr_gpio_info = {
  319. .chip[2].is_present = true,
  320. .base = 0x38,
  321. };
  322. #endif
  323. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  324. #if IS_ENABLED(CONFIG_MTD_M25P80)
  325. {
  326. /* the modalias must be the same as spi device driver name */
  327. .modalias = "m25p80", /* Name of spi_driver for this device */
  328. .max_speed_hz = 25000000,
  329. /* max spi clock (SCK) speed in HZ */
  330. .bus_num = 0, /* Framework bus number */
  331. .chip_select = EXP_GPIO_SPISEL_BASE + 0x04 + MAX_CTRL_CS,
  332. /* Can be connected to TLL6527M GPIO connector */
  333. /* Either SPI_ADC or M25P80 FLASH can be installed at a time */
  334. .platform_data = &bfin_spi_flash_data,
  335. .controller_data = &spi_flash_chip_info,
  336. .mode = SPI_MODE_3,
  337. },
  338. #endif
  339. #if IS_ENABLED(CONFIG_MMC_SPI)
  340. {
  341. .modalias = "mmc_spi",
  342. /*
  343. * TLL6527M V1.0 does not support SD Card at SPI Clock > 10 MHz due to
  344. * SPI buffer limitations
  345. */
  346. .max_speed_hz = 10000000,
  347. /* max spi clock (SCK) speed in HZ */
  348. .bus_num = 0,
  349. .chip_select = EXP_GPIO_SPISEL_BASE + 0x05 + MAX_CTRL_CS,
  350. .controller_data = &mmc_spi_chip_info,
  351. .mode = SPI_MODE_0,
  352. },
  353. #endif
  354. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879_SPI)
  355. {
  356. .modalias = "ad7879",
  357. .platform_data = &bfin_ad7879_ts_info,
  358. .irq = IRQ_PH14,
  359. .max_speed_hz = 5000000,
  360. /* max spi clock (SCK) speed in HZ */
  361. .bus_num = 0,
  362. .chip_select = EXP_GPIO_SPISEL_BASE + 0x07 + MAX_CTRL_CS,
  363. .mode = SPI_CPHA | SPI_CPOL,
  364. },
  365. #endif
  366. #if IS_ENABLED(CONFIG_SPI_SPIDEV)
  367. {
  368. .modalias = "spidev",
  369. .max_speed_hz = 10000000,
  370. /* TLL6527Mv1-0 supports max spi clock (SCK) speed = 10 MHz */
  371. .bus_num = 0,
  372. .chip_select = EXP_GPIO_SPISEL_BASE + 0x03 + MAX_CTRL_CS,
  373. .mode = SPI_CPHA | SPI_CPOL,
  374. },
  375. #endif
  376. #if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
  377. {
  378. .modalias = "bfin-lq035q1-spi",
  379. .max_speed_hz = 20000000,
  380. .bus_num = 0,
  381. .chip_select = EXP_GPIO_SPISEL_BASE + 0x06 + MAX_CTRL_CS,
  382. .mode = SPI_CPHA | SPI_CPOL,
  383. },
  384. #endif
  385. #if IS_ENABLED(CONFIG_GPIO_MCP23S08)
  386. {
  387. .modalias = "mcp23s08",
  388. .platform_data = &bfin_mcp23s08_sys_gpio_info,
  389. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  390. .bus_num = 0,
  391. .chip_select = EXP_GPIO_SPISEL_BASE + 0x01 + MAX_CTRL_CS,
  392. .mode = SPI_CPHA | SPI_CPOL,
  393. },
  394. {
  395. .modalias = "mcp23s08",
  396. .platform_data = &bfin_mcp23s08_usr_gpio_info,
  397. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  398. .bus_num = 0,
  399. .chip_select = EXP_GPIO_SPISEL_BASE + 0x02 + MAX_CTRL_CS,
  400. .mode = SPI_CPHA | SPI_CPOL,
  401. },
  402. #endif
  403. };
  404. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  405. /* SPI controller data */
  406. static struct bfin5xx_spi_master bfin_spi0_info = {
  407. .num_chipselect = EXP_GPIO_SPISEL_BASE + 8 + MAX_CTRL_CS,
  408. /* EXP_GPIO_SPISEL_BASE will be > MAX_BLACKFIN_GPIOS */
  409. .enable_dma = 1, /* master has the ability to do dma transfer */
  410. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  411. };
  412. /* SPI (0) */
  413. static struct resource bfin_spi0_resource[] = {
  414. [0] = {
  415. .start = SPI0_REGBASE,
  416. .end = SPI0_REGBASE + 0xFF,
  417. .flags = IORESOURCE_MEM,
  418. },
  419. [1] = {
  420. .start = CH_SPI,
  421. .end = CH_SPI,
  422. .flags = IORESOURCE_DMA,
  423. },
  424. [2] = {
  425. .start = IRQ_SPI,
  426. .end = IRQ_SPI,
  427. .flags = IORESOURCE_IRQ,
  428. },
  429. };
  430. static struct platform_device bfin_spi0_device = {
  431. .name = "bfin-spi",
  432. .id = 0, /* Bus number */
  433. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  434. .resource = bfin_spi0_resource,
  435. .dev = {
  436. .platform_data = &bfin_spi0_info, /* Passed to driver */
  437. },
  438. };
  439. #endif /* spi master and devices */
  440. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  441. #ifdef CONFIG_SERIAL_BFIN_UART0
  442. static struct resource bfin_uart0_resources[] = {
  443. {
  444. .start = UART0_THR,
  445. .end = UART0_GCTL+2,
  446. .flags = IORESOURCE_MEM,
  447. },
  448. {
  449. .start = IRQ_UART0_TX,
  450. .end = IRQ_UART0_TX,
  451. .flags = IORESOURCE_IRQ,
  452. },
  453. {
  454. .start = IRQ_UART0_RX,
  455. .end = IRQ_UART0_RX,
  456. .flags = IORESOURCE_IRQ,
  457. },
  458. {
  459. .start = IRQ_UART0_ERROR,
  460. .end = IRQ_UART0_ERROR,
  461. .flags = IORESOURCE_IRQ,
  462. },
  463. {
  464. .start = CH_UART0_TX,
  465. .end = CH_UART0_TX,
  466. .flags = IORESOURCE_DMA,
  467. },
  468. {
  469. .start = CH_UART0_RX,
  470. .end = CH_UART0_RX,
  471. .flags = IORESOURCE_DMA,
  472. },
  473. };
  474. static unsigned short bfin_uart0_peripherals[] = {
  475. P_UART0_TX, P_UART0_RX, 0
  476. };
  477. static struct platform_device bfin_uart0_device = {
  478. .name = "bfin-uart",
  479. .id = 0,
  480. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  481. .resource = bfin_uart0_resources,
  482. .dev = {
  483. .platform_data = &bfin_uart0_peripherals,
  484. /* Passed to driver */
  485. },
  486. };
  487. #endif
  488. #ifdef CONFIG_SERIAL_BFIN_UART1
  489. static struct resource bfin_uart1_resources[] = {
  490. {
  491. .start = UART1_THR,
  492. .end = UART1_GCTL+2,
  493. .flags = IORESOURCE_MEM,
  494. },
  495. {
  496. .start = IRQ_UART1_TX,
  497. .end = IRQ_UART1_TX,
  498. .flags = IORESOURCE_IRQ,
  499. },
  500. {
  501. .start = IRQ_UART1_RX,
  502. .end = IRQ_UART1_RX,
  503. .flags = IORESOURCE_IRQ,
  504. },
  505. {
  506. .start = IRQ_UART1_ERROR,
  507. .end = IRQ_UART1_ERROR,
  508. .flags = IORESOURCE_IRQ,
  509. },
  510. {
  511. .start = CH_UART1_TX,
  512. .end = CH_UART1_TX,
  513. .flags = IORESOURCE_DMA,
  514. },
  515. {
  516. .start = CH_UART1_RX,
  517. .end = CH_UART1_RX,
  518. .flags = IORESOURCE_DMA,
  519. },
  520. #ifdef CONFIG_BFIN_UART1_CTSRTS
  521. { /* CTS pin */
  522. .start = GPIO_PF9,
  523. .end = GPIO_PF9,
  524. .flags = IORESOURCE_IO,
  525. },
  526. { /* RTS pin */
  527. .start = GPIO_PF10,
  528. .end = GPIO_PF10,
  529. .flags = IORESOURCE_IO,
  530. },
  531. #endif
  532. };
  533. static unsigned short bfin_uart1_peripherals[] = {
  534. P_UART1_TX, P_UART1_RX, 0
  535. };
  536. static struct platform_device bfin_uart1_device = {
  537. .name = "bfin-uart",
  538. .id = 1,
  539. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  540. .resource = bfin_uart1_resources,
  541. .dev = {
  542. .platform_data = &bfin_uart1_peripherals,
  543. /* Passed to driver */
  544. },
  545. };
  546. #endif
  547. #endif
  548. #if IS_ENABLED(CONFIG_BFIN_SIR)
  549. #ifdef CONFIG_BFIN_SIR0
  550. static struct resource bfin_sir0_resources[] = {
  551. {
  552. .start = 0xFFC00400,
  553. .end = 0xFFC004FF,
  554. .flags = IORESOURCE_MEM,
  555. },
  556. {
  557. .start = IRQ_UART0_RX,
  558. .end = IRQ_UART0_RX+1,
  559. .flags = IORESOURCE_IRQ,
  560. },
  561. {
  562. .start = CH_UART0_RX,
  563. .end = CH_UART0_RX+1,
  564. .flags = IORESOURCE_DMA,
  565. },
  566. };
  567. static struct platform_device bfin_sir0_device = {
  568. .name = "bfin_sir",
  569. .id = 0,
  570. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  571. .resource = bfin_sir0_resources,
  572. };
  573. #endif
  574. #ifdef CONFIG_BFIN_SIR1
  575. static struct resource bfin_sir1_resources[] = {
  576. {
  577. .start = 0xFFC02000,
  578. .end = 0xFFC020FF,
  579. .flags = IORESOURCE_MEM,
  580. },
  581. {
  582. .start = IRQ_UART1_RX,
  583. .end = IRQ_UART1_RX+1,
  584. .flags = IORESOURCE_IRQ,
  585. },
  586. {
  587. .start = CH_UART1_RX,
  588. .end = CH_UART1_RX+1,
  589. .flags = IORESOURCE_DMA,
  590. },
  591. };
  592. static struct platform_device bfin_sir1_device = {
  593. .name = "bfin_sir",
  594. .id = 1,
  595. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  596. .resource = bfin_sir1_resources,
  597. };
  598. #endif
  599. #endif
  600. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  601. static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
  602. static struct resource bfin_twi0_resource[] = {
  603. [0] = {
  604. .start = TWI0_REGBASE,
  605. .end = TWI0_REGBASE,
  606. .flags = IORESOURCE_MEM,
  607. },
  608. [1] = {
  609. .start = IRQ_TWI,
  610. .end = IRQ_TWI,
  611. .flags = IORESOURCE_IRQ,
  612. },
  613. };
  614. static struct platform_device i2c_bfin_twi_device = {
  615. .name = "i2c-bfin-twi",
  616. .id = 0,
  617. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  618. .resource = bfin_twi0_resource,
  619. .dev = {
  620. .platform_data = &bfin_twi0_pins,
  621. },
  622. };
  623. #endif
  624. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  625. #if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
  626. {
  627. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  628. },
  629. #endif
  630. #if IS_ENABLED(CONFIG_FB_BFIN_7393)
  631. {
  632. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  633. },
  634. #endif
  635. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879_I2C)
  636. {
  637. I2C_BOARD_INFO("ad7879", 0x2C),
  638. .irq = IRQ_PH14,
  639. .platform_data = (void *)&bfin_ad7879_ts_info,
  640. },
  641. #endif
  642. #if IS_ENABLED(CONFIG_SND_SOC_SSM2602)
  643. {
  644. I2C_BOARD_INFO("ssm2602", 0x1b),
  645. },
  646. #endif
  647. {
  648. I2C_BOARD_INFO("adm1192", 0x2e),
  649. },
  650. {
  651. I2C_BOARD_INFO("ltc3576", 0x09),
  652. },
  653. #if IS_ENABLED(CONFIG_INPUT_ADXL34X_I2C)
  654. {
  655. I2C_BOARD_INFO("adxl34x", 0x53),
  656. .irq = IRQ_PH13,
  657. .platform_data = (void *)&adxl345_info,
  658. },
  659. #endif
  660. };
  661. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  662. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  663. static struct resource bfin_sport0_uart_resources[] = {
  664. {
  665. .start = SPORT0_TCR1,
  666. .end = SPORT0_MRCS3+4,
  667. .flags = IORESOURCE_MEM,
  668. },
  669. {
  670. .start = IRQ_SPORT0_RX,
  671. .end = IRQ_SPORT0_RX+1,
  672. .flags = IORESOURCE_IRQ,
  673. },
  674. {
  675. .start = IRQ_SPORT0_ERROR,
  676. .end = IRQ_SPORT0_ERROR,
  677. .flags = IORESOURCE_IRQ,
  678. },
  679. };
  680. static unsigned short bfin_sport0_peripherals[] = {
  681. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  682. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  683. };
  684. static struct platform_device bfin_sport0_uart_device = {
  685. .name = "bfin-sport-uart",
  686. .id = 0,
  687. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  688. .resource = bfin_sport0_uart_resources,
  689. .dev = {
  690. .platform_data = &bfin_sport0_peripherals,
  691. /* Passed to driver */
  692. },
  693. };
  694. #endif
  695. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  696. static struct resource bfin_sport1_uart_resources[] = {
  697. {
  698. .start = SPORT1_TCR1,
  699. .end = SPORT1_MRCS3+4,
  700. .flags = IORESOURCE_MEM,
  701. },
  702. {
  703. .start = IRQ_SPORT1_RX,
  704. .end = IRQ_SPORT1_RX+1,
  705. .flags = IORESOURCE_IRQ,
  706. },
  707. {
  708. .start = IRQ_SPORT1_ERROR,
  709. .end = IRQ_SPORT1_ERROR,
  710. .flags = IORESOURCE_IRQ,
  711. },
  712. };
  713. static unsigned short bfin_sport1_peripherals[] = {
  714. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  715. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  716. };
  717. static struct platform_device bfin_sport1_uart_device = {
  718. .name = "bfin-sport-uart",
  719. .id = 1,
  720. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  721. .resource = bfin_sport1_uart_resources,
  722. .dev = {
  723. .platform_data = &bfin_sport1_peripherals,
  724. /* Passed to driver */
  725. },
  726. };
  727. #endif
  728. #endif
  729. static const unsigned int cclk_vlev_datasheet[] = {
  730. VRPAIR(VLEV_100, 400000000),
  731. VRPAIR(VLEV_105, 426000000),
  732. VRPAIR(VLEV_110, 500000000),
  733. VRPAIR(VLEV_115, 533000000),
  734. VRPAIR(VLEV_120, 600000000),
  735. };
  736. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  737. .tuple_tab = cclk_vlev_datasheet,
  738. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  739. .vr_settling_time = 25 /* us */,
  740. };
  741. static struct platform_device bfin_dpmc = {
  742. .name = "bfin dpmc",
  743. .dev = {
  744. .platform_data = &bfin_dmpc_vreg_data,
  745. },
  746. };
  747. static struct platform_device *tll6527m_devices[] __initdata = {
  748. &bfin_dpmc,
  749. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  750. &rtc_device,
  751. #endif
  752. #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
  753. &musb_device,
  754. #endif
  755. #if IS_ENABLED(CONFIG_BFIN_MAC)
  756. &bfin_mii_bus,
  757. &bfin_mac_device,
  758. #endif
  759. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  760. &bfin_spi0_device,
  761. #endif
  762. #if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
  763. &bfin_lq035q1_device,
  764. #endif
  765. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  766. #ifdef CONFIG_SERIAL_BFIN_UART0
  767. &bfin_uart0_device,
  768. #endif
  769. #ifdef CONFIG_SERIAL_BFIN_UART1
  770. &bfin_uart1_device,
  771. #endif
  772. #endif
  773. #if IS_ENABLED(CONFIG_BFIN_SIR)
  774. #ifdef CONFIG_BFIN_SIR0
  775. &bfin_sir0_device,
  776. #endif
  777. #ifdef CONFIG_BFIN_SIR1
  778. &bfin_sir1_device,
  779. #endif
  780. #endif
  781. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  782. &i2c_bfin_twi_device,
  783. #endif
  784. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  785. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  786. &bfin_sport0_uart_device,
  787. #endif
  788. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  789. &bfin_sport1_uart_device,
  790. #endif
  791. #endif
  792. #if IS_ENABLED(CONFIG_MTD_GPIO_ADDR)
  793. &tll6527m_flash_device,
  794. #endif
  795. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
  796. &bfin_i2s,
  797. #endif
  798. #if IS_ENABLED(CONFIG_GPIO_DECODER)
  799. &spi_decoded_gpio,
  800. #endif
  801. };
  802. static int __init tll6527m_init(void)
  803. {
  804. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  805. i2c_register_board_info(0, bfin_i2c_board_info,
  806. ARRAY_SIZE(bfin_i2c_board_info));
  807. platform_add_devices(tll6527m_devices, ARRAY_SIZE(tll6527m_devices));
  808. spi_register_board_info(bfin_spi_board_info,
  809. ARRAY_SIZE(bfin_spi_board_info));
  810. return 0;
  811. }
  812. arch_initcall(tll6527m_init);
  813. static struct platform_device *tll6527m_early_devices[] __initdata = {
  814. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  815. #ifdef CONFIG_SERIAL_BFIN_UART0
  816. &bfin_uart0_device,
  817. #endif
  818. #ifdef CONFIG_SERIAL_BFIN_UART1
  819. &bfin_uart1_device,
  820. #endif
  821. #endif
  822. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  823. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  824. &bfin_sport0_uart_device,
  825. #endif
  826. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  827. &bfin_sport1_uart_device,
  828. #endif
  829. #endif
  830. };
  831. void __init native_machine_early_platform_add_devices(void)
  832. {
  833. printk(KERN_INFO "register early platform devices\n");
  834. early_platform_add_devices(tll6527m_early_devices,
  835. ARRAY_SIZE(tll6527m_early_devices));
  836. }
  837. void native_machine_restart(char *cmd)
  838. {
  839. /* workaround reboot hang when booting from SPI */
  840. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  841. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  842. }
  843. int bfin_get_ether_addr(char *addr)
  844. {
  845. /* the MAC is stored in OTP memory page 0xDF */
  846. u32 ret;
  847. u64 otp_mac;
  848. u32 (*otp_read)(u32 page, u32 flags,
  849. u64 *page_content) = (void *)0xEF00001A;
  850. ret = otp_read(0xDF, 0x00, &otp_mac);
  851. if (!(ret & 0x1)) {
  852. char *otp_mac_p = (char *)&otp_mac;
  853. for (ret = 0; ret < 6; ++ret)
  854. addr[ret] = otp_mac_p[5 - ret];
  855. }
  856. return 0;
  857. }
  858. EXPORT_SYMBOL(bfin_get_ether_addr);