dma.c 1.9 KB

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  1. /*
  2. * This file contains the simple DMA Implementation for Blackfin
  3. *
  4. * Copyright 2007-2008 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/module.h>
  9. #include <asm/blackfin.h>
  10. #include <asm/dma.h>
  11. struct dma_register * const dma_io_base_addr[MAX_DMA_CHANNELS] = {
  12. (struct dma_register *) DMA0_NEXT_DESC_PTR,
  13. (struct dma_register *) DMA1_NEXT_DESC_PTR,
  14. (struct dma_register *) DMA2_NEXT_DESC_PTR,
  15. (struct dma_register *) DMA3_NEXT_DESC_PTR,
  16. (struct dma_register *) DMA4_NEXT_DESC_PTR,
  17. (struct dma_register *) DMA5_NEXT_DESC_PTR,
  18. (struct dma_register *) DMA6_NEXT_DESC_PTR,
  19. (struct dma_register *) DMA7_NEXT_DESC_PTR,
  20. (struct dma_register *) DMA8_NEXT_DESC_PTR,
  21. (struct dma_register *) DMA9_NEXT_DESC_PTR,
  22. (struct dma_register *) DMA10_NEXT_DESC_PTR,
  23. (struct dma_register *) DMA11_NEXT_DESC_PTR,
  24. (struct dma_register *) MDMA_D0_NEXT_DESC_PTR,
  25. (struct dma_register *) MDMA_S0_NEXT_DESC_PTR,
  26. (struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
  27. (struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
  28. };
  29. EXPORT_SYMBOL(dma_io_base_addr);
  30. int channel2irq(unsigned int channel)
  31. {
  32. int ret_irq = -1;
  33. switch (channel) {
  34. case CH_PPI:
  35. ret_irq = IRQ_PPI;
  36. break;
  37. case CH_EMAC_RX:
  38. ret_irq = IRQ_MAC_RX;
  39. break;
  40. case CH_EMAC_TX:
  41. ret_irq = IRQ_MAC_TX;
  42. break;
  43. case CH_UART1_RX:
  44. ret_irq = IRQ_UART1_RX;
  45. break;
  46. case CH_UART1_TX:
  47. ret_irq = IRQ_UART1_TX;
  48. break;
  49. case CH_SPORT0_RX:
  50. ret_irq = IRQ_SPORT0_RX;
  51. break;
  52. case CH_SPORT0_TX:
  53. ret_irq = IRQ_SPORT0_TX;
  54. break;
  55. case CH_SPORT1_RX:
  56. ret_irq = IRQ_SPORT1_RX;
  57. break;
  58. case CH_SPORT1_TX:
  59. ret_irq = IRQ_SPORT1_TX;
  60. break;
  61. case CH_SPI:
  62. ret_irq = IRQ_SPI;
  63. break;
  64. case CH_UART0_RX:
  65. ret_irq = IRQ_UART0_RX;
  66. break;
  67. case CH_UART0_TX:
  68. ret_irq = IRQ_UART0_TX;
  69. break;
  70. case CH_MEM_STREAM0_SRC:
  71. case CH_MEM_STREAM0_DEST:
  72. ret_irq = IRQ_MEM_DMA0;
  73. break;
  74. case CH_MEM_STREAM1_SRC:
  75. case CH_MEM_STREAM1_DEST:
  76. ret_irq = IRQ_MEM_DMA1;
  77. break;
  78. }
  79. return ret_irq;
  80. }