cm_bf533.c 13 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/spi/mmc_spi.h>
  17. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  18. #include <linux/usb/isp1362.h>
  19. #endif
  20. #include <linux/irq.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/portmux.h>
  24. #include <asm/dpmc.h>
  25. /*
  26. * Name the Board for the /proc/cpuinfo
  27. */
  28. const char bfin_board_name[] = "Bluetechnix CM BF533";
  29. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  30. /* all SPI peripherals info goes here */
  31. #if IS_ENABLED(CONFIG_MTD_M25P80)
  32. static struct mtd_partition bfin_spi_flash_partitions[] = {
  33. {
  34. .name = "bootloader(spi)",
  35. .size = 0x00020000,
  36. .offset = 0,
  37. .mask_flags = MTD_CAP_ROM
  38. }, {
  39. .name = "linux kernel(spi)",
  40. .size = 0xe0000,
  41. .offset = 0x20000
  42. }, {
  43. .name = "file system(spi)",
  44. .size = 0x700000,
  45. .offset = 0x00100000,
  46. }
  47. };
  48. static struct flash_platform_data bfin_spi_flash_data = {
  49. .name = "m25p80",
  50. .parts = bfin_spi_flash_partitions,
  51. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  52. .type = "m25p64",
  53. };
  54. /* SPI flash chip (m25p64) */
  55. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  56. .enable_dma = 0, /* use dma transfer with this chip*/
  57. };
  58. #endif
  59. #if IS_ENABLED(CONFIG_MMC_SPI)
  60. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  61. .enable_dma = 0,
  62. };
  63. #endif
  64. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  65. #if IS_ENABLED(CONFIG_MTD_M25P80)
  66. {
  67. /* the modalias must be the same as spi device driver name */
  68. .modalias = "m25p80", /* Name of spi_driver for this device */
  69. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  70. .bus_num = 0, /* Framework bus number */
  71. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  72. .platform_data = &bfin_spi_flash_data,
  73. .controller_data = &spi_flash_chip_info,
  74. .mode = SPI_MODE_3,
  75. },
  76. #endif
  77. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
  78. {
  79. .modalias = "ad183x",
  80. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  81. .bus_num = 0,
  82. .chip_select = 4,
  83. },
  84. #endif
  85. #if IS_ENABLED(CONFIG_MMC_SPI)
  86. {
  87. .modalias = "mmc_spi",
  88. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  89. .bus_num = 0,
  90. .chip_select = 1,
  91. .controller_data = &mmc_spi_chip_info,
  92. .mode = SPI_MODE_3,
  93. },
  94. #endif
  95. };
  96. /* SPI (0) */
  97. static struct resource bfin_spi0_resource[] = {
  98. [0] = {
  99. .start = SPI0_REGBASE,
  100. .end = SPI0_REGBASE + 0xFF,
  101. .flags = IORESOURCE_MEM,
  102. },
  103. [1] = {
  104. .start = CH_SPI,
  105. .end = CH_SPI,
  106. .flags = IORESOURCE_DMA,
  107. },
  108. [2] = {
  109. .start = IRQ_SPI,
  110. .end = IRQ_SPI,
  111. .flags = IORESOURCE_IRQ,
  112. }
  113. };
  114. /* SPI controller data */
  115. static struct bfin5xx_spi_master bfin_spi0_info = {
  116. .num_chipselect = 8,
  117. .enable_dma = 1, /* master has the ability to do dma transfer */
  118. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  119. };
  120. static struct platform_device bfin_spi0_device = {
  121. .name = "bfin-spi",
  122. .id = 0, /* Bus number */
  123. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  124. .resource = bfin_spi0_resource,
  125. .dev = {
  126. .platform_data = &bfin_spi0_info, /* Passed to driver */
  127. },
  128. };
  129. #endif /* spi master and devices */
  130. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  131. static struct platform_device rtc_device = {
  132. .name = "rtc-bfin",
  133. .id = -1,
  134. };
  135. #endif
  136. #if IS_ENABLED(CONFIG_SMC91X)
  137. #include <linux/smc91x.h>
  138. static struct smc91x_platdata smc91x_info = {
  139. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  140. .leda = RPC_LED_100_10,
  141. .ledb = RPC_LED_TX_RX,
  142. };
  143. static struct resource smc91x_resources[] = {
  144. {
  145. .start = 0x20200300,
  146. .end = 0x20200300 + 16,
  147. .flags = IORESOURCE_MEM,
  148. }, {
  149. .start = IRQ_PF0,
  150. .end = IRQ_PF0,
  151. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  152. },
  153. };
  154. static struct platform_device smc91x_device = {
  155. .name = "smc91x",
  156. .id = 0,
  157. .num_resources = ARRAY_SIZE(smc91x_resources),
  158. .resource = smc91x_resources,
  159. .dev = {
  160. .platform_data = &smc91x_info,
  161. },
  162. };
  163. #endif
  164. #if IS_ENABLED(CONFIG_SMSC911X)
  165. #include <linux/smsc911x.h>
  166. static struct resource smsc911x_resources[] = {
  167. {
  168. .name = "smsc911x-memory",
  169. .start = 0x20308000,
  170. .end = 0x20308000 + 0xFF,
  171. .flags = IORESOURCE_MEM,
  172. }, {
  173. .start = IRQ_PF8,
  174. .end = IRQ_PF8,
  175. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  176. },
  177. };
  178. static struct smsc911x_platform_config smsc911x_config = {
  179. .flags = SMSC911X_USE_16BIT,
  180. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  181. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  182. .phy_interface = PHY_INTERFACE_MODE_MII,
  183. };
  184. static struct platform_device smsc911x_device = {
  185. .name = "smsc911x",
  186. .id = 0,
  187. .num_resources = ARRAY_SIZE(smsc911x_resources),
  188. .resource = smsc911x_resources,
  189. .dev = {
  190. .platform_data = &smsc911x_config,
  191. },
  192. };
  193. #endif
  194. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  195. #ifdef CONFIG_SERIAL_BFIN_UART0
  196. static struct resource bfin_uart0_resources[] = {
  197. {
  198. .start = BFIN_UART_THR,
  199. .end = BFIN_UART_GCTL+2,
  200. .flags = IORESOURCE_MEM,
  201. },
  202. {
  203. .start = IRQ_UART0_TX,
  204. .end = IRQ_UART0_TX,
  205. .flags = IORESOURCE_IRQ,
  206. },
  207. {
  208. .start = IRQ_UART0_RX,
  209. .end = IRQ_UART0_RX,
  210. .flags = IORESOURCE_IRQ,
  211. },
  212. {
  213. .start = IRQ_UART0_ERROR,
  214. .end = IRQ_UART0_ERROR,
  215. .flags = IORESOURCE_IRQ,
  216. },
  217. {
  218. .start = CH_UART0_TX,
  219. .end = CH_UART0_TX,
  220. .flags = IORESOURCE_DMA,
  221. },
  222. {
  223. .start = CH_UART0_RX,
  224. .end = CH_UART0_RX,
  225. .flags = IORESOURCE_DMA,
  226. },
  227. };
  228. static unsigned short bfin_uart0_peripherals[] = {
  229. P_UART0_TX, P_UART0_RX, 0
  230. };
  231. static struct platform_device bfin_uart0_device = {
  232. .name = "bfin-uart",
  233. .id = 0,
  234. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  235. .resource = bfin_uart0_resources,
  236. .dev = {
  237. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  238. },
  239. };
  240. #endif
  241. #endif
  242. #if IS_ENABLED(CONFIG_BFIN_SIR)
  243. #ifdef CONFIG_BFIN_SIR0
  244. static struct resource bfin_sir0_resources[] = {
  245. {
  246. .start = 0xFFC00400,
  247. .end = 0xFFC004FF,
  248. .flags = IORESOURCE_MEM,
  249. },
  250. {
  251. .start = IRQ_UART0_RX,
  252. .end = IRQ_UART0_RX+1,
  253. .flags = IORESOURCE_IRQ,
  254. },
  255. {
  256. .start = CH_UART0_RX,
  257. .end = CH_UART0_RX+1,
  258. .flags = IORESOURCE_DMA,
  259. },
  260. };
  261. static struct platform_device bfin_sir0_device = {
  262. .name = "bfin_sir",
  263. .id = 0,
  264. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  265. .resource = bfin_sir0_resources,
  266. };
  267. #endif
  268. #endif
  269. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  270. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  271. static struct resource bfin_sport0_uart_resources[] = {
  272. {
  273. .start = SPORT0_TCR1,
  274. .end = SPORT0_MRCS3+4,
  275. .flags = IORESOURCE_MEM,
  276. },
  277. {
  278. .start = IRQ_SPORT0_RX,
  279. .end = IRQ_SPORT0_RX+1,
  280. .flags = IORESOURCE_IRQ,
  281. },
  282. {
  283. .start = IRQ_SPORT0_ERROR,
  284. .end = IRQ_SPORT0_ERROR,
  285. .flags = IORESOURCE_IRQ,
  286. },
  287. };
  288. static unsigned short bfin_sport0_peripherals[] = {
  289. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  290. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  291. };
  292. static struct platform_device bfin_sport0_uart_device = {
  293. .name = "bfin-sport-uart",
  294. .id = 0,
  295. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  296. .resource = bfin_sport0_uart_resources,
  297. .dev = {
  298. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  299. },
  300. };
  301. #endif
  302. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  303. static struct resource bfin_sport1_uart_resources[] = {
  304. {
  305. .start = SPORT1_TCR1,
  306. .end = SPORT1_MRCS3+4,
  307. .flags = IORESOURCE_MEM,
  308. },
  309. {
  310. .start = IRQ_SPORT1_RX,
  311. .end = IRQ_SPORT1_RX+1,
  312. .flags = IORESOURCE_IRQ,
  313. },
  314. {
  315. .start = IRQ_SPORT1_ERROR,
  316. .end = IRQ_SPORT1_ERROR,
  317. .flags = IORESOURCE_IRQ,
  318. },
  319. };
  320. static unsigned short bfin_sport1_peripherals[] = {
  321. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  322. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  323. };
  324. static struct platform_device bfin_sport1_uart_device = {
  325. .name = "bfin-sport-uart",
  326. .id = 1,
  327. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  328. .resource = bfin_sport1_uart_resources,
  329. .dev = {
  330. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  331. },
  332. };
  333. #endif
  334. #endif
  335. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  336. static struct resource isp1362_hcd_resources[] = {
  337. {
  338. .start = 0x20308000,
  339. .end = 0x20308000,
  340. .flags = IORESOURCE_MEM,
  341. }, {
  342. .start = 0x20308004,
  343. .end = 0x20308004,
  344. .flags = IORESOURCE_MEM,
  345. }, {
  346. .start = IRQ_PF4,
  347. .end = IRQ_PF4,
  348. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  349. },
  350. };
  351. static struct isp1362_platform_data isp1362_priv = {
  352. .sel15Kres = 1,
  353. .clknotstop = 0,
  354. .oc_enable = 0,
  355. .int_act_high = 0,
  356. .int_edge_triggered = 0,
  357. .remote_wakeup_connected = 0,
  358. .no_power_switching = 1,
  359. .power_switching_mode = 0,
  360. };
  361. static struct platform_device isp1362_hcd_device = {
  362. .name = "isp1362-hcd",
  363. .id = 0,
  364. .dev = {
  365. .platform_data = &isp1362_priv,
  366. },
  367. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  368. .resource = isp1362_hcd_resources,
  369. };
  370. #endif
  371. #if IS_ENABLED(CONFIG_USB_NET2272)
  372. static struct resource net2272_bfin_resources[] = {
  373. {
  374. .start = 0x20300000,
  375. .end = 0x20300000 + 0x100,
  376. .flags = IORESOURCE_MEM,
  377. }, {
  378. .start = IRQ_PF6,
  379. .end = IRQ_PF6,
  380. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  381. },
  382. };
  383. static struct platform_device net2272_bfin_device = {
  384. .name = "net2272",
  385. .id = -1,
  386. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  387. .resource = net2272_bfin_resources,
  388. };
  389. #endif
  390. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  391. static struct mtd_partition para_partitions[] = {
  392. {
  393. .name = "bootloader(nor)",
  394. .size = 0x40000,
  395. .offset = 0,
  396. }, {
  397. .name = "linux+rootfs(nor)",
  398. .size = MTDPART_SIZ_FULL,
  399. .offset = MTDPART_OFS_APPEND,
  400. },
  401. };
  402. static struct physmap_flash_data para_flash_data = {
  403. .width = 2,
  404. .parts = para_partitions,
  405. .nr_parts = ARRAY_SIZE(para_partitions),
  406. };
  407. static struct resource para_flash_resource = {
  408. .start = 0x20000000,
  409. .end = 0x201fffff,
  410. .flags = IORESOURCE_MEM,
  411. };
  412. static struct platform_device para_flash_device = {
  413. .name = "physmap-flash",
  414. .id = 0,
  415. .dev = {
  416. .platform_data = &para_flash_data,
  417. },
  418. .num_resources = 1,
  419. .resource = &para_flash_resource,
  420. };
  421. #endif
  422. static const unsigned int cclk_vlev_datasheet[] =
  423. {
  424. VRPAIR(VLEV_085, 250000000),
  425. VRPAIR(VLEV_090, 376000000),
  426. VRPAIR(VLEV_095, 426000000),
  427. VRPAIR(VLEV_100, 426000000),
  428. VRPAIR(VLEV_105, 476000000),
  429. VRPAIR(VLEV_110, 476000000),
  430. VRPAIR(VLEV_115, 476000000),
  431. VRPAIR(VLEV_120, 600000000),
  432. VRPAIR(VLEV_125, 600000000),
  433. VRPAIR(VLEV_130, 600000000),
  434. };
  435. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  436. .tuple_tab = cclk_vlev_datasheet,
  437. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  438. .vr_settling_time = 25 /* us */,
  439. };
  440. static struct platform_device bfin_dpmc = {
  441. .name = "bfin dpmc",
  442. .dev = {
  443. .platform_data = &bfin_dmpc_vreg_data,
  444. },
  445. };
  446. static struct platform_device *cm_bf533_devices[] __initdata = {
  447. &bfin_dpmc,
  448. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  449. #ifdef CONFIG_SERIAL_BFIN_UART0
  450. &bfin_uart0_device,
  451. #endif
  452. #endif
  453. #if IS_ENABLED(CONFIG_BFIN_SIR)
  454. #ifdef CONFIG_BFIN_SIR0
  455. &bfin_sir0_device,
  456. #endif
  457. #endif
  458. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  459. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  460. &bfin_sport0_uart_device,
  461. #endif
  462. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  463. &bfin_sport1_uart_device,
  464. #endif
  465. #endif
  466. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  467. &rtc_device,
  468. #endif
  469. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  470. &isp1362_hcd_device,
  471. #endif
  472. #if IS_ENABLED(CONFIG_SMC91X)
  473. &smc91x_device,
  474. #endif
  475. #if IS_ENABLED(CONFIG_SMSC911X)
  476. &smsc911x_device,
  477. #endif
  478. #if IS_ENABLED(CONFIG_USB_NET2272)
  479. &net2272_bfin_device,
  480. #endif
  481. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  482. &bfin_spi0_device,
  483. #endif
  484. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  485. &para_flash_device,
  486. #endif
  487. };
  488. static int __init cm_bf533_init(void)
  489. {
  490. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  491. platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices));
  492. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  493. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  494. #endif
  495. return 0;
  496. }
  497. arch_initcall(cm_bf533_init);
  498. static struct platform_device *cm_bf533_early_devices[] __initdata = {
  499. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  500. #ifdef CONFIG_SERIAL_BFIN_UART0
  501. &bfin_uart0_device,
  502. #endif
  503. #endif
  504. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  505. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  506. &bfin_sport0_uart_device,
  507. #endif
  508. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  509. &bfin_sport1_uart_device,
  510. #endif
  511. #endif
  512. };
  513. void __init native_machine_early_platform_add_devices(void)
  514. {
  515. printk(KERN_INFO "register early platform devices\n");
  516. early_platform_add_devices(cm_bf533_early_devices,
  517. ARRAY_SIZE(cm_bf533_early_devices));
  518. }