cm_bf537e.c 20 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/export.h>
  11. #include <linux/etherdevice.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mtd/mtd.h>
  14. #include <linux/mtd/partitions.h>
  15. #include <linux/mtd/physmap.h>
  16. #include <linux/spi/spi.h>
  17. #include <linux/spi/flash.h>
  18. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  19. #include <linux/usb/isp1362.h>
  20. #endif
  21. #include <linux/ata_platform.h>
  22. #include <linux/irq.h>
  23. #include <linux/gpio.h>
  24. #include <asm/dma.h>
  25. #include <asm/bfin5xx_spi.h>
  26. #include <asm/portmux.h>
  27. #include <asm/dpmc.h>
  28. #include <asm/bfin_sport.h>
  29. /*
  30. * Name the Board for the /proc/cpuinfo
  31. */
  32. const char bfin_board_name[] = "Bluetechnix CM BF537E";
  33. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  34. /* all SPI peripherals info goes here */
  35. #if IS_ENABLED(CONFIG_MTD_M25P80)
  36. static struct mtd_partition bfin_spi_flash_partitions[] = {
  37. {
  38. .name = "bootloader(spi)",
  39. .size = 0x00020000,
  40. .offset = 0,
  41. .mask_flags = MTD_CAP_ROM
  42. }, {
  43. .name = "linux kernel(spi)",
  44. .size = 0xe0000,
  45. .offset = 0x20000
  46. }, {
  47. .name = "file system(spi)",
  48. .size = 0x700000,
  49. .offset = 0x00100000,
  50. }
  51. };
  52. static struct flash_platform_data bfin_spi_flash_data = {
  53. .name = "m25p80",
  54. .parts = bfin_spi_flash_partitions,
  55. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  56. .type = "m25p64",
  57. };
  58. /* SPI flash chip (m25p64) */
  59. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  60. .enable_dma = 0, /* use dma transfer with this chip*/
  61. };
  62. #endif
  63. #if IS_ENABLED(CONFIG_MMC_SPI)
  64. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  65. .enable_dma = 0,
  66. };
  67. #endif
  68. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  69. #if IS_ENABLED(CONFIG_MTD_M25P80)
  70. {
  71. /* the modalias must be the same as spi device driver name */
  72. .modalias = "m25p80", /* Name of spi_driver for this device */
  73. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  74. .bus_num = 0, /* Framework bus number */
  75. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  76. .platform_data = &bfin_spi_flash_data,
  77. .controller_data = &spi_flash_chip_info,
  78. .mode = SPI_MODE_3,
  79. },
  80. #endif
  81. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
  82. {
  83. .modalias = "ad183x",
  84. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  85. .bus_num = 0,
  86. .chip_select = 4,
  87. },
  88. #endif
  89. #if IS_ENABLED(CONFIG_MMC_SPI)
  90. {
  91. .modalias = "mmc_spi",
  92. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  93. .bus_num = 0,
  94. .chip_select = 1,
  95. .controller_data = &mmc_spi_chip_info,
  96. .mode = SPI_MODE_3,
  97. },
  98. #endif
  99. };
  100. /* SPI (0) */
  101. static struct resource bfin_spi0_resource[] = {
  102. [0] = {
  103. .start = SPI0_REGBASE,
  104. .end = SPI0_REGBASE + 0xFF,
  105. .flags = IORESOURCE_MEM,
  106. },
  107. [1] = {
  108. .start = CH_SPI,
  109. .end = CH_SPI,
  110. .flags = IORESOURCE_DMA,
  111. },
  112. [2] = {
  113. .start = IRQ_SPI,
  114. .end = IRQ_SPI,
  115. .flags = IORESOURCE_IRQ,
  116. },
  117. };
  118. /* SPI controller data */
  119. static struct bfin5xx_spi_master bfin_spi0_info = {
  120. .num_chipselect = 8,
  121. .enable_dma = 1, /* master has the ability to do dma transfer */
  122. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  123. };
  124. static struct platform_device bfin_spi0_device = {
  125. .name = "bfin-spi",
  126. .id = 0, /* Bus number */
  127. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  128. .resource = bfin_spi0_resource,
  129. .dev = {
  130. .platform_data = &bfin_spi0_info, /* Passed to driver */
  131. },
  132. };
  133. #endif /* spi master and devices */
  134. #if IS_ENABLED(CONFIG_SPI_BFIN_SPORT)
  135. /* SPORT SPI controller data */
  136. static struct bfin5xx_spi_master bfin_sport_spi0_info = {
  137. .num_chipselect = MAX_BLACKFIN_GPIOS,
  138. .enable_dma = 0, /* master don't support DMA */
  139. .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
  140. P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
  141. };
  142. static struct resource bfin_sport_spi0_resource[] = {
  143. [0] = {
  144. .start = SPORT0_TCR1,
  145. .end = SPORT0_TCR1 + 0xFF,
  146. .flags = IORESOURCE_MEM,
  147. },
  148. [1] = {
  149. .start = IRQ_SPORT0_ERROR,
  150. .end = IRQ_SPORT0_ERROR,
  151. .flags = IORESOURCE_IRQ,
  152. },
  153. };
  154. static struct platform_device bfin_sport_spi0_device = {
  155. .name = "bfin-sport-spi",
  156. .id = 1, /* Bus number */
  157. .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
  158. .resource = bfin_sport_spi0_resource,
  159. .dev = {
  160. .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
  161. },
  162. };
  163. static struct bfin5xx_spi_master bfin_sport_spi1_info = {
  164. .num_chipselect = MAX_BLACKFIN_GPIOS,
  165. .enable_dma = 0, /* master don't support DMA */
  166. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
  167. P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
  168. };
  169. static struct resource bfin_sport_spi1_resource[] = {
  170. [0] = {
  171. .start = SPORT1_TCR1,
  172. .end = SPORT1_TCR1 + 0xFF,
  173. .flags = IORESOURCE_MEM,
  174. },
  175. [1] = {
  176. .start = IRQ_SPORT1_ERROR,
  177. .end = IRQ_SPORT1_ERROR,
  178. .flags = IORESOURCE_IRQ,
  179. },
  180. };
  181. static struct platform_device bfin_sport_spi1_device = {
  182. .name = "bfin-sport-spi",
  183. .id = 2, /* Bus number */
  184. .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
  185. .resource = bfin_sport_spi1_resource,
  186. .dev = {
  187. .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
  188. },
  189. };
  190. #endif /* sport spi master and devices */
  191. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  192. static struct platform_device rtc_device = {
  193. .name = "rtc-bfin",
  194. .id = -1,
  195. };
  196. #endif
  197. #if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
  198. static struct platform_device hitachi_fb_device = {
  199. .name = "hitachi-tx09",
  200. };
  201. #endif
  202. #if IS_ENABLED(CONFIG_SMC91X)
  203. #include <linux/smc91x.h>
  204. static struct smc91x_platdata smc91x_info = {
  205. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  206. .leda = RPC_LED_100_10,
  207. .ledb = RPC_LED_TX_RX,
  208. };
  209. static struct resource smc91x_resources[] = {
  210. {
  211. .start = 0x20200300,
  212. .end = 0x20200300 + 16,
  213. .flags = IORESOURCE_MEM,
  214. }, {
  215. .start = IRQ_PF14,
  216. .end = IRQ_PF14,
  217. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  218. },
  219. };
  220. static struct platform_device smc91x_device = {
  221. .name = "smc91x",
  222. .id = 0,
  223. .num_resources = ARRAY_SIZE(smc91x_resources),
  224. .resource = smc91x_resources,
  225. .dev = {
  226. .platform_data = &smc91x_info,
  227. },
  228. };
  229. #endif
  230. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  231. static struct resource isp1362_hcd_resources[] = {
  232. {
  233. .start = 0x20308000,
  234. .end = 0x20308000,
  235. .flags = IORESOURCE_MEM,
  236. }, {
  237. .start = 0x20308004,
  238. .end = 0x20308004,
  239. .flags = IORESOURCE_MEM,
  240. }, {
  241. .start = IRQ_PG15,
  242. .end = IRQ_PG15,
  243. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  244. },
  245. };
  246. static struct isp1362_platform_data isp1362_priv = {
  247. .sel15Kres = 1,
  248. .clknotstop = 0,
  249. .oc_enable = 0,
  250. .int_act_high = 0,
  251. .int_edge_triggered = 0,
  252. .remote_wakeup_connected = 0,
  253. .no_power_switching = 1,
  254. .power_switching_mode = 0,
  255. };
  256. static struct platform_device isp1362_hcd_device = {
  257. .name = "isp1362-hcd",
  258. .id = 0,
  259. .dev = {
  260. .platform_data = &isp1362_priv,
  261. },
  262. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  263. .resource = isp1362_hcd_resources,
  264. };
  265. #endif
  266. #if IS_ENABLED(CONFIG_USB_NET2272)
  267. static struct resource net2272_bfin_resources[] = {
  268. {
  269. .start = 0x20300000,
  270. .end = 0x20300000 + 0x100,
  271. .flags = IORESOURCE_MEM,
  272. }, {
  273. .start = IRQ_PG13,
  274. .end = IRQ_PG13,
  275. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  276. },
  277. };
  278. static struct platform_device net2272_bfin_device = {
  279. .name = "net2272",
  280. .id = -1,
  281. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  282. .resource = net2272_bfin_resources,
  283. };
  284. #endif
  285. #if IS_ENABLED(CONFIG_MTD_GPIO_ADDR)
  286. static struct mtd_partition cm_partitions[] = {
  287. {
  288. .name = "bootloader(nor)",
  289. .size = 0x40000,
  290. .offset = 0,
  291. }, {
  292. .name = "linux kernel(nor)",
  293. .size = 0x100000,
  294. .offset = MTDPART_OFS_APPEND,
  295. }, {
  296. .name = "file system(nor)",
  297. .size = MTDPART_SIZ_FULL,
  298. .offset = MTDPART_OFS_APPEND,
  299. }
  300. };
  301. static struct physmap_flash_data cm_flash_data = {
  302. .width = 2,
  303. .parts = cm_partitions,
  304. .nr_parts = ARRAY_SIZE(cm_partitions),
  305. };
  306. static unsigned cm_flash_gpios[] = { GPIO_PF4 };
  307. static struct resource cm_flash_resource[] = {
  308. {
  309. .name = "cfi_probe",
  310. .start = 0x20000000,
  311. .end = 0x201fffff,
  312. .flags = IORESOURCE_MEM,
  313. }, {
  314. .start = (unsigned long)cm_flash_gpios,
  315. .end = ARRAY_SIZE(cm_flash_gpios),
  316. .flags = IORESOURCE_IRQ,
  317. }
  318. };
  319. static struct platform_device cm_flash_device = {
  320. .name = "gpio-addr-flash",
  321. .id = 0,
  322. .dev = {
  323. .platform_data = &cm_flash_data,
  324. },
  325. .num_resources = ARRAY_SIZE(cm_flash_resource),
  326. .resource = cm_flash_resource,
  327. };
  328. #endif
  329. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  330. #ifdef CONFIG_SERIAL_BFIN_UART0
  331. static struct resource bfin_uart0_resources[] = {
  332. {
  333. .start = UART0_THR,
  334. .end = UART0_GCTL+2,
  335. .flags = IORESOURCE_MEM,
  336. },
  337. {
  338. .start = IRQ_UART0_TX,
  339. .end = IRQ_UART0_TX,
  340. .flags = IORESOURCE_IRQ,
  341. },
  342. {
  343. .start = IRQ_UART0_RX,
  344. .end = IRQ_UART0_RX,
  345. .flags = IORESOURCE_IRQ,
  346. },
  347. {
  348. .start = IRQ_UART0_ERROR,
  349. .end = IRQ_UART0_ERROR,
  350. .flags = IORESOURCE_IRQ,
  351. },
  352. {
  353. .start = CH_UART0_TX,
  354. .end = CH_UART0_TX,
  355. .flags = IORESOURCE_DMA,
  356. },
  357. {
  358. .start = CH_UART0_RX,
  359. .end = CH_UART0_RX,
  360. .flags = IORESOURCE_DMA,
  361. },
  362. #ifdef CONFIG_BFIN_UART0_CTSRTS
  363. {
  364. /*
  365. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  366. */
  367. .start = -1,
  368. .end = -1,
  369. .flags = IORESOURCE_IO,
  370. },
  371. {
  372. /*
  373. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  374. */
  375. .start = -1,
  376. .end = -1,
  377. .flags = IORESOURCE_IO,
  378. },
  379. #endif
  380. };
  381. static unsigned short bfin_uart0_peripherals[] = {
  382. P_UART0_TX, P_UART0_RX, 0
  383. };
  384. static struct platform_device bfin_uart0_device = {
  385. .name = "bfin-uart",
  386. .id = 0,
  387. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  388. .resource = bfin_uart0_resources,
  389. .dev = {
  390. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  391. },
  392. };
  393. #endif
  394. #ifdef CONFIG_SERIAL_BFIN_UART1
  395. static struct resource bfin_uart1_resources[] = {
  396. {
  397. .start = UART1_THR,
  398. .end = UART1_GCTL+2,
  399. .flags = IORESOURCE_MEM,
  400. },
  401. {
  402. .start = IRQ_UART1_TX,
  403. .end = IRQ_UART1_TX,
  404. .flags = IORESOURCE_IRQ,
  405. },
  406. {
  407. .start = IRQ_UART1_RX,
  408. .end = IRQ_UART1_RX,
  409. .flags = IORESOURCE_IRQ,
  410. },
  411. {
  412. .start = IRQ_UART1_ERROR,
  413. .end = IRQ_UART1_ERROR,
  414. .flags = IORESOURCE_IRQ,
  415. },
  416. {
  417. .start = CH_UART1_TX,
  418. .end = CH_UART1_TX,
  419. .flags = IORESOURCE_DMA,
  420. },
  421. {
  422. .start = CH_UART1_RX,
  423. .end = CH_UART1_RX,
  424. .flags = IORESOURCE_DMA,
  425. },
  426. #ifdef CONFIG_BFIN_UART1_CTSRTS
  427. {
  428. /*
  429. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  430. */
  431. .start = -1,
  432. .end = -1,
  433. .flags = IORESOURCE_IO,
  434. },
  435. {
  436. /*
  437. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  438. */
  439. .start = -1,
  440. .end = -1,
  441. .flags = IORESOURCE_IO,
  442. },
  443. #endif
  444. };
  445. static unsigned short bfin_uart1_peripherals[] = {
  446. P_UART1_TX, P_UART1_RX, 0
  447. };
  448. static struct platform_device bfin_uart1_device = {
  449. .name = "bfin-uart",
  450. .id = 1,
  451. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  452. .resource = bfin_uart1_resources,
  453. .dev = {
  454. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  455. },
  456. };
  457. #endif
  458. #endif
  459. #if IS_ENABLED(CONFIG_BFIN_SIR)
  460. #ifdef CONFIG_BFIN_SIR0
  461. static struct resource bfin_sir0_resources[] = {
  462. {
  463. .start = 0xFFC00400,
  464. .end = 0xFFC004FF,
  465. .flags = IORESOURCE_MEM,
  466. },
  467. {
  468. .start = IRQ_UART0_RX,
  469. .end = IRQ_UART0_RX+1,
  470. .flags = IORESOURCE_IRQ,
  471. },
  472. {
  473. .start = CH_UART0_RX,
  474. .end = CH_UART0_RX+1,
  475. .flags = IORESOURCE_DMA,
  476. },
  477. };
  478. static struct platform_device bfin_sir0_device = {
  479. .name = "bfin_sir",
  480. .id = 0,
  481. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  482. .resource = bfin_sir0_resources,
  483. };
  484. #endif
  485. #ifdef CONFIG_BFIN_SIR1
  486. static struct resource bfin_sir1_resources[] = {
  487. {
  488. .start = 0xFFC02000,
  489. .end = 0xFFC020FF,
  490. .flags = IORESOURCE_MEM,
  491. },
  492. {
  493. .start = IRQ_UART1_RX,
  494. .end = IRQ_UART1_RX+1,
  495. .flags = IORESOURCE_IRQ,
  496. },
  497. {
  498. .start = CH_UART1_RX,
  499. .end = CH_UART1_RX+1,
  500. .flags = IORESOURCE_DMA,
  501. },
  502. };
  503. static struct platform_device bfin_sir1_device = {
  504. .name = "bfin_sir",
  505. .id = 1,
  506. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  507. .resource = bfin_sir1_resources,
  508. };
  509. #endif
  510. #endif
  511. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  512. static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
  513. static struct resource bfin_twi0_resource[] = {
  514. [0] = {
  515. .start = TWI0_REGBASE,
  516. .end = TWI0_REGBASE,
  517. .flags = IORESOURCE_MEM,
  518. },
  519. [1] = {
  520. .start = IRQ_TWI,
  521. .end = IRQ_TWI,
  522. .flags = IORESOURCE_IRQ,
  523. },
  524. };
  525. static struct platform_device i2c_bfin_twi_device = {
  526. .name = "i2c-bfin-twi",
  527. .id = 0,
  528. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  529. .resource = bfin_twi0_resource,
  530. .dev = {
  531. .platform_data = &bfin_twi0_pins,
  532. },
  533. };
  534. #endif
  535. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT) \
  536. || IS_ENABLED(CONFIG_BFIN_SPORT)
  537. unsigned short bfin_sport0_peripherals[] = {
  538. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  539. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  540. };
  541. #endif
  542. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  543. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  544. static struct resource bfin_sport0_uart_resources[] = {
  545. {
  546. .start = SPORT0_TCR1,
  547. .end = SPORT0_MRCS3+4,
  548. .flags = IORESOURCE_MEM,
  549. },
  550. {
  551. .start = IRQ_SPORT0_RX,
  552. .end = IRQ_SPORT0_RX+1,
  553. .flags = IORESOURCE_IRQ,
  554. },
  555. {
  556. .start = IRQ_SPORT0_ERROR,
  557. .end = IRQ_SPORT0_ERROR,
  558. .flags = IORESOURCE_IRQ,
  559. },
  560. };
  561. static struct platform_device bfin_sport0_uart_device = {
  562. .name = "bfin-sport-uart",
  563. .id = 0,
  564. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  565. .resource = bfin_sport0_uart_resources,
  566. .dev = {
  567. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  568. },
  569. };
  570. #endif
  571. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  572. static struct resource bfin_sport1_uart_resources[] = {
  573. {
  574. .start = SPORT1_TCR1,
  575. .end = SPORT1_MRCS3+4,
  576. .flags = IORESOURCE_MEM,
  577. },
  578. {
  579. .start = IRQ_SPORT1_RX,
  580. .end = IRQ_SPORT1_RX+1,
  581. .flags = IORESOURCE_IRQ,
  582. },
  583. {
  584. .start = IRQ_SPORT1_ERROR,
  585. .end = IRQ_SPORT1_ERROR,
  586. .flags = IORESOURCE_IRQ,
  587. },
  588. };
  589. static unsigned short bfin_sport1_peripherals[] = {
  590. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  591. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  592. };
  593. static struct platform_device bfin_sport1_uart_device = {
  594. .name = "bfin-sport-uart",
  595. .id = 1,
  596. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  597. .resource = bfin_sport1_uart_resources,
  598. .dev = {
  599. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  600. },
  601. };
  602. #endif
  603. #endif
  604. #if IS_ENABLED(CONFIG_BFIN_SPORT)
  605. static struct resource bfin_sport0_resources[] = {
  606. {
  607. .start = SPORT0_TCR1,
  608. .end = SPORT0_MRCS3+4,
  609. .flags = IORESOURCE_MEM,
  610. },
  611. {
  612. .start = IRQ_SPORT0_RX,
  613. .end = IRQ_SPORT0_RX+1,
  614. .flags = IORESOURCE_IRQ,
  615. },
  616. {
  617. .start = IRQ_SPORT0_TX,
  618. .end = IRQ_SPORT0_TX+1,
  619. .flags = IORESOURCE_IRQ,
  620. },
  621. {
  622. .start = IRQ_SPORT0_ERROR,
  623. .end = IRQ_SPORT0_ERROR,
  624. .flags = IORESOURCE_IRQ,
  625. },
  626. {
  627. .start = CH_SPORT0_TX,
  628. .end = CH_SPORT0_TX,
  629. .flags = IORESOURCE_DMA,
  630. },
  631. {
  632. .start = CH_SPORT0_RX,
  633. .end = CH_SPORT0_RX,
  634. .flags = IORESOURCE_DMA,
  635. },
  636. };
  637. static struct platform_device bfin_sport0_device = {
  638. .name = "bfin_sport_raw",
  639. .id = 0,
  640. .num_resources = ARRAY_SIZE(bfin_sport0_resources),
  641. .resource = bfin_sport0_resources,
  642. .dev = {
  643. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  644. },
  645. };
  646. #endif
  647. #if IS_ENABLED(CONFIG_BFIN_MAC)
  648. #include <linux/bfin_mac.h>
  649. static const unsigned short bfin_mac_peripherals[] = P_MII0;
  650. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  651. {
  652. .addr = 1,
  653. .irq = IRQ_MAC_PHYINT,
  654. },
  655. };
  656. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  657. .phydev_number = 1,
  658. .phydev_data = bfin_phydev_data,
  659. .phy_mode = PHY_INTERFACE_MODE_MII,
  660. .mac_peripherals = bfin_mac_peripherals,
  661. };
  662. static struct platform_device bfin_mii_bus = {
  663. .name = "bfin_mii_bus",
  664. .dev = {
  665. .platform_data = &bfin_mii_bus_data,
  666. }
  667. };
  668. static struct platform_device bfin_mac_device = {
  669. .name = "bfin_mac",
  670. .dev = {
  671. .platform_data = &bfin_mii_bus,
  672. }
  673. };
  674. #endif
  675. #if IS_ENABLED(CONFIG_PATA_PLATFORM)
  676. #define PATA_INT IRQ_PF14
  677. static struct pata_platform_info bfin_pata_platform_data = {
  678. .ioport_shift = 2,
  679. };
  680. static struct resource bfin_pata_resources[] = {
  681. {
  682. .start = 0x2030C000,
  683. .end = 0x2030C01F,
  684. .flags = IORESOURCE_MEM,
  685. },
  686. {
  687. .start = 0x2030D018,
  688. .end = 0x2030D01B,
  689. .flags = IORESOURCE_MEM,
  690. },
  691. {
  692. .start = PATA_INT,
  693. .end = PATA_INT,
  694. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  695. },
  696. };
  697. static struct platform_device bfin_pata_device = {
  698. .name = "pata_platform",
  699. .id = -1,
  700. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  701. .resource = bfin_pata_resources,
  702. .dev = {
  703. .platform_data = &bfin_pata_platform_data,
  704. }
  705. };
  706. #endif
  707. static const unsigned int cclk_vlev_datasheet[] =
  708. {
  709. VRPAIR(VLEV_085, 250000000),
  710. VRPAIR(VLEV_090, 376000000),
  711. VRPAIR(VLEV_095, 426000000),
  712. VRPAIR(VLEV_100, 426000000),
  713. VRPAIR(VLEV_105, 476000000),
  714. VRPAIR(VLEV_110, 476000000),
  715. VRPAIR(VLEV_115, 476000000),
  716. VRPAIR(VLEV_120, 500000000),
  717. VRPAIR(VLEV_125, 533000000),
  718. VRPAIR(VLEV_130, 600000000),
  719. };
  720. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  721. .tuple_tab = cclk_vlev_datasheet,
  722. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  723. .vr_settling_time = 25 /* us */,
  724. };
  725. static struct platform_device bfin_dpmc = {
  726. .name = "bfin dpmc",
  727. .dev = {
  728. .platform_data = &bfin_dmpc_vreg_data,
  729. },
  730. };
  731. static struct platform_device *cm_bf537e_devices[] __initdata = {
  732. &bfin_dpmc,
  733. #if IS_ENABLED(CONFIG_BFIN_SPORT)
  734. &bfin_sport0_device,
  735. #endif
  736. #if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
  737. &hitachi_fb_device,
  738. #endif
  739. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  740. &rtc_device,
  741. #endif
  742. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  743. #ifdef CONFIG_SERIAL_BFIN_UART0
  744. &bfin_uart0_device,
  745. #endif
  746. #ifdef CONFIG_SERIAL_BFIN_UART1
  747. &bfin_uart1_device,
  748. #endif
  749. #endif
  750. #if IS_ENABLED(CONFIG_BFIN_SIR)
  751. #ifdef CONFIG_BFIN_SIR0
  752. &bfin_sir0_device,
  753. #endif
  754. #ifdef CONFIG_BFIN_SIR1
  755. &bfin_sir1_device,
  756. #endif
  757. #endif
  758. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  759. &i2c_bfin_twi_device,
  760. #endif
  761. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  762. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  763. &bfin_sport0_uart_device,
  764. #endif
  765. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  766. &bfin_sport1_uart_device,
  767. #endif
  768. #endif
  769. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  770. &isp1362_hcd_device,
  771. #endif
  772. #if IS_ENABLED(CONFIG_SMC91X)
  773. &smc91x_device,
  774. #endif
  775. #if IS_ENABLED(CONFIG_BFIN_MAC)
  776. &bfin_mii_bus,
  777. &bfin_mac_device,
  778. #endif
  779. #if IS_ENABLED(CONFIG_USB_NET2272)
  780. &net2272_bfin_device,
  781. #endif
  782. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  783. &bfin_spi0_device,
  784. #endif
  785. #if IS_ENABLED(CONFIG_SPI_BFIN_SPORT)
  786. &bfin_sport_spi0_device,
  787. &bfin_sport_spi1_device,
  788. #endif
  789. #if IS_ENABLED(CONFIG_PATA_PLATFORM)
  790. &bfin_pata_device,
  791. #endif
  792. #if IS_ENABLED(CONFIG_MTD_GPIO_ADDR)
  793. &cm_flash_device,
  794. #endif
  795. };
  796. static int __init net2272_init(void)
  797. {
  798. #if IS_ENABLED(CONFIG_USB_NET2272)
  799. int ret;
  800. ret = gpio_request(GPIO_PG14, "net2272");
  801. if (ret)
  802. return ret;
  803. /* Reset USB Chip, PG14 */
  804. gpio_direction_output(GPIO_PG14, 0);
  805. mdelay(2);
  806. gpio_set_value(GPIO_PG14, 1);
  807. #endif
  808. return 0;
  809. }
  810. static int __init cm_bf537e_init(void)
  811. {
  812. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  813. platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices));
  814. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  815. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  816. #endif
  817. #if IS_ENABLED(CONFIG_PATA_PLATFORM)
  818. irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
  819. #endif
  820. if (net2272_init())
  821. pr_warning("unable to configure net2272; it probably won't work\n");
  822. return 0;
  823. }
  824. arch_initcall(cm_bf537e_init);
  825. static struct platform_device *cm_bf537e_early_devices[] __initdata = {
  826. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  827. #ifdef CONFIG_SERIAL_BFIN_UART0
  828. &bfin_uart0_device,
  829. #endif
  830. #ifdef CONFIG_SERIAL_BFIN_UART1
  831. &bfin_uart1_device,
  832. #endif
  833. #endif
  834. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  835. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  836. &bfin_sport0_uart_device,
  837. #endif
  838. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  839. &bfin_sport1_uart_device,
  840. #endif
  841. #endif
  842. };
  843. void __init native_machine_early_platform_add_devices(void)
  844. {
  845. printk(KERN_INFO "register early platform devices\n");
  846. early_platform_add_devices(cm_bf537e_early_devices,
  847. ARRAY_SIZE(cm_bf537e_early_devices));
  848. }
  849. int bfin_get_ether_addr(char *addr)
  850. {
  851. return 1;
  852. }
  853. EXPORT_SYMBOL(bfin_get_ether_addr);