pnav10.c 11 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/etherdevice.h>
  10. #include <linux/export.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/partitions.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/irq.h>
  17. #include <asm/dma.h>
  18. #include <asm/bfin5xx_spi.h>
  19. #include <asm/portmux.h>
  20. #include <linux/spi/ad7877.h>
  21. /*
  22. * Name the Board for the /proc/cpuinfo
  23. */
  24. const char bfin_board_name[] = "ADI PNAV-1.0";
  25. /*
  26. * Driver needs to know address, irq and flag pin.
  27. */
  28. #if IS_ENABLED(CONFIG_BFIN_CFPCMCIA)
  29. static struct resource bfin_pcmcia_cf_resources[] = {
  30. {
  31. .start = 0x20310000, /* IO PORT */
  32. .end = 0x20312000,
  33. .flags = IORESOURCE_MEM,
  34. }, {
  35. .start = 0x20311000, /* Attribute Memory */
  36. .end = 0x20311FFF,
  37. .flags = IORESOURCE_MEM,
  38. }, {
  39. .start = IRQ_PF4,
  40. .end = IRQ_PF4,
  41. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  42. }, {
  43. .start = 6, /* Card Detect PF6 */
  44. .end = 6,
  45. .flags = IORESOURCE_IRQ,
  46. },
  47. };
  48. static struct platform_device bfin_pcmcia_cf_device = {
  49. .name = "bfin_cf_pcmcia",
  50. .id = -1,
  51. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  52. .resource = bfin_pcmcia_cf_resources,
  53. };
  54. #endif
  55. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  56. static struct platform_device rtc_device = {
  57. .name = "rtc-bfin",
  58. .id = -1,
  59. };
  60. #endif
  61. #if IS_ENABLED(CONFIG_SMC91X)
  62. #include <linux/smc91x.h>
  63. static struct smc91x_platdata smc91x_info = {
  64. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  65. .leda = RPC_LED_100_10,
  66. .ledb = RPC_LED_TX_RX,
  67. };
  68. static struct resource smc91x_resources[] = {
  69. {
  70. .name = "smc91x-regs",
  71. .start = 0x20300300,
  72. .end = 0x20300300 + 16,
  73. .flags = IORESOURCE_MEM,
  74. }, {
  75. .start = IRQ_PF7,
  76. .end = IRQ_PF7,
  77. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  78. },
  79. };
  80. static struct platform_device smc91x_device = {
  81. .name = "smc91x",
  82. .id = 0,
  83. .num_resources = ARRAY_SIZE(smc91x_resources),
  84. .resource = smc91x_resources,
  85. .dev = {
  86. .platform_data = &smc91x_info,
  87. },
  88. };
  89. #endif
  90. #if IS_ENABLED(CONFIG_BFIN_MAC)
  91. #include <linux/bfin_mac.h>
  92. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  93. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  94. {
  95. .addr = 1,
  96. .irq = IRQ_MAC_PHYINT,
  97. },
  98. };
  99. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  100. .phydev_number = 1,
  101. .phydev_data = bfin_phydev_data,
  102. .phy_mode = PHY_INTERFACE_MODE_RMII,
  103. .mac_peripherals = bfin_mac_peripherals,
  104. };
  105. static struct platform_device bfin_mii_bus = {
  106. .name = "bfin_mii_bus",
  107. .dev = {
  108. .platform_data = &bfin_mii_bus_data,
  109. }
  110. };
  111. static struct platform_device bfin_mac_device = {
  112. .name = "bfin_mac",
  113. .dev = {
  114. .platform_data = &bfin_mii_bus,
  115. }
  116. };
  117. #endif
  118. #if IS_ENABLED(CONFIG_USB_NET2272)
  119. static struct resource net2272_bfin_resources[] = {
  120. {
  121. .start = 0x20300000,
  122. .end = 0x20300000 + 0x100,
  123. .flags = IORESOURCE_MEM,
  124. }, {
  125. .start = IRQ_PF7,
  126. .end = IRQ_PF7,
  127. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  128. },
  129. };
  130. static struct platform_device net2272_bfin_device = {
  131. .name = "net2272",
  132. .id = -1,
  133. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  134. .resource = net2272_bfin_resources,
  135. };
  136. #endif
  137. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  138. /* all SPI peripherals info goes here */
  139. #if IS_ENABLED(CONFIG_MTD_M25P80)
  140. static struct mtd_partition bfin_spi_flash_partitions[] = {
  141. {
  142. .name = "bootloader(spi)",
  143. .size = 0x00020000,
  144. .offset = 0,
  145. .mask_flags = MTD_CAP_ROM
  146. }, {
  147. .name = "linux kernel(spi)",
  148. .size = 0xe0000,
  149. .offset = 0x20000
  150. }, {
  151. .name = "file system(spi)",
  152. .size = 0x700000,
  153. .offset = 0x00100000,
  154. }
  155. };
  156. static struct flash_platform_data bfin_spi_flash_data = {
  157. .name = "m25p80",
  158. .parts = bfin_spi_flash_partitions,
  159. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  160. .type = "m25p64",
  161. };
  162. /* SPI flash chip (m25p64) */
  163. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  164. .enable_dma = 0, /* use dma transfer with this chip*/
  165. };
  166. #endif
  167. #if IS_ENABLED(CONFIG_MMC_SPI)
  168. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  169. .enable_dma = 0,
  170. };
  171. #endif
  172. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
  173. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  174. .model = 7877,
  175. .vref_delay_usecs = 50, /* internal, no capacitor */
  176. .x_plate_ohms = 419,
  177. .y_plate_ohms = 486,
  178. .pressure_max = 1000,
  179. .pressure_min = 0,
  180. .stopacq_polarity = 1,
  181. .first_conversion_delay = 3,
  182. .acquisition_time = 1,
  183. .averaging = 1,
  184. .pen_down_acc_interval = 1,
  185. };
  186. #endif
  187. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  188. #if IS_ENABLED(CONFIG_MTD_M25P80)
  189. {
  190. /* the modalias must be the same as spi device driver name */
  191. .modalias = "m25p80", /* Name of spi_driver for this device */
  192. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  193. .bus_num = 0, /* Framework bus number */
  194. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  195. .platform_data = &bfin_spi_flash_data,
  196. .controller_data = &spi_flash_chip_info,
  197. .mode = SPI_MODE_3,
  198. },
  199. #endif
  200. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
  201. {
  202. .modalias = "ad183x",
  203. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  204. .bus_num = 0,
  205. .chip_select = 4,
  206. },
  207. #endif
  208. #if IS_ENABLED(CONFIG_MMC_SPI)
  209. {
  210. .modalias = "mmc_spi",
  211. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  212. .bus_num = 0,
  213. .chip_select = 5,
  214. .controller_data = &mmc_spi_chip_info,
  215. .mode = SPI_MODE_3,
  216. },
  217. #endif
  218. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
  219. {
  220. .modalias = "ad7877",
  221. .platform_data = &bfin_ad7877_ts_info,
  222. .irq = IRQ_PF2,
  223. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  224. .bus_num = 0,
  225. .chip_select = 5,
  226. },
  227. #endif
  228. };
  229. /* SPI (0) */
  230. static struct resource bfin_spi0_resource[] = {
  231. [0] = {
  232. .start = SPI0_REGBASE,
  233. .end = SPI0_REGBASE + 0xFF,
  234. .flags = IORESOURCE_MEM,
  235. },
  236. [1] = {
  237. .start = CH_SPI,
  238. .end = CH_SPI,
  239. .flags = IORESOURCE_DMA,
  240. },
  241. [2] = {
  242. .start = IRQ_SPI,
  243. .end = IRQ_SPI,
  244. .flags = IORESOURCE_IRQ,
  245. },
  246. };
  247. /* SPI controller data */
  248. static struct bfin5xx_spi_master bfin_spi0_info = {
  249. .num_chipselect = 8,
  250. .enable_dma = 1, /* master has the ability to do dma transfer */
  251. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  252. };
  253. static struct platform_device bfin_spi0_device = {
  254. .name = "bfin-spi",
  255. .id = 0, /* Bus number */
  256. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  257. .resource = bfin_spi0_resource,
  258. .dev = {
  259. .platform_data = &bfin_spi0_info, /* Passed to driver */
  260. },
  261. };
  262. #endif /* spi master and devices */
  263. #if IS_ENABLED(CONFIG_FB_BF537_LQ035)
  264. static struct platform_device bfin_fb_device = {
  265. .name = "bf537-lq035",
  266. };
  267. #endif
  268. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  269. #ifdef CONFIG_SERIAL_BFIN_UART0
  270. static struct resource bfin_uart0_resources[] = {
  271. {
  272. .start = UART0_THR,
  273. .end = UART0_GCTL+2,
  274. .flags = IORESOURCE_MEM,
  275. },
  276. {
  277. .start = IRQ_UART0_TX,
  278. .end = IRQ_UART0_TX,
  279. .flags = IORESOURCE_IRQ,
  280. },
  281. {
  282. .start = IRQ_UART0_RX,
  283. .end = IRQ_UART0_RX,
  284. .flags = IORESOURCE_IRQ,
  285. },
  286. {
  287. .start = IRQ_UART0_ERROR,
  288. .end = IRQ_UART0_ERROR,
  289. .flags = IORESOURCE_IRQ,
  290. },
  291. {
  292. .start = CH_UART0_TX,
  293. .end = CH_UART0_TX,
  294. .flags = IORESOURCE_DMA,
  295. },
  296. {
  297. .start = CH_UART0_RX,
  298. .end = CH_UART0_RX,
  299. .flags = IORESOURCE_DMA,
  300. },
  301. };
  302. static unsigned short bfin_uart0_peripherals[] = {
  303. P_UART0_TX, P_UART0_RX, 0
  304. };
  305. static struct platform_device bfin_uart0_device = {
  306. .name = "bfin-uart",
  307. .id = 0,
  308. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  309. .resource = bfin_uart0_resources,
  310. .dev = {
  311. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  312. },
  313. };
  314. #endif
  315. #ifdef CONFIG_SERIAL_BFIN_UART1
  316. static struct resource bfin_uart1_resources[] = {
  317. {
  318. .start = UART1_THR,
  319. .end = UART1_GCTL+2,
  320. .flags = IORESOURCE_MEM,
  321. },
  322. {
  323. .start = IRQ_UART1_TX,
  324. .end = IRQ_UART1_TX,
  325. .flags = IORESOURCE_IRQ,
  326. },
  327. {
  328. .start = IRQ_UART1_RX,
  329. .end = IRQ_UART1_RX,
  330. .flags = IORESOURCE_IRQ,
  331. },
  332. {
  333. .start = IRQ_UART1_ERROR,
  334. .end = IRQ_UART1_ERROR,
  335. .flags = IORESOURCE_IRQ,
  336. },
  337. {
  338. .start = CH_UART1_TX,
  339. .end = CH_UART1_TX,
  340. .flags = IORESOURCE_DMA,
  341. },
  342. {
  343. .start = CH_UART1_RX,
  344. .end = CH_UART1_RX,
  345. .flags = IORESOURCE_DMA,
  346. },
  347. };
  348. static unsigned short bfin_uart1_peripherals[] = {
  349. P_UART1_TX, P_UART1_RX, 0
  350. };
  351. static struct platform_device bfin_uart1_device = {
  352. .name = "bfin-uart",
  353. .id = 1,
  354. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  355. .resource = bfin_uart1_resources,
  356. .dev = {
  357. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  358. },
  359. };
  360. #endif
  361. #endif
  362. #if IS_ENABLED(CONFIG_BFIN_SIR)
  363. #ifdef CONFIG_BFIN_SIR0
  364. static struct resource bfin_sir0_resources[] = {
  365. {
  366. .start = 0xFFC00400,
  367. .end = 0xFFC004FF,
  368. .flags = IORESOURCE_MEM,
  369. },
  370. {
  371. .start = IRQ_UART0_RX,
  372. .end = IRQ_UART0_RX+1,
  373. .flags = IORESOURCE_IRQ,
  374. },
  375. {
  376. .start = CH_UART0_RX,
  377. .end = CH_UART0_RX+1,
  378. .flags = IORESOURCE_DMA,
  379. },
  380. };
  381. static struct platform_device bfin_sir0_device = {
  382. .name = "bfin_sir",
  383. .id = 0,
  384. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  385. .resource = bfin_sir0_resources,
  386. };
  387. #endif
  388. #ifdef CONFIG_BFIN_SIR1
  389. static struct resource bfin_sir1_resources[] = {
  390. {
  391. .start = 0xFFC02000,
  392. .end = 0xFFC020FF,
  393. .flags = IORESOURCE_MEM,
  394. },
  395. {
  396. .start = IRQ_UART1_RX,
  397. .end = IRQ_UART1_RX+1,
  398. .flags = IORESOURCE_IRQ,
  399. },
  400. {
  401. .start = CH_UART1_RX,
  402. .end = CH_UART1_RX+1,
  403. .flags = IORESOURCE_DMA,
  404. },
  405. };
  406. static struct platform_device bfin_sir1_device = {
  407. .name = "bfin_sir",
  408. .id = 1,
  409. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  410. .resource = bfin_sir1_resources,
  411. };
  412. #endif
  413. #endif
  414. static struct platform_device *stamp_devices[] __initdata = {
  415. #if IS_ENABLED(CONFIG_BFIN_CFPCMCIA)
  416. &bfin_pcmcia_cf_device,
  417. #endif
  418. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  419. &rtc_device,
  420. #endif
  421. #if IS_ENABLED(CONFIG_SMC91X)
  422. &smc91x_device,
  423. #endif
  424. #if IS_ENABLED(CONFIG_BFIN_MAC)
  425. &bfin_mii_bus,
  426. &bfin_mac_device,
  427. #endif
  428. #if IS_ENABLED(CONFIG_USB_NET2272)
  429. &net2272_bfin_device,
  430. #endif
  431. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  432. &bfin_spi0_device,
  433. #endif
  434. #if IS_ENABLED(CONFIG_FB_BF537_LQ035)
  435. &bfin_fb_device,
  436. #endif
  437. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  438. #ifdef CONFIG_SERIAL_BFIN_UART0
  439. &bfin_uart0_device,
  440. #endif
  441. #ifdef CONFIG_SERIAL_BFIN_UART1
  442. &bfin_uart1_device,
  443. #endif
  444. #endif
  445. #if IS_ENABLED(CONFIG_BFIN_SIR)
  446. #ifdef CONFIG_BFIN_SIR0
  447. &bfin_sir0_device,
  448. #endif
  449. #ifdef CONFIG_BFIN_SIR1
  450. &bfin_sir1_device,
  451. #endif
  452. #endif
  453. };
  454. static int __init pnav_init(void)
  455. {
  456. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  457. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  458. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  459. spi_register_board_info(bfin_spi_board_info,
  460. ARRAY_SIZE(bfin_spi_board_info));
  461. #endif
  462. return 0;
  463. }
  464. arch_initcall(pnav_init);
  465. static struct platform_device *stamp_early_devices[] __initdata = {
  466. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  467. #ifdef CONFIG_SERIAL_BFIN_UART0
  468. &bfin_uart0_device,
  469. #endif
  470. #ifdef CONFIG_SERIAL_BFIN_UART1
  471. &bfin_uart1_device,
  472. #endif
  473. #endif
  474. };
  475. void __init native_machine_early_platform_add_devices(void)
  476. {
  477. printk(KERN_INFO "register early platform devices\n");
  478. early_platform_add_devices(stamp_early_devices,
  479. ARRAY_SIZE(stamp_early_devices));
  480. }
  481. int bfin_get_ether_addr(char *addr)
  482. {
  483. return 1;
  484. }
  485. EXPORT_SYMBOL(bfin_get_ether_addr);