ezkit.c 22 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/physmap.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/irq.h>
  16. #include <linux/interrupt.h>
  17. #include <asm/bfin5xx_spi.h>
  18. #include <asm/dma.h>
  19. #include <asm/gpio.h>
  20. #include <asm/nand.h>
  21. #include <asm/portmux.h>
  22. #include <asm/dpmc.h>
  23. #include <linux/input.h>
  24. /*
  25. * Name the Board for the /proc/cpuinfo
  26. */
  27. const char bfin_board_name[] = "ADI BF538-EZKIT";
  28. /*
  29. * Driver needs to know address, irq and flag pin.
  30. */
  31. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  32. static struct platform_device rtc_device = {
  33. .name = "rtc-bfin",
  34. .id = -1,
  35. };
  36. #endif /* CONFIG_RTC_DRV_BFIN */
  37. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  38. #ifdef CONFIG_SERIAL_BFIN_UART0
  39. static struct resource bfin_uart0_resources[] = {
  40. {
  41. .start = UART0_THR,
  42. .end = UART0_GCTL+2,
  43. .flags = IORESOURCE_MEM,
  44. },
  45. {
  46. .start = IRQ_UART0_TX,
  47. .end = IRQ_UART0_TX,
  48. .flags = IORESOURCE_IRQ,
  49. },
  50. {
  51. .start = IRQ_UART0_RX,
  52. .end = IRQ_UART0_RX,
  53. .flags = IORESOURCE_IRQ,
  54. },
  55. {
  56. .start = IRQ_UART0_ERROR,
  57. .end = IRQ_UART0_ERROR,
  58. .flags = IORESOURCE_IRQ,
  59. },
  60. {
  61. .start = CH_UART0_TX,
  62. .end = CH_UART0_TX,
  63. .flags = IORESOURCE_DMA,
  64. },
  65. {
  66. .start = CH_UART0_RX,
  67. .end = CH_UART0_RX,
  68. .flags = IORESOURCE_DMA,
  69. },
  70. #ifdef CONFIG_BFIN_UART0_CTSRTS
  71. { /* CTS pin */
  72. .start = GPIO_PG7,
  73. .end = GPIO_PG7,
  74. .flags = IORESOURCE_IO,
  75. },
  76. { /* RTS pin */
  77. .start = GPIO_PG6,
  78. .end = GPIO_PG6,
  79. .flags = IORESOURCE_IO,
  80. },
  81. #endif
  82. };
  83. static unsigned short bfin_uart0_peripherals[] = {
  84. P_UART0_TX, P_UART0_RX, 0
  85. };
  86. static struct platform_device bfin_uart0_device = {
  87. .name = "bfin-uart",
  88. .id = 0,
  89. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  90. .resource = bfin_uart0_resources,
  91. .dev = {
  92. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  93. },
  94. };
  95. #endif /* CONFIG_SERIAL_BFIN_UART0 */
  96. #ifdef CONFIG_SERIAL_BFIN_UART1
  97. static struct resource bfin_uart1_resources[] = {
  98. {
  99. .start = UART1_THR,
  100. .end = UART1_GCTL+2,
  101. .flags = IORESOURCE_MEM,
  102. },
  103. {
  104. .start = IRQ_UART1_TX,
  105. .end = IRQ_UART1_TX,
  106. .flags = IORESOURCE_IRQ,
  107. },
  108. {
  109. .start = IRQ_UART1_RX,
  110. .end = IRQ_UART1_RX,
  111. .flags = IORESOURCE_IRQ,
  112. },
  113. {
  114. .start = IRQ_UART1_ERROR,
  115. .end = IRQ_UART1_ERROR,
  116. .flags = IORESOURCE_IRQ,
  117. },
  118. {
  119. .start = CH_UART1_TX,
  120. .end = CH_UART1_TX,
  121. .flags = IORESOURCE_DMA,
  122. },
  123. {
  124. .start = CH_UART1_RX,
  125. .end = CH_UART1_RX,
  126. .flags = IORESOURCE_DMA,
  127. },
  128. };
  129. static unsigned short bfin_uart1_peripherals[] = {
  130. P_UART1_TX, P_UART1_RX, 0
  131. };
  132. static struct platform_device bfin_uart1_device = {
  133. .name = "bfin-uart",
  134. .id = 1,
  135. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  136. .resource = bfin_uart1_resources,
  137. .dev = {
  138. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  139. },
  140. };
  141. #endif /* CONFIG_SERIAL_BFIN_UART1 */
  142. #ifdef CONFIG_SERIAL_BFIN_UART2
  143. static struct resource bfin_uart2_resources[] = {
  144. {
  145. .start = UART2_THR,
  146. .end = UART2_GCTL+2,
  147. .flags = IORESOURCE_MEM,
  148. },
  149. {
  150. .start = IRQ_UART2_TX,
  151. .end = IRQ_UART2_TX,
  152. .flags = IORESOURCE_IRQ,
  153. },
  154. {
  155. .start = IRQ_UART2_RX,
  156. .end = IRQ_UART2_RX,
  157. .flags = IORESOURCE_IRQ,
  158. },
  159. {
  160. .start = IRQ_UART2_ERROR,
  161. .end = IRQ_UART2_ERROR,
  162. .flags = IORESOURCE_IRQ,
  163. },
  164. {
  165. .start = CH_UART2_TX,
  166. .end = CH_UART2_TX,
  167. .flags = IORESOURCE_DMA,
  168. },
  169. {
  170. .start = CH_UART2_RX,
  171. .end = CH_UART2_RX,
  172. .flags = IORESOURCE_DMA,
  173. },
  174. };
  175. static unsigned short bfin_uart2_peripherals[] = {
  176. P_UART2_TX, P_UART2_RX, 0
  177. };
  178. static struct platform_device bfin_uart2_device = {
  179. .name = "bfin-uart",
  180. .id = 2,
  181. .num_resources = ARRAY_SIZE(bfin_uart2_resources),
  182. .resource = bfin_uart2_resources,
  183. .dev = {
  184. .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
  185. },
  186. };
  187. #endif /* CONFIG_SERIAL_BFIN_UART2 */
  188. #endif /* CONFIG_SERIAL_BFIN */
  189. #if IS_ENABLED(CONFIG_BFIN_SIR)
  190. #ifdef CONFIG_BFIN_SIR0
  191. static struct resource bfin_sir0_resources[] = {
  192. {
  193. .start = 0xFFC00400,
  194. .end = 0xFFC004FF,
  195. .flags = IORESOURCE_MEM,
  196. },
  197. {
  198. .start = IRQ_UART0_RX,
  199. .end = IRQ_UART0_RX+1,
  200. .flags = IORESOURCE_IRQ,
  201. },
  202. {
  203. .start = CH_UART0_RX,
  204. .end = CH_UART0_RX+1,
  205. .flags = IORESOURCE_DMA,
  206. },
  207. };
  208. static struct platform_device bfin_sir0_device = {
  209. .name = "bfin_sir",
  210. .id = 0,
  211. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  212. .resource = bfin_sir0_resources,
  213. };
  214. #endif /* CONFIG_BFIN_SIR0 */
  215. #ifdef CONFIG_BFIN_SIR1
  216. static struct resource bfin_sir1_resources[] = {
  217. {
  218. .start = 0xFFC02000,
  219. .end = 0xFFC020FF,
  220. .flags = IORESOURCE_MEM,
  221. },
  222. {
  223. .start = IRQ_UART1_RX,
  224. .end = IRQ_UART1_RX+1,
  225. .flags = IORESOURCE_IRQ,
  226. },
  227. {
  228. .start = CH_UART1_RX,
  229. .end = CH_UART1_RX+1,
  230. .flags = IORESOURCE_DMA,
  231. },
  232. };
  233. static struct platform_device bfin_sir1_device = {
  234. .name = "bfin_sir",
  235. .id = 1,
  236. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  237. .resource = bfin_sir1_resources,
  238. };
  239. #endif /* CONFIG_BFIN_SIR1 */
  240. #ifdef CONFIG_BFIN_SIR2
  241. static struct resource bfin_sir2_resources[] = {
  242. {
  243. .start = 0xFFC02100,
  244. .end = 0xFFC021FF,
  245. .flags = IORESOURCE_MEM,
  246. },
  247. {
  248. .start = IRQ_UART2_RX,
  249. .end = IRQ_UART2_RX+1,
  250. .flags = IORESOURCE_IRQ,
  251. },
  252. {
  253. .start = CH_UART2_RX,
  254. .end = CH_UART2_RX+1,
  255. .flags = IORESOURCE_DMA,
  256. },
  257. };
  258. static struct platform_device bfin_sir2_device = {
  259. .name = "bfin_sir",
  260. .id = 2,
  261. .num_resources = ARRAY_SIZE(bfin_sir2_resources),
  262. .resource = bfin_sir2_resources,
  263. };
  264. #endif /* CONFIG_BFIN_SIR2 */
  265. #endif /* CONFIG_BFIN_SIR */
  266. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  267. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  268. static struct resource bfin_sport0_uart_resources[] = {
  269. {
  270. .start = SPORT0_TCR1,
  271. .end = SPORT0_MRCS3+4,
  272. .flags = IORESOURCE_MEM,
  273. },
  274. {
  275. .start = IRQ_SPORT0_RX,
  276. .end = IRQ_SPORT0_RX+1,
  277. .flags = IORESOURCE_IRQ,
  278. },
  279. {
  280. .start = IRQ_SPORT0_ERROR,
  281. .end = IRQ_SPORT0_ERROR,
  282. .flags = IORESOURCE_IRQ,
  283. },
  284. };
  285. static unsigned short bfin_sport0_peripherals[] = {
  286. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  287. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  288. };
  289. static struct platform_device bfin_sport0_uart_device = {
  290. .name = "bfin-sport-uart",
  291. .id = 0,
  292. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  293. .resource = bfin_sport0_uart_resources,
  294. .dev = {
  295. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  296. },
  297. };
  298. #endif /* CONFIG_SERIAL_BFIN_SPORT0_UART */
  299. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  300. static struct resource bfin_sport1_uart_resources[] = {
  301. {
  302. .start = SPORT1_TCR1,
  303. .end = SPORT1_MRCS3+4,
  304. .flags = IORESOURCE_MEM,
  305. },
  306. {
  307. .start = IRQ_SPORT1_RX,
  308. .end = IRQ_SPORT1_RX+1,
  309. .flags = IORESOURCE_IRQ,
  310. },
  311. {
  312. .start = IRQ_SPORT1_ERROR,
  313. .end = IRQ_SPORT1_ERROR,
  314. .flags = IORESOURCE_IRQ,
  315. },
  316. };
  317. static unsigned short bfin_sport1_peripherals[] = {
  318. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  319. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  320. };
  321. static struct platform_device bfin_sport1_uart_device = {
  322. .name = "bfin-sport-uart",
  323. .id = 1,
  324. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  325. .resource = bfin_sport1_uart_resources,
  326. .dev = {
  327. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  328. },
  329. };
  330. #endif /* CONFIG_SERIAL_BFIN_SPORT1_UART */
  331. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  332. static struct resource bfin_sport2_uart_resources[] = {
  333. {
  334. .start = SPORT2_TCR1,
  335. .end = SPORT2_MRCS3+4,
  336. .flags = IORESOURCE_MEM,
  337. },
  338. {
  339. .start = IRQ_SPORT2_RX,
  340. .end = IRQ_SPORT2_RX+1,
  341. .flags = IORESOURCE_IRQ,
  342. },
  343. {
  344. .start = IRQ_SPORT2_ERROR,
  345. .end = IRQ_SPORT2_ERROR,
  346. .flags = IORESOURCE_IRQ,
  347. },
  348. };
  349. static unsigned short bfin_sport2_peripherals[] = {
  350. P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
  351. P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
  352. };
  353. static struct platform_device bfin_sport2_uart_device = {
  354. .name = "bfin-sport-uart",
  355. .id = 2,
  356. .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
  357. .resource = bfin_sport2_uart_resources,
  358. .dev = {
  359. .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
  360. },
  361. };
  362. #endif /* CONFIG_SERIAL_BFIN_SPORT2_UART */
  363. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  364. static struct resource bfin_sport3_uart_resources[] = {
  365. {
  366. .start = SPORT3_TCR1,
  367. .end = SPORT3_MRCS3+4,
  368. .flags = IORESOURCE_MEM,
  369. },
  370. {
  371. .start = IRQ_SPORT3_RX,
  372. .end = IRQ_SPORT3_RX+1,
  373. .flags = IORESOURCE_IRQ,
  374. },
  375. {
  376. .start = IRQ_SPORT3_ERROR,
  377. .end = IRQ_SPORT3_ERROR,
  378. .flags = IORESOURCE_IRQ,
  379. },
  380. };
  381. static unsigned short bfin_sport3_peripherals[] = {
  382. P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
  383. P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
  384. };
  385. static struct platform_device bfin_sport3_uart_device = {
  386. .name = "bfin-sport-uart",
  387. .id = 3,
  388. .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
  389. .resource = bfin_sport3_uart_resources,
  390. .dev = {
  391. .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
  392. },
  393. };
  394. #endif /* CONFIG_SERIAL_BFIN_SPORT3_UART */
  395. #endif /* CONFIG_SERIAL_BFIN_SPORT */
  396. #if IS_ENABLED(CONFIG_CAN_BFIN)
  397. static unsigned short bfin_can_peripherals[] = {
  398. P_CAN0_RX, P_CAN0_TX, 0
  399. };
  400. static struct resource bfin_can_resources[] = {
  401. {
  402. .start = 0xFFC02A00,
  403. .end = 0xFFC02FFF,
  404. .flags = IORESOURCE_MEM,
  405. },
  406. {
  407. .start = IRQ_CAN_RX,
  408. .end = IRQ_CAN_RX,
  409. .flags = IORESOURCE_IRQ,
  410. },
  411. {
  412. .start = IRQ_CAN_TX,
  413. .end = IRQ_CAN_TX,
  414. .flags = IORESOURCE_IRQ,
  415. },
  416. {
  417. .start = IRQ_CAN_ERROR,
  418. .end = IRQ_CAN_ERROR,
  419. .flags = IORESOURCE_IRQ,
  420. },
  421. };
  422. static struct platform_device bfin_can_device = {
  423. .name = "bfin_can",
  424. .num_resources = ARRAY_SIZE(bfin_can_resources),
  425. .resource = bfin_can_resources,
  426. .dev = {
  427. .platform_data = &bfin_can_peripherals, /* Passed to driver */
  428. },
  429. };
  430. #endif /* CONFIG_CAN_BFIN */
  431. /*
  432. * USB-LAN EzExtender board
  433. * Driver needs to know address, irq and flag pin.
  434. */
  435. #if IS_ENABLED(CONFIG_SMC91X)
  436. #include <linux/smc91x.h>
  437. static struct smc91x_platdata smc91x_info = {
  438. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  439. .leda = RPC_LED_100_10,
  440. .ledb = RPC_LED_TX_RX,
  441. };
  442. static struct resource smc91x_resources[] = {
  443. {
  444. .name = "smc91x-regs",
  445. .start = 0x20310300,
  446. .end = 0x20310300 + 16,
  447. .flags = IORESOURCE_MEM,
  448. }, {
  449. .start = IRQ_PF0,
  450. .end = IRQ_PF0,
  451. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  452. },
  453. };
  454. static struct platform_device smc91x_device = {
  455. .name = "smc91x",
  456. .id = 0,
  457. .num_resources = ARRAY_SIZE(smc91x_resources),
  458. .resource = smc91x_resources,
  459. .dev = {
  460. .platform_data = &smc91x_info,
  461. },
  462. };
  463. #endif /* CONFIG_SMC91X */
  464. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  465. /* all SPI peripherals info goes here */
  466. #if IS_ENABLED(CONFIG_MTD_M25P80)
  467. /* SPI flash chip (m25p16) */
  468. static struct mtd_partition bfin_spi_flash_partitions[] = {
  469. {
  470. .name = "bootloader(spi)",
  471. .size = 0x00040000,
  472. .offset = 0,
  473. .mask_flags = MTD_CAP_ROM
  474. }, {
  475. .name = "linux kernel(spi)",
  476. .size = 0x1c0000,
  477. .offset = 0x40000
  478. }
  479. };
  480. static struct flash_platform_data bfin_spi_flash_data = {
  481. .name = "m25p80",
  482. .parts = bfin_spi_flash_partitions,
  483. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  484. .type = "m25p16",
  485. };
  486. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  487. .enable_dma = 0, /* use dma transfer with this chip*/
  488. };
  489. #endif /* CONFIG_MTD_M25P80 */
  490. #endif /* CONFIG_SPI_BFIN5XX */
  491. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879)
  492. #include <linux/spi/ad7879.h>
  493. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  494. .model = 7879, /* Model = AD7879 */
  495. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  496. .pressure_max = 10000,
  497. .pressure_min = 0,
  498. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  499. .acquisition_time = 1, /* 4us acquisition time per sample */
  500. .median = 2, /* do 8 measurements */
  501. .averaging = 1, /* take the average of 4 middle samples */
  502. .pen_down_acc_interval = 255, /* 9.4 ms */
  503. .gpio_export = 1, /* Export GPIO to gpiolib */
  504. .gpio_base = -1, /* Dynamic allocation */
  505. };
  506. #endif /* CONFIG_TOUCHSCREEN_AD7879 */
  507. #if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
  508. #include <asm/bfin-lq035q1.h>
  509. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  510. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  511. .ppi_mode = USE_RGB565_16_BIT_PPI,
  512. .use_bl = 0, /* let something else control the LCD Blacklight */
  513. .gpio_bl = GPIO_PF7,
  514. };
  515. static struct resource bfin_lq035q1_resources[] = {
  516. {
  517. .start = IRQ_PPI_ERROR,
  518. .end = IRQ_PPI_ERROR,
  519. .flags = IORESOURCE_IRQ,
  520. },
  521. };
  522. static struct platform_device bfin_lq035q1_device = {
  523. .name = "bfin-lq035q1",
  524. .id = -1,
  525. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  526. .resource = bfin_lq035q1_resources,
  527. .dev = {
  528. .platform_data = &bfin_lq035q1_data,
  529. },
  530. };
  531. #endif /* CONFIG_FB_BFIN_LQ035Q1 */
  532. static struct spi_board_info bf538_spi_board_info[] __initdata = {
  533. #if IS_ENABLED(CONFIG_MTD_M25P80)
  534. {
  535. /* the modalias must be the same as spi device driver name */
  536. .modalias = "m25p80", /* Name of spi_driver for this device */
  537. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  538. .bus_num = 0, /* Framework bus number */
  539. .chip_select = 1, /* SPI_SSEL1*/
  540. .platform_data = &bfin_spi_flash_data,
  541. .controller_data = &spi_flash_chip_info,
  542. .mode = SPI_MODE_3,
  543. },
  544. #endif /* CONFIG_MTD_M25P80 */
  545. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879_SPI)
  546. {
  547. .modalias = "ad7879",
  548. .platform_data = &bfin_ad7879_ts_info,
  549. .irq = IRQ_PF3,
  550. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  551. .bus_num = 0,
  552. .chip_select = 1,
  553. .mode = SPI_CPHA | SPI_CPOL,
  554. },
  555. #endif /* CONFIG_TOUCHSCREEN_AD7879_SPI */
  556. #if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
  557. {
  558. .modalias = "bfin-lq035q1-spi",
  559. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  560. .bus_num = 0,
  561. .chip_select = 2,
  562. .mode = SPI_CPHA | SPI_CPOL,
  563. },
  564. #endif /* CONFIG_FB_BFIN_LQ035Q1 */
  565. #if IS_ENABLED(CONFIG_SPI_SPIDEV)
  566. {
  567. .modalias = "spidev",
  568. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  569. .bus_num = 0,
  570. .chip_select = 1,
  571. },
  572. #endif /* CONFIG_SPI_SPIDEV */
  573. };
  574. /* SPI (0) */
  575. static struct resource bfin_spi0_resource[] = {
  576. [0] = {
  577. .start = SPI0_REGBASE,
  578. .end = SPI0_REGBASE + 0xFF,
  579. .flags = IORESOURCE_MEM,
  580. },
  581. [1] = {
  582. .start = CH_SPI0,
  583. .end = CH_SPI0,
  584. .flags = IORESOURCE_DMA,
  585. },
  586. [2] = {
  587. .start = IRQ_SPI0,
  588. .end = IRQ_SPI0,
  589. .flags = IORESOURCE_IRQ,
  590. }
  591. };
  592. /* SPI (1) */
  593. static struct resource bfin_spi1_resource[] = {
  594. [0] = {
  595. .start = SPI1_REGBASE,
  596. .end = SPI1_REGBASE + 0xFF,
  597. .flags = IORESOURCE_MEM,
  598. },
  599. [1] = {
  600. .start = CH_SPI1,
  601. .end = CH_SPI1,
  602. .flags = IORESOURCE_DMA,
  603. },
  604. [2] = {
  605. .start = IRQ_SPI1,
  606. .end = IRQ_SPI1,
  607. .flags = IORESOURCE_IRQ,
  608. }
  609. };
  610. /* SPI (2) */
  611. static struct resource bfin_spi2_resource[] = {
  612. [0] = {
  613. .start = SPI2_REGBASE,
  614. .end = SPI2_REGBASE + 0xFF,
  615. .flags = IORESOURCE_MEM,
  616. },
  617. [1] = {
  618. .start = CH_SPI2,
  619. .end = CH_SPI2,
  620. .flags = IORESOURCE_DMA,
  621. },
  622. [2] = {
  623. .start = IRQ_SPI2,
  624. .end = IRQ_SPI2,
  625. .flags = IORESOURCE_IRQ,
  626. }
  627. };
  628. /* SPI controller data */
  629. static struct bfin5xx_spi_master bf538_spi_master_info0 = {
  630. .num_chipselect = 8,
  631. .enable_dma = 1, /* master has the ability to do dma transfer */
  632. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  633. };
  634. static struct platform_device bf538_spi_master0 = {
  635. .name = "bfin-spi",
  636. .id = 0, /* Bus number */
  637. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  638. .resource = bfin_spi0_resource,
  639. .dev = {
  640. .platform_data = &bf538_spi_master_info0, /* Passed to driver */
  641. },
  642. };
  643. static struct bfin5xx_spi_master bf538_spi_master_info1 = {
  644. .num_chipselect = 2,
  645. .enable_dma = 1, /* master has the ability to do dma transfer */
  646. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  647. };
  648. static struct platform_device bf538_spi_master1 = {
  649. .name = "bfin-spi",
  650. .id = 1, /* Bus number */
  651. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  652. .resource = bfin_spi1_resource,
  653. .dev = {
  654. .platform_data = &bf538_spi_master_info1, /* Passed to driver */
  655. },
  656. };
  657. static struct bfin5xx_spi_master bf538_spi_master_info2 = {
  658. .num_chipselect = 2,
  659. .enable_dma = 1, /* master has the ability to do dma transfer */
  660. .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
  661. };
  662. static struct platform_device bf538_spi_master2 = {
  663. .name = "bfin-spi",
  664. .id = 2, /* Bus number */
  665. .num_resources = ARRAY_SIZE(bfin_spi2_resource),
  666. .resource = bfin_spi2_resource,
  667. .dev = {
  668. .platform_data = &bf538_spi_master_info2, /* Passed to driver */
  669. },
  670. };
  671. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  672. static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
  673. static struct resource bfin_twi0_resource[] = {
  674. [0] = {
  675. .start = TWI0_REGBASE,
  676. .end = TWI0_REGBASE + 0xFF,
  677. .flags = IORESOURCE_MEM,
  678. },
  679. [1] = {
  680. .start = IRQ_TWI0,
  681. .end = IRQ_TWI0,
  682. .flags = IORESOURCE_IRQ,
  683. },
  684. };
  685. static struct platform_device i2c_bfin_twi0_device = {
  686. .name = "i2c-bfin-twi",
  687. .id = 0,
  688. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  689. .resource = bfin_twi0_resource,
  690. .dev = {
  691. .platform_data = &bfin_twi0_pins,
  692. },
  693. };
  694. static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0};
  695. static struct resource bfin_twi1_resource[] = {
  696. [0] = {
  697. .start = TWI1_REGBASE,
  698. .end = TWI1_REGBASE + 0xFF,
  699. .flags = IORESOURCE_MEM,
  700. },
  701. [1] = {
  702. .start = IRQ_TWI1,
  703. .end = IRQ_TWI1,
  704. .flags = IORESOURCE_IRQ,
  705. },
  706. };
  707. static struct platform_device i2c_bfin_twi1_device = {
  708. .name = "i2c-bfin-twi",
  709. .id = 1,
  710. .num_resources = ARRAY_SIZE(bfin_twi1_resource),
  711. .resource = bfin_twi1_resource,
  712. };
  713. #endif /* CONFIG_I2C_BLACKFIN_TWI */
  714. #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
  715. #include <linux/gpio_keys.h>
  716. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  717. {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
  718. };
  719. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  720. .buttons = bfin_gpio_keys_table,
  721. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  722. };
  723. static struct platform_device bfin_device_gpiokeys = {
  724. .name = "gpio-keys",
  725. .dev = {
  726. .platform_data = &bfin_gpio_keys_data,
  727. },
  728. };
  729. #endif
  730. static const unsigned int cclk_vlev_datasheet[] =
  731. {
  732. /*
  733. * Internal VLEV BF538SBBC1533
  734. ****temporarily using these values until data sheet is updated
  735. */
  736. VRPAIR(VLEV_100, 150000000),
  737. VRPAIR(VLEV_100, 250000000),
  738. VRPAIR(VLEV_110, 276000000),
  739. VRPAIR(VLEV_115, 301000000),
  740. VRPAIR(VLEV_120, 525000000),
  741. VRPAIR(VLEV_125, 550000000),
  742. VRPAIR(VLEV_130, 600000000),
  743. };
  744. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  745. .tuple_tab = cclk_vlev_datasheet,
  746. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  747. .vr_settling_time = 25 /* us */,
  748. };
  749. static struct platform_device bfin_dpmc = {
  750. .name = "bfin dpmc",
  751. .dev = {
  752. .platform_data = &bfin_dmpc_vreg_data,
  753. },
  754. };
  755. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  756. static struct mtd_partition ezkit_partitions[] = {
  757. {
  758. .name = "bootloader(nor)",
  759. .size = 0x40000,
  760. .offset = 0,
  761. }, {
  762. .name = "linux kernel(nor)",
  763. .size = 0x180000,
  764. .offset = MTDPART_OFS_APPEND,
  765. }, {
  766. .name = "file system(nor)",
  767. .size = MTDPART_SIZ_FULL,
  768. .offset = MTDPART_OFS_APPEND,
  769. }
  770. };
  771. static struct physmap_flash_data ezkit_flash_data = {
  772. .width = 2,
  773. .parts = ezkit_partitions,
  774. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  775. };
  776. static struct resource ezkit_flash_resource = {
  777. .start = 0x20000000,
  778. #if IS_ENABLED(CONFIG_SMC91X)
  779. .end = 0x202fffff,
  780. #else
  781. .end = 0x203fffff,
  782. #endif
  783. .flags = IORESOURCE_MEM,
  784. };
  785. static struct platform_device ezkit_flash_device = {
  786. .name = "physmap-flash",
  787. .id = 0,
  788. .dev = {
  789. .platform_data = &ezkit_flash_data,
  790. },
  791. .num_resources = 1,
  792. .resource = &ezkit_flash_resource,
  793. };
  794. #endif
  795. static struct platform_device *cm_bf538_devices[] __initdata = {
  796. &bfin_dpmc,
  797. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  798. &rtc_device,
  799. #endif
  800. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  801. #ifdef CONFIG_SERIAL_BFIN_UART0
  802. &bfin_uart0_device,
  803. #endif
  804. #ifdef CONFIG_SERIAL_BFIN_UART1
  805. &bfin_uart1_device,
  806. #endif
  807. #ifdef CONFIG_SERIAL_BFIN_UART2
  808. &bfin_uart2_device,
  809. #endif
  810. #endif
  811. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  812. &bf538_spi_master0,
  813. &bf538_spi_master1,
  814. &bf538_spi_master2,
  815. #endif
  816. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  817. &i2c_bfin_twi0_device,
  818. &i2c_bfin_twi1_device,
  819. #endif
  820. #if IS_ENABLED(CONFIG_BFIN_SIR)
  821. #ifdef CONFIG_BFIN_SIR0
  822. &bfin_sir0_device,
  823. #endif
  824. #ifdef CONFIG_BFIN_SIR1
  825. &bfin_sir1_device,
  826. #endif
  827. #ifdef CONFIG_BFIN_SIR2
  828. &bfin_sir2_device,
  829. #endif
  830. #endif
  831. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  832. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  833. &bfin_sport0_uart_device,
  834. #endif
  835. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  836. &bfin_sport1_uart_device,
  837. #endif
  838. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  839. &bfin_sport2_uart_device,
  840. #endif
  841. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  842. &bfin_sport3_uart_device,
  843. #endif
  844. #endif
  845. #if IS_ENABLED(CONFIG_CAN_BFIN)
  846. &bfin_can_device,
  847. #endif
  848. #if IS_ENABLED(CONFIG_SMC91X)
  849. &smc91x_device,
  850. #endif
  851. #if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
  852. &bfin_lq035q1_device,
  853. #endif
  854. #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
  855. &bfin_device_gpiokeys,
  856. #endif
  857. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  858. &ezkit_flash_device,
  859. #endif
  860. };
  861. static int __init ezkit_init(void)
  862. {
  863. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  864. platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
  865. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  866. spi_register_board_info(bf538_spi_board_info,
  867. ARRAY_SIZE(bf538_spi_board_info));
  868. #endif
  869. return 0;
  870. }
  871. arch_initcall(ezkit_init);
  872. static struct platform_device *ezkit_early_devices[] __initdata = {
  873. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  874. #ifdef CONFIG_SERIAL_BFIN_UART0
  875. &bfin_uart0_device,
  876. #endif
  877. #ifdef CONFIG_SERIAL_BFIN_UART1
  878. &bfin_uart1_device,
  879. #endif
  880. #ifdef CONFIG_SERIAL_BFIN_UART2
  881. &bfin_uart2_device,
  882. #endif
  883. #endif
  884. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  885. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  886. &bfin_sport0_uart_device,
  887. #endif
  888. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  889. &bfin_sport1_uart_device,
  890. #endif
  891. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  892. &bfin_sport2_uart_device,
  893. #endif
  894. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  895. &bfin_sport3_uart_device,
  896. #endif
  897. #endif
  898. };
  899. void __init native_machine_early_platform_add_devices(void)
  900. {
  901. printk(KERN_INFO "register early platform devices\n");
  902. early_platform_add_devices(ezkit_early_devices,
  903. ARRAY_SIZE(ezkit_early_devices));
  904. }