ext-gpio.c 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158
  1. /*
  2. * GPIOLIB interface for BF538/9 PORT C, D, and E GPIOs
  3. *
  4. * Copyright 2009-2011 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/module.h>
  9. #include <linux/err.h>
  10. #include <asm/blackfin.h>
  11. #include <asm/gpio.h>
  12. #include <asm/portmux.h>
  13. #define DEFINE_REG(reg, off) \
  14. static inline u16 read_##reg(void __iomem *port) \
  15. { return bfin_read16(port + off); } \
  16. static inline void write_##reg(void __iomem *port, u16 v) \
  17. { bfin_write16(port + off, v); }
  18. DEFINE_REG(PORTIO, 0x00)
  19. DEFINE_REG(PORTIO_CLEAR, 0x10)
  20. DEFINE_REG(PORTIO_SET, 0x20)
  21. DEFINE_REG(PORTIO_DIR, 0x40)
  22. DEFINE_REG(PORTIO_INEN, 0x50)
  23. static void __iomem *gpio_chip_to_mmr(struct gpio_chip *chip)
  24. {
  25. switch (chip->base) {
  26. default: /* not really needed, but keeps gcc happy */
  27. case GPIO_PC0: return (void __iomem *)PORTCIO;
  28. case GPIO_PD0: return (void __iomem *)PORTDIO;
  29. case GPIO_PE0: return (void __iomem *)PORTEIO;
  30. }
  31. }
  32. static int bf538_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
  33. {
  34. void __iomem *port = gpio_chip_to_mmr(chip);
  35. return !!(read_PORTIO(port) & (1u << gpio));
  36. }
  37. static void bf538_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value)
  38. {
  39. void __iomem *port = gpio_chip_to_mmr(chip);
  40. if (value)
  41. write_PORTIO_SET(port, (1u << gpio));
  42. else
  43. write_PORTIO_CLEAR(port, (1u << gpio));
  44. }
  45. static int bf538_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
  46. {
  47. void __iomem *port = gpio_chip_to_mmr(chip);
  48. write_PORTIO_DIR(port, read_PORTIO_DIR(port) & ~(1u << gpio));
  49. write_PORTIO_INEN(port, read_PORTIO_INEN(port) | (1u << gpio));
  50. return 0;
  51. }
  52. static int bf538_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int value)
  53. {
  54. void __iomem *port = gpio_chip_to_mmr(chip);
  55. write_PORTIO_INEN(port, read_PORTIO_INEN(port) & ~(1u << gpio));
  56. bf538_gpio_set_value(port, gpio, value);
  57. write_PORTIO_DIR(port, read_PORTIO_DIR(port) | (1u << gpio));
  58. return 0;
  59. }
  60. static int bf538_gpio_request(struct gpio_chip *chip, unsigned gpio)
  61. {
  62. return bfin_special_gpio_request(chip->base + gpio, chip->label);
  63. }
  64. static void bf538_gpio_free(struct gpio_chip *chip, unsigned gpio)
  65. {
  66. return bfin_special_gpio_free(chip->base + gpio);
  67. }
  68. /* We don't set the irq fields as these banks cannot generate interrupts */
  69. static struct gpio_chip bf538_portc_chip = {
  70. .label = "GPIO-PC",
  71. .direction_input = bf538_gpio_direction_input,
  72. .get = bf538_gpio_get_value,
  73. .direction_output = bf538_gpio_direction_output,
  74. .set = bf538_gpio_set_value,
  75. .request = bf538_gpio_request,
  76. .free = bf538_gpio_free,
  77. .base = GPIO_PC0,
  78. .ngpio = GPIO_PC9 - GPIO_PC0 + 1,
  79. };
  80. static struct gpio_chip bf538_portd_chip = {
  81. .label = "GPIO-PD",
  82. .direction_input = bf538_gpio_direction_input,
  83. .get = bf538_gpio_get_value,
  84. .direction_output = bf538_gpio_direction_output,
  85. .set = bf538_gpio_set_value,
  86. .request = bf538_gpio_request,
  87. .free = bf538_gpio_free,
  88. .base = GPIO_PD0,
  89. .ngpio = GPIO_PD13 - GPIO_PD0 + 1,
  90. };
  91. static struct gpio_chip bf538_porte_chip = {
  92. .label = "GPIO-PE",
  93. .direction_input = bf538_gpio_direction_input,
  94. .get = bf538_gpio_get_value,
  95. .direction_output = bf538_gpio_direction_output,
  96. .set = bf538_gpio_set_value,
  97. .request = bf538_gpio_request,
  98. .free = bf538_gpio_free,
  99. .base = GPIO_PE0,
  100. .ngpio = GPIO_PE15 - GPIO_PE0 + 1,
  101. };
  102. static int __init bf538_extgpio_setup(void)
  103. {
  104. return gpiochip_add(&bf538_portc_chip) |
  105. gpiochip_add(&bf538_portd_chip) |
  106. gpiochip_add(&bf538_porte_chip);
  107. }
  108. arch_initcall(bf538_extgpio_setup);
  109. #ifdef CONFIG_PM
  110. static struct {
  111. u16 data, dir, inen;
  112. } gpio_bank_saved[3];
  113. static void __iomem * const port_bases[3] = {
  114. (void *)PORTCIO,
  115. (void *)PORTDIO,
  116. (void *)PORTEIO,
  117. };
  118. void bfin_special_gpio_pm_hibernate_suspend(void)
  119. {
  120. int i;
  121. for (i = 0; i < ARRAY_SIZE(port_bases); ++i) {
  122. gpio_bank_saved[i].data = read_PORTIO(port_bases[i]);
  123. gpio_bank_saved[i].inen = read_PORTIO_INEN(port_bases[i]);
  124. gpio_bank_saved[i].dir = read_PORTIO_DIR(port_bases[i]);
  125. }
  126. }
  127. void bfin_special_gpio_pm_hibernate_restore(void)
  128. {
  129. int i;
  130. for (i = 0; i < ARRAY_SIZE(port_bases); ++i) {
  131. write_PORTIO_INEN(port_bases[i], gpio_bank_saved[i].inen);
  132. write_PORTIO_SET(port_bases[i],
  133. gpio_bank_saved[i].data & gpio_bank_saved[i].dir);
  134. write_PORTIO_DIR(port_bases[i], gpio_bank_saved[i].dir);
  135. }
  136. }
  137. #endif