cm_bf561.c 12 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  16. #include <linux/usb/isp1362.h>
  17. #endif
  18. #include <linux/ata_platform.h>
  19. #include <linux/irq.h>
  20. #include <linux/gpio.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/portmux.h>
  24. #include <asm/dpmc.h>
  25. #include <linux/mtd/physmap.h>
  26. /*
  27. * Name the Board for the /proc/cpuinfo
  28. */
  29. const char bfin_board_name[] = "Bluetechnix CM BF561";
  30. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  31. /* all SPI peripherals info goes here */
  32. #if IS_ENABLED(CONFIG_MTD_M25P80)
  33. static struct mtd_partition bfin_spi_flash_partitions[] = {
  34. {
  35. .name = "bootloader(spi)",
  36. .size = 0x00020000,
  37. .offset = 0,
  38. .mask_flags = MTD_CAP_ROM
  39. }, {
  40. .name = "linux kernel(spi)",
  41. .size = 0xe0000,
  42. .offset = 0x20000
  43. }, {
  44. .name = "file system(spi)",
  45. .size = 0x700000,
  46. .offset = 0x00100000,
  47. }
  48. };
  49. static struct flash_platform_data bfin_spi_flash_data = {
  50. .name = "m25p80",
  51. .parts = bfin_spi_flash_partitions,
  52. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  53. .type = "m25p64",
  54. };
  55. /* SPI flash chip (m25p64) */
  56. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  57. .enable_dma = 0, /* use dma transfer with this chip*/
  58. };
  59. #endif
  60. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  61. #if IS_ENABLED(CONFIG_MTD_M25P80)
  62. {
  63. /* the modalias must be the same as spi device driver name */
  64. .modalias = "m25p80", /* Name of spi_driver for this device */
  65. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  66. .bus_num = 0, /* Framework bus number */
  67. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  68. .platform_data = &bfin_spi_flash_data,
  69. .controller_data = &spi_flash_chip_info,
  70. .mode = SPI_MODE_3,
  71. },
  72. #endif
  73. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
  74. {
  75. .modalias = "ad183x",
  76. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  77. .bus_num = 0,
  78. .chip_select = 4,
  79. },
  80. #endif
  81. #if IS_ENABLED(CONFIG_MMC_SPI)
  82. {
  83. .modalias = "mmc_spi",
  84. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  85. .bus_num = 0,
  86. .chip_select = 1,
  87. .mode = SPI_MODE_3,
  88. },
  89. #endif
  90. };
  91. /* SPI (0) */
  92. static struct resource bfin_spi0_resource[] = {
  93. [0] = {
  94. .start = SPI0_REGBASE,
  95. .end = SPI0_REGBASE + 0xFF,
  96. .flags = IORESOURCE_MEM,
  97. },
  98. [1] = {
  99. .start = CH_SPI,
  100. .end = CH_SPI,
  101. .flags = IORESOURCE_DMA,
  102. },
  103. [2] = {
  104. .start = IRQ_SPI,
  105. .end = IRQ_SPI,
  106. .flags = IORESOURCE_IRQ,
  107. },
  108. };
  109. /* SPI controller data */
  110. static struct bfin5xx_spi_master bfin_spi0_info = {
  111. .num_chipselect = 8,
  112. .enable_dma = 1, /* master has the ability to do dma transfer */
  113. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  114. };
  115. static struct platform_device bfin_spi0_device = {
  116. .name = "bfin-spi",
  117. .id = 0, /* Bus number */
  118. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  119. .resource = bfin_spi0_resource,
  120. .dev = {
  121. .platform_data = &bfin_spi0_info, /* Passed to driver */
  122. },
  123. };
  124. #endif /* spi master and devices */
  125. #if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
  126. static struct platform_device hitachi_fb_device = {
  127. .name = "hitachi-tx09",
  128. };
  129. #endif
  130. #if IS_ENABLED(CONFIG_SMC91X)
  131. #include <linux/smc91x.h>
  132. static struct smc91x_platdata smc91x_info = {
  133. .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
  134. SMC91X_NOWAIT,
  135. .leda = RPC_LED_100_10,
  136. .ledb = RPC_LED_TX_RX,
  137. };
  138. static struct resource smc91x_resources[] = {
  139. {
  140. .name = "smc91x-regs",
  141. .start = 0x28000300,
  142. .end = 0x28000300 + 16,
  143. .flags = IORESOURCE_MEM,
  144. }, {
  145. .start = IRQ_PF0,
  146. .end = IRQ_PF0,
  147. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  148. },
  149. };
  150. static struct platform_device smc91x_device = {
  151. .name = "smc91x",
  152. .id = 0,
  153. .num_resources = ARRAY_SIZE(smc91x_resources),
  154. .resource = smc91x_resources,
  155. .dev = {
  156. .platform_data = &smc91x_info,
  157. },
  158. };
  159. #endif
  160. #if IS_ENABLED(CONFIG_SMSC911X)
  161. #include <linux/smsc911x.h>
  162. static struct resource smsc911x_resources[] = {
  163. {
  164. .name = "smsc911x-memory",
  165. .start = 0x24008000,
  166. .end = 0x24008000 + 0xFF,
  167. .flags = IORESOURCE_MEM,
  168. },
  169. {
  170. .start = IRQ_PF43,
  171. .end = IRQ_PF43,
  172. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  173. },
  174. };
  175. static struct smsc911x_platform_config smsc911x_config = {
  176. .flags = SMSC911X_USE_16BIT,
  177. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  178. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  179. .phy_interface = PHY_INTERFACE_MODE_MII,
  180. };
  181. static struct platform_device smsc911x_device = {
  182. .name = "smsc911x",
  183. .id = 0,
  184. .num_resources = ARRAY_SIZE(smsc911x_resources),
  185. .resource = smsc911x_resources,
  186. .dev = {
  187. .platform_data = &smsc911x_config,
  188. },
  189. };
  190. #endif
  191. #if IS_ENABLED(CONFIG_USB_NET2272)
  192. static struct resource net2272_bfin_resources[] = {
  193. {
  194. .start = 0x24000000,
  195. .end = 0x24000000 + 0x100,
  196. .flags = IORESOURCE_MEM,
  197. }, {
  198. .start = IRQ_PF45,
  199. .end = IRQ_PF45,
  200. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  201. },
  202. };
  203. static struct platform_device net2272_bfin_device = {
  204. .name = "net2272",
  205. .id = -1,
  206. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  207. .resource = net2272_bfin_resources,
  208. };
  209. #endif
  210. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  211. static struct resource isp1362_hcd_resources[] = {
  212. {
  213. .start = 0x24008000,
  214. .end = 0x24008000,
  215. .flags = IORESOURCE_MEM,
  216. }, {
  217. .start = 0x24008004,
  218. .end = 0x24008004,
  219. .flags = IORESOURCE_MEM,
  220. }, {
  221. .start = IRQ_PF47,
  222. .end = IRQ_PF47,
  223. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  224. },
  225. };
  226. static struct isp1362_platform_data isp1362_priv = {
  227. .sel15Kres = 1,
  228. .clknotstop = 0,
  229. .oc_enable = 0,
  230. .int_act_high = 0,
  231. .int_edge_triggered = 0,
  232. .remote_wakeup_connected = 0,
  233. .no_power_switching = 1,
  234. .power_switching_mode = 0,
  235. };
  236. static struct platform_device isp1362_hcd_device = {
  237. .name = "isp1362-hcd",
  238. .id = 0,
  239. .dev = {
  240. .platform_data = &isp1362_priv,
  241. },
  242. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  243. .resource = isp1362_hcd_resources,
  244. };
  245. #endif
  246. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  247. #ifdef CONFIG_SERIAL_BFIN_UART0
  248. static struct resource bfin_uart0_resources[] = {
  249. {
  250. .start = BFIN_UART_THR,
  251. .end = BFIN_UART_GCTL+2,
  252. .flags = IORESOURCE_MEM,
  253. },
  254. {
  255. .start = IRQ_UART_TX,
  256. .end = IRQ_UART_TX,
  257. .flags = IORESOURCE_IRQ,
  258. },
  259. {
  260. .start = IRQ_UART_RX,
  261. .end = IRQ_UART_RX,
  262. .flags = IORESOURCE_IRQ,
  263. },
  264. {
  265. .start = IRQ_UART_ERROR,
  266. .end = IRQ_UART_ERROR,
  267. .flags = IORESOURCE_IRQ,
  268. },
  269. {
  270. .start = CH_UART_TX,
  271. .end = CH_UART_TX,
  272. .flags = IORESOURCE_DMA,
  273. },
  274. {
  275. .start = CH_UART_RX,
  276. .end = CH_UART_RX,
  277. .flags = IORESOURCE_DMA,
  278. },
  279. };
  280. static unsigned short bfin_uart0_peripherals[] = {
  281. P_UART0_TX, P_UART0_RX, 0
  282. };
  283. static struct platform_device bfin_uart0_device = {
  284. .name = "bfin-uart",
  285. .id = 0,
  286. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  287. .resource = bfin_uart0_resources,
  288. .dev = {
  289. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  290. },
  291. };
  292. #endif
  293. #endif
  294. #if IS_ENABLED(CONFIG_BFIN_SIR)
  295. #ifdef CONFIG_BFIN_SIR0
  296. static struct resource bfin_sir0_resources[] = {
  297. {
  298. .start = 0xFFC00400,
  299. .end = 0xFFC004FF,
  300. .flags = IORESOURCE_MEM,
  301. },
  302. {
  303. .start = IRQ_UART0_RX,
  304. .end = IRQ_UART0_RX+1,
  305. .flags = IORESOURCE_IRQ,
  306. },
  307. {
  308. .start = CH_UART0_RX,
  309. .end = CH_UART0_RX+1,
  310. .flags = IORESOURCE_DMA,
  311. },
  312. };
  313. static struct platform_device bfin_sir0_device = {
  314. .name = "bfin_sir",
  315. .id = 0,
  316. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  317. .resource = bfin_sir0_resources,
  318. };
  319. #endif
  320. #endif
  321. #if IS_ENABLED(CONFIG_PATA_PLATFORM)
  322. #define PATA_INT IRQ_PF46
  323. static struct pata_platform_info bfin_pata_platform_data = {
  324. .ioport_shift = 2,
  325. };
  326. static struct resource bfin_pata_resources[] = {
  327. {
  328. .start = 0x2400C000,
  329. .end = 0x2400C001F,
  330. .flags = IORESOURCE_MEM,
  331. },
  332. {
  333. .start = 0x2400D018,
  334. .end = 0x2400D01B,
  335. .flags = IORESOURCE_MEM,
  336. },
  337. {
  338. .start = PATA_INT,
  339. .end = PATA_INT,
  340. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  341. },
  342. };
  343. static struct platform_device bfin_pata_device = {
  344. .name = "pata_platform",
  345. .id = -1,
  346. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  347. .resource = bfin_pata_resources,
  348. .dev = {
  349. .platform_data = &bfin_pata_platform_data,
  350. }
  351. };
  352. #endif
  353. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  354. static struct mtd_partition para_partitions[] = {
  355. {
  356. .name = "bootloader(nor)",
  357. .size = 0x40000,
  358. .offset = 0,
  359. }, {
  360. .name = "linux kernel(nor)",
  361. .size = 0x100000,
  362. .offset = MTDPART_OFS_APPEND,
  363. }, {
  364. .name = "file system(nor)",
  365. .size = MTDPART_SIZ_FULL,
  366. .offset = MTDPART_OFS_APPEND,
  367. }
  368. };
  369. static struct physmap_flash_data para_flash_data = {
  370. .width = 2,
  371. .parts = para_partitions,
  372. .nr_parts = ARRAY_SIZE(para_partitions),
  373. };
  374. static struct resource para_flash_resource = {
  375. .start = 0x20000000,
  376. .end = 0x207fffff,
  377. .flags = IORESOURCE_MEM,
  378. };
  379. static struct platform_device para_flash_device = {
  380. .name = "physmap-flash",
  381. .id = 0,
  382. .dev = {
  383. .platform_data = &para_flash_data,
  384. },
  385. .num_resources = 1,
  386. .resource = &para_flash_resource,
  387. };
  388. #endif
  389. static const unsigned int cclk_vlev_datasheet[] =
  390. {
  391. VRPAIR(VLEV_085, 250000000),
  392. VRPAIR(VLEV_090, 300000000),
  393. VRPAIR(VLEV_095, 313000000),
  394. VRPAIR(VLEV_100, 350000000),
  395. VRPAIR(VLEV_105, 400000000),
  396. VRPAIR(VLEV_110, 444000000),
  397. VRPAIR(VLEV_115, 450000000),
  398. VRPAIR(VLEV_120, 475000000),
  399. VRPAIR(VLEV_125, 500000000),
  400. VRPAIR(VLEV_130, 600000000),
  401. };
  402. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  403. .tuple_tab = cclk_vlev_datasheet,
  404. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  405. .vr_settling_time = 25 /* us */,
  406. };
  407. static struct platform_device bfin_dpmc = {
  408. .name = "bfin dpmc",
  409. .dev = {
  410. .platform_data = &bfin_dmpc_vreg_data,
  411. },
  412. };
  413. static struct platform_device *cm_bf561_devices[] __initdata = {
  414. &bfin_dpmc,
  415. #if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
  416. &hitachi_fb_device,
  417. #endif
  418. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  419. #ifdef CONFIG_SERIAL_BFIN_UART0
  420. &bfin_uart0_device,
  421. #endif
  422. #endif
  423. #if IS_ENABLED(CONFIG_BFIN_SIR)
  424. #ifdef CONFIG_BFIN_SIR0
  425. &bfin_sir0_device,
  426. #endif
  427. #endif
  428. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  429. &isp1362_hcd_device,
  430. #endif
  431. #if IS_ENABLED(CONFIG_SMC91X)
  432. &smc91x_device,
  433. #endif
  434. #if IS_ENABLED(CONFIG_SMSC911X)
  435. &smsc911x_device,
  436. #endif
  437. #if IS_ENABLED(CONFIG_USB_NET2272)
  438. &net2272_bfin_device,
  439. #endif
  440. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  441. &bfin_spi0_device,
  442. #endif
  443. #if IS_ENABLED(CONFIG_PATA_PLATFORM)
  444. &bfin_pata_device,
  445. #endif
  446. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  447. &para_flash_device,
  448. #endif
  449. };
  450. static int __init net2272_init(void)
  451. {
  452. #if IS_ENABLED(CONFIG_USB_NET2272)
  453. int ret;
  454. ret = gpio_request(GPIO_PF46, "net2272");
  455. if (ret)
  456. return ret;
  457. /* Reset USB Chip, PF46 */
  458. gpio_direction_output(GPIO_PF46, 0);
  459. mdelay(2);
  460. gpio_set_value(GPIO_PF46, 1);
  461. #endif
  462. return 0;
  463. }
  464. static int __init cm_bf561_init(void)
  465. {
  466. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  467. platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
  468. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  469. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  470. #endif
  471. #if IS_ENABLED(CONFIG_PATA_PLATFORM)
  472. irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
  473. #endif
  474. if (net2272_init())
  475. pr_warning("unable to configure net2272; it probably won't work\n");
  476. return 0;
  477. }
  478. arch_initcall(cm_bf561_init);
  479. static struct platform_device *cm_bf561_early_devices[] __initdata = {
  480. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  481. #ifdef CONFIG_SERIAL_BFIN_UART0
  482. &bfin_uart0_device,
  483. #endif
  484. #endif
  485. };
  486. void __init native_machine_early_platform_add_devices(void)
  487. {
  488. printk(KERN_INFO "register early platform devices\n");
  489. early_platform_add_devices(cm_bf561_early_devices,
  490. ARRAY_SIZE(cm_bf561_early_devices));
  491. }