pll.h 1.3 KB

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  1. /*
  2. * Copyright 2005-2010 Analog Devices Inc.
  3. *
  4. * Licensed under the GPL-2 or later.
  5. */
  6. #ifndef _MACH_PLL_H
  7. #define _MACH_PLL_H
  8. #ifndef __ASSEMBLY__
  9. #ifdef CONFIG_SMP
  10. #include <asm/blackfin.h>
  11. #include <asm/irqflags.h>
  12. #include <mach/irq.h>
  13. #define SUPPLE_0_WAKEUP ((IRQ_SUPPLE_0 - (IRQ_CORETMR + 1)) % 32)
  14. #define SUPPLE_1_WAKEUP ((IRQ_SUPPLE_1 - (IRQ_CORETMR + 1)) % 32)
  15. static inline void
  16. bfin_iwr_restore(unsigned long iwr0, unsigned long iwr1, unsigned long iwr2)
  17. {
  18. unsigned long SICA_SICB_OFF = ((bfin_read_DSPID() & 0xff) ? 0x1000 : 0);
  19. bfin_write32(SIC_IWR0 + SICA_SICB_OFF, iwr0);
  20. bfin_write32(SIC_IWR1 + SICA_SICB_OFF, iwr1);
  21. }
  22. #define bfin_iwr_restore bfin_iwr_restore
  23. static inline void
  24. bfin_iwr_save(unsigned long niwr0, unsigned long niwr1, unsigned long niwr2,
  25. unsigned long *iwr0, unsigned long *iwr1, unsigned long *iwr2)
  26. {
  27. unsigned long SICA_SICB_OFF = ((bfin_read_DSPID() & 0xff) ? 0x1000 : 0);
  28. *iwr0 = bfin_read32(SIC_IWR0 + SICA_SICB_OFF);
  29. *iwr1 = bfin_read32(SIC_IWR1 + SICA_SICB_OFF);
  30. bfin_iwr_restore(niwr0, niwr1, niwr2);
  31. }
  32. #define bfin_iwr_save bfin_iwr_save
  33. static inline void
  34. bfin_iwr_set_sup0(unsigned long *iwr0, unsigned long *iwr1, unsigned long *iwr2)
  35. {
  36. bfin_iwr_save(0, IWR_ENABLE(SUPPLE_0_WAKEUP) |
  37. IWR_ENABLE(SUPPLE_1_WAKEUP), 0, iwr0, iwr1, iwr2);
  38. }
  39. #endif
  40. #endif
  41. #include <mach-common/pll.h>
  42. #endif