arch_checks.c 2.2 KB

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  1. /*
  2. * Do some checking to make sure things are OK
  3. *
  4. * Copyright 2007-2010 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <asm/fixed_code.h>
  9. #include <mach/anomaly.h>
  10. #include <asm/clocks.h>
  11. #ifdef CONFIG_BFIN_KERNEL_CLOCK
  12. # if (CONFIG_VCO_HZ > CONFIG_MAX_VCO_HZ)
  13. # error "VCO selected is more than maximum value. Please change the VCO multipler"
  14. # endif
  15. # if (CONFIG_SCLK_HZ > CONFIG_MAX_SCLK_HZ)
  16. # error "Sclk value selected is more than maximum. Please select a proper value for SCLK multiplier"
  17. # endif
  18. # if (CONFIG_SCLK_HZ < CONFIG_MIN_SCLK_HZ)
  19. # error "Sclk value selected is less than minimum. Please select a proper value for SCLK multiplier"
  20. # endif
  21. # if (ANOMALY_05000273) && (CONFIG_SCLK_HZ * 2 > CONFIG_CCLK_HZ)
  22. # error "ANOMALY 05000273, please make sure CCLK is at least 2x SCLK"
  23. # endif
  24. # if (CONFIG_SCLK_HZ > CONFIG_CCLK_HZ) && (CONFIG_SCLK_HZ != CONFIG_CLKIN_HZ) && (CONFIG_CCLK_HZ != CONFIG_CLKIN_HZ)
  25. # error "Please select sclk less than cclk"
  26. # endif
  27. #endif /* CONFIG_BFIN_KERNEL_CLOCK */
  28. #if CONFIG_BOOT_LOAD < FIXED_CODE_END
  29. # error "The kernel load address must be after the fixed code section"
  30. #endif
  31. #if (CONFIG_BOOT_LOAD & 0x3)
  32. # error "The kernel load address must be 4 byte aligned"
  33. #endif
  34. /* The entire kernel must be able to make a 24bit pcrel call to start of L1 */
  35. #if ((0xffffffff - L1_CODE_START + 1) + CONFIG_BOOT_LOAD) > 0x1000000
  36. # error "The kernel load address is too high; keep it below 10meg for safety"
  37. #endif
  38. #if ANOMALY_05000263 && defined(CONFIG_MPU)
  39. # error the MPU will not function safely while Anomaly 05000263 applies
  40. #endif
  41. #if ANOMALY_05000448
  42. # error You are using a part with anomaly 05000448, this issue causes random memory read/write failures - that means random crashes.
  43. #endif
  44. /* if 220 exists, can not set External Memory WB and L2 not_cached, either External Memory not_cached and L2 WB */
  45. #if ANOMALY_05000220 && \
  46. (defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK))
  47. # error "Anomaly 05000220 does not allow you to use Write Back cache with L2 or External Memory"
  48. #endif
  49. #if ANOMALY_05000491 && !defined(CONFIG_ICACHE_FLUSH_L1)
  50. # error You need IFLUSH in L1 inst while Anomaly 05000491 applies
  51. #endif