smpboot.c 20 KB

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  1. /*
  2. * SMP boot-related support
  3. *
  4. * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
  5. * David Mosberger-Tang <davidm@hpl.hp.com>
  6. * Copyright (C) 2001, 2004-2005 Intel Corp
  7. * Rohit Seth <rohit.seth@intel.com>
  8. * Suresh Siddha <suresh.b.siddha@intel.com>
  9. * Gordon Jin <gordon.jin@intel.com>
  10. * Ashok Raj <ashok.raj@intel.com>
  11. *
  12. * 01/05/16 Rohit Seth <rohit.seth@intel.com> Moved SMP booting functions from smp.c to here.
  13. * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code.
  14. * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence.
  15. * smp_boot_cpus()/smp_commence() is replaced by
  16. * smp_prepare_cpus()/__cpu_up()/smp_cpus_done().
  17. * 04/06/21 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
  18. * 04/12/26 Jin Gordon <gordon.jin@intel.com>
  19. * 04/12/26 Rohit Seth <rohit.seth@intel.com>
  20. * Add multi-threading and multi-core detection
  21. * 05/01/30 Suresh Siddha <suresh.b.siddha@intel.com>
  22. * Setup cpu_sibling_map and cpu_core_map
  23. */
  24. #include <linux/module.h>
  25. #include <linux/acpi.h>
  26. #include <linux/bootmem.h>
  27. #include <linux/cpu.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/irq.h>
  32. #include <linux/kernel.h>
  33. #include <linux/kernel_stat.h>
  34. #include <linux/mm.h>
  35. #include <linux/notifier.h>
  36. #include <linux/smp.h>
  37. #include <linux/spinlock.h>
  38. #include <linux/efi.h>
  39. #include <linux/percpu.h>
  40. #include <linux/bitops.h>
  41. #include <linux/atomic.h>
  42. #include <asm/cache.h>
  43. #include <asm/current.h>
  44. #include <asm/delay.h>
  45. #include <asm/io.h>
  46. #include <asm/irq.h>
  47. #include <asm/machvec.h>
  48. #include <asm/mca.h>
  49. #include <asm/page.h>
  50. #include <asm/pgalloc.h>
  51. #include <asm/pgtable.h>
  52. #include <asm/processor.h>
  53. #include <asm/ptrace.h>
  54. #include <asm/sal.h>
  55. #include <asm/tlbflush.h>
  56. #include <asm/unistd.h>
  57. #include <asm/sn/arch.h>
  58. #define SMP_DEBUG 0
  59. #if SMP_DEBUG
  60. #define Dprintk(x...) printk(x)
  61. #else
  62. #define Dprintk(x...)
  63. #endif
  64. #ifdef CONFIG_HOTPLUG_CPU
  65. #ifdef CONFIG_PERMIT_BSP_REMOVE
  66. #define bsp_remove_ok 1
  67. #else
  68. #define bsp_remove_ok 0
  69. #endif
  70. /*
  71. * Global array allocated for NR_CPUS at boot time
  72. */
  73. struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
  74. /*
  75. * start_ap in head.S uses this to store current booting cpu
  76. * info.
  77. */
  78. struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0];
  79. #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]);
  80. #else
  81. #define set_brendez_area(x)
  82. #endif
  83. /*
  84. * ITC synchronization related stuff:
  85. */
  86. #define MASTER (0)
  87. #define SLAVE (SMP_CACHE_BYTES/8)
  88. #define NUM_ROUNDS 64 /* magic value */
  89. #define NUM_ITERS 5 /* likewise */
  90. static DEFINE_SPINLOCK(itc_sync_lock);
  91. static volatile unsigned long go[SLAVE + 1];
  92. #define DEBUG_ITC_SYNC 0
  93. extern void start_ap (void);
  94. extern unsigned long ia64_iobase;
  95. struct task_struct *task_for_booting_cpu;
  96. /*
  97. * State for each CPU
  98. */
  99. DEFINE_PER_CPU(int, cpu_state);
  100. cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned;
  101. EXPORT_SYMBOL(cpu_core_map);
  102. DEFINE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map);
  103. EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
  104. int smp_num_siblings = 1;
  105. /* which logical CPU number maps to which CPU (physical APIC ID) */
  106. volatile int ia64_cpu_to_sapicid[NR_CPUS];
  107. EXPORT_SYMBOL(ia64_cpu_to_sapicid);
  108. static cpumask_t cpu_callin_map;
  109. struct smp_boot_data smp_boot_data __initdata;
  110. unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */
  111. char __initdata no_int_routing;
  112. unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */
  113. #ifdef CONFIG_FORCE_CPEI_RETARGET
  114. #define CPEI_OVERRIDE_DEFAULT (1)
  115. #else
  116. #define CPEI_OVERRIDE_DEFAULT (0)
  117. #endif
  118. unsigned int force_cpei_retarget = CPEI_OVERRIDE_DEFAULT;
  119. static int __init
  120. cmdl_force_cpei(char *str)
  121. {
  122. int value=0;
  123. get_option (&str, &value);
  124. force_cpei_retarget = value;
  125. return 1;
  126. }
  127. __setup("force_cpei=", cmdl_force_cpei);
  128. static int __init
  129. nointroute (char *str)
  130. {
  131. no_int_routing = 1;
  132. printk ("no_int_routing on\n");
  133. return 1;
  134. }
  135. __setup("nointroute", nointroute);
  136. static void fix_b0_for_bsp(void)
  137. {
  138. #ifdef CONFIG_HOTPLUG_CPU
  139. int cpuid;
  140. static int fix_bsp_b0 = 1;
  141. cpuid = smp_processor_id();
  142. /*
  143. * Cache the b0 value on the first AP that comes up
  144. */
  145. if (!(fix_bsp_b0 && cpuid))
  146. return;
  147. sal_boot_rendez_state[0].br[0] = sal_boot_rendez_state[cpuid].br[0];
  148. printk ("Fixed BSP b0 value from CPU %d\n", cpuid);
  149. fix_bsp_b0 = 0;
  150. #endif
  151. }
  152. void
  153. sync_master (void *arg)
  154. {
  155. unsigned long flags, i;
  156. go[MASTER] = 0;
  157. local_irq_save(flags);
  158. {
  159. for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) {
  160. while (!go[MASTER])
  161. cpu_relax();
  162. go[MASTER] = 0;
  163. go[SLAVE] = ia64_get_itc();
  164. }
  165. }
  166. local_irq_restore(flags);
  167. }
  168. /*
  169. * Return the number of cycles by which our itc differs from the itc on the master
  170. * (time-keeper) CPU. A positive number indicates our itc is ahead of the master,
  171. * negative that it is behind.
  172. */
  173. static inline long
  174. get_delta (long *rt, long *master)
  175. {
  176. unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0;
  177. unsigned long tcenter, t0, t1, tm;
  178. long i;
  179. for (i = 0; i < NUM_ITERS; ++i) {
  180. t0 = ia64_get_itc();
  181. go[MASTER] = 1;
  182. while (!(tm = go[SLAVE]))
  183. cpu_relax();
  184. go[SLAVE] = 0;
  185. t1 = ia64_get_itc();
  186. if (t1 - t0 < best_t1 - best_t0)
  187. best_t0 = t0, best_t1 = t1, best_tm = tm;
  188. }
  189. *rt = best_t1 - best_t0;
  190. *master = best_tm - best_t0;
  191. /* average best_t0 and best_t1 without overflow: */
  192. tcenter = (best_t0/2 + best_t1/2);
  193. if (best_t0 % 2 + best_t1 % 2 == 2)
  194. ++tcenter;
  195. return tcenter - best_tm;
  196. }
  197. /*
  198. * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU
  199. * (normally the time-keeper CPU). We use a closed loop to eliminate the possibility of
  200. * unaccounted-for errors (such as getting a machine check in the middle of a calibration
  201. * step). The basic idea is for the slave to ask the master what itc value it has and to
  202. * read its own itc before and after the master responds. Each iteration gives us three
  203. * timestamps:
  204. *
  205. * slave master
  206. *
  207. * t0 ---\
  208. * ---\
  209. * --->
  210. * tm
  211. * /---
  212. * /---
  213. * t1 <---
  214. *
  215. *
  216. * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0
  217. * and t1. If we achieve this, the clocks are synchronized provided the interconnect
  218. * between the slave and the master is symmetric. Even if the interconnect were
  219. * asymmetric, we would still know that the synchronization error is smaller than the
  220. * roundtrip latency (t0 - t1).
  221. *
  222. * When the interconnect is quiet and symmetric, this lets us synchronize the itc to
  223. * within one or two cycles. However, we can only *guarantee* that the synchronization is
  224. * accurate to within a round-trip time, which is typically in the range of several
  225. * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually
  226. * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better
  227. * than half a micro second or so.
  228. */
  229. void
  230. ia64_sync_itc (unsigned int master)
  231. {
  232. long i, delta, adj, adjust_latency = 0, done = 0;
  233. unsigned long flags, rt, master_time_stamp, bound;
  234. #if DEBUG_ITC_SYNC
  235. struct {
  236. long rt; /* roundtrip time */
  237. long master; /* master's timestamp */
  238. long diff; /* difference between midpoint and master's timestamp */
  239. long lat; /* estimate of itc adjustment latency */
  240. } t[NUM_ROUNDS];
  241. #endif
  242. /*
  243. * Make sure local timer ticks are disabled while we sync. If
  244. * they were enabled, we'd have to worry about nasty issues
  245. * like setting the ITC ahead of (or a long time before) the
  246. * next scheduled tick.
  247. */
  248. BUG_ON((ia64_get_itv() & (1 << 16)) == 0);
  249. go[MASTER] = 1;
  250. if (smp_call_function_single(master, sync_master, NULL, 0) < 0) {
  251. printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master);
  252. return;
  253. }
  254. while (go[MASTER])
  255. cpu_relax(); /* wait for master to be ready */
  256. spin_lock_irqsave(&itc_sync_lock, flags);
  257. {
  258. for (i = 0; i < NUM_ROUNDS; ++i) {
  259. delta = get_delta(&rt, &master_time_stamp);
  260. if (delta == 0) {
  261. done = 1; /* let's lock on to this... */
  262. bound = rt;
  263. }
  264. if (!done) {
  265. if (i > 0) {
  266. adjust_latency += -delta;
  267. adj = -delta + adjust_latency/4;
  268. } else
  269. adj = -delta;
  270. ia64_set_itc(ia64_get_itc() + adj);
  271. }
  272. #if DEBUG_ITC_SYNC
  273. t[i].rt = rt;
  274. t[i].master = master_time_stamp;
  275. t[i].diff = delta;
  276. t[i].lat = adjust_latency/4;
  277. #endif
  278. }
  279. }
  280. spin_unlock_irqrestore(&itc_sync_lock, flags);
  281. #if DEBUG_ITC_SYNC
  282. for (i = 0; i < NUM_ROUNDS; ++i)
  283. printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n",
  284. t[i].rt, t[i].master, t[i].diff, t[i].lat);
  285. #endif
  286. printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, "
  287. "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt);
  288. }
  289. /*
  290. * Ideally sets up per-cpu profiling hooks. Doesn't do much now...
  291. */
  292. static inline void smp_setup_percpu_timer(void)
  293. {
  294. }
  295. static void
  296. smp_callin (void)
  297. {
  298. int cpuid, phys_id, itc_master;
  299. struct cpuinfo_ia64 *last_cpuinfo, *this_cpuinfo;
  300. extern void ia64_init_itm(void);
  301. extern volatile int time_keeper_id;
  302. #ifdef CONFIG_PERFMON
  303. extern void pfm_init_percpu(void);
  304. #endif
  305. cpuid = smp_processor_id();
  306. phys_id = hard_smp_processor_id();
  307. itc_master = time_keeper_id;
  308. if (cpu_online(cpuid)) {
  309. printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n",
  310. phys_id, cpuid);
  311. BUG();
  312. }
  313. fix_b0_for_bsp();
  314. /*
  315. * numa_node_id() works after this.
  316. */
  317. set_numa_node(cpu_to_node_map[cpuid]);
  318. set_numa_mem(local_memory_node(cpu_to_node_map[cpuid]));
  319. spin_lock(&vector_lock);
  320. /* Setup the per cpu irq handling data structures */
  321. __setup_vector_irq(cpuid);
  322. notify_cpu_starting(cpuid);
  323. set_cpu_online(cpuid, true);
  324. per_cpu(cpu_state, cpuid) = CPU_ONLINE;
  325. spin_unlock(&vector_lock);
  326. smp_setup_percpu_timer();
  327. ia64_mca_cmc_vector_setup(); /* Setup vector on AP */
  328. #ifdef CONFIG_PERFMON
  329. pfm_init_percpu();
  330. #endif
  331. local_irq_enable();
  332. if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
  333. /*
  334. * Synchronize the ITC with the BP. Need to do this after irqs are
  335. * enabled because ia64_sync_itc() calls smp_call_function_single(), which
  336. * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls
  337. * local_bh_enable(), which bugs out if irqs are not enabled...
  338. */
  339. Dprintk("Going to syncup ITC with ITC Master.\n");
  340. ia64_sync_itc(itc_master);
  341. }
  342. /*
  343. * Get our bogomips.
  344. */
  345. ia64_init_itm();
  346. /*
  347. * Delay calibration can be skipped if new processor is identical to the
  348. * previous processor.
  349. */
  350. last_cpuinfo = cpu_data(cpuid - 1);
  351. this_cpuinfo = local_cpu_data;
  352. if (last_cpuinfo->itc_freq != this_cpuinfo->itc_freq ||
  353. last_cpuinfo->proc_freq != this_cpuinfo->proc_freq ||
  354. last_cpuinfo->features != this_cpuinfo->features ||
  355. last_cpuinfo->revision != this_cpuinfo->revision ||
  356. last_cpuinfo->family != this_cpuinfo->family ||
  357. last_cpuinfo->archrev != this_cpuinfo->archrev ||
  358. last_cpuinfo->model != this_cpuinfo->model)
  359. calibrate_delay();
  360. local_cpu_data->loops_per_jiffy = loops_per_jiffy;
  361. /*
  362. * Allow the master to continue.
  363. */
  364. cpumask_set_cpu(cpuid, &cpu_callin_map);
  365. Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid);
  366. }
  367. /*
  368. * Activate a secondary processor. head.S calls this.
  369. */
  370. int
  371. start_secondary (void *unused)
  372. {
  373. /* Early console may use I/O ports */
  374. ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase));
  375. #ifndef CONFIG_PRINTK_TIME
  376. Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id());
  377. #endif
  378. efi_map_pal_code();
  379. cpu_init();
  380. preempt_disable();
  381. smp_callin();
  382. cpu_startup_entry(CPUHP_ONLINE);
  383. return 0;
  384. }
  385. static int
  386. do_boot_cpu (int sapicid, int cpu, struct task_struct *idle)
  387. {
  388. int timeout;
  389. task_for_booting_cpu = idle;
  390. Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid);
  391. set_brendez_area(cpu);
  392. platform_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0);
  393. /*
  394. * Wait 10s total for the AP to start
  395. */
  396. Dprintk("Waiting on callin_map ...");
  397. for (timeout = 0; timeout < 100000; timeout++) {
  398. if (cpumask_test_cpu(cpu, &cpu_callin_map))
  399. break; /* It has booted */
  400. barrier(); /* Make sure we re-read cpu_callin_map */
  401. udelay(100);
  402. }
  403. Dprintk("\n");
  404. if (!cpumask_test_cpu(cpu, &cpu_callin_map)) {
  405. printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid);
  406. ia64_cpu_to_sapicid[cpu] = -1;
  407. set_cpu_online(cpu, false); /* was set in smp_callin() */
  408. return -EINVAL;
  409. }
  410. return 0;
  411. }
  412. static int __init
  413. decay (char *str)
  414. {
  415. int ticks;
  416. get_option (&str, &ticks);
  417. return 1;
  418. }
  419. __setup("decay=", decay);
  420. /*
  421. * Initialize the logical CPU number to SAPICID mapping
  422. */
  423. void __init
  424. smp_build_cpu_map (void)
  425. {
  426. int sapicid, cpu, i;
  427. int boot_cpu_id = hard_smp_processor_id();
  428. for (cpu = 0; cpu < NR_CPUS; cpu++) {
  429. ia64_cpu_to_sapicid[cpu] = -1;
  430. }
  431. ia64_cpu_to_sapicid[0] = boot_cpu_id;
  432. init_cpu_present(cpumask_of(0));
  433. set_cpu_possible(0, true);
  434. for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) {
  435. sapicid = smp_boot_data.cpu_phys_id[i];
  436. if (sapicid == boot_cpu_id)
  437. continue;
  438. set_cpu_present(cpu, true);
  439. set_cpu_possible(cpu, true);
  440. ia64_cpu_to_sapicid[cpu] = sapicid;
  441. cpu++;
  442. }
  443. }
  444. /*
  445. * Cycle through the APs sending Wakeup IPIs to boot each.
  446. */
  447. void __init
  448. smp_prepare_cpus (unsigned int max_cpus)
  449. {
  450. int boot_cpu_id = hard_smp_processor_id();
  451. /*
  452. * Initialize the per-CPU profiling counter/multiplier
  453. */
  454. smp_setup_percpu_timer();
  455. cpumask_set_cpu(0, &cpu_callin_map);
  456. local_cpu_data->loops_per_jiffy = loops_per_jiffy;
  457. ia64_cpu_to_sapicid[0] = boot_cpu_id;
  458. printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id);
  459. current_thread_info()->cpu = 0;
  460. /*
  461. * If SMP should be disabled, then really disable it!
  462. */
  463. if (!max_cpus) {
  464. printk(KERN_INFO "SMP mode deactivated.\n");
  465. init_cpu_online(cpumask_of(0));
  466. init_cpu_present(cpumask_of(0));
  467. init_cpu_possible(cpumask_of(0));
  468. return;
  469. }
  470. }
  471. void smp_prepare_boot_cpu(void)
  472. {
  473. set_cpu_online(smp_processor_id(), true);
  474. cpumask_set_cpu(smp_processor_id(), &cpu_callin_map);
  475. set_numa_node(cpu_to_node_map[smp_processor_id()]);
  476. per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
  477. }
  478. #ifdef CONFIG_HOTPLUG_CPU
  479. static inline void
  480. clear_cpu_sibling_map(int cpu)
  481. {
  482. int i;
  483. for_each_cpu(i, &per_cpu(cpu_sibling_map, cpu))
  484. cpumask_clear_cpu(cpu, &per_cpu(cpu_sibling_map, i));
  485. for_each_cpu(i, &cpu_core_map[cpu])
  486. cpumask_clear_cpu(cpu, &cpu_core_map[i]);
  487. per_cpu(cpu_sibling_map, cpu) = cpu_core_map[cpu] = CPU_MASK_NONE;
  488. }
  489. static void
  490. remove_siblinginfo(int cpu)
  491. {
  492. int last = 0;
  493. if (cpu_data(cpu)->threads_per_core == 1 &&
  494. cpu_data(cpu)->cores_per_socket == 1) {
  495. cpumask_clear_cpu(cpu, &cpu_core_map[cpu]);
  496. cpumask_clear_cpu(cpu, &per_cpu(cpu_sibling_map, cpu));
  497. return;
  498. }
  499. last = (cpumask_weight(&cpu_core_map[cpu]) == 1 ? 1 : 0);
  500. /* remove it from all sibling map's */
  501. clear_cpu_sibling_map(cpu);
  502. }
  503. extern void fixup_irqs(void);
  504. int migrate_platform_irqs(unsigned int cpu)
  505. {
  506. int new_cpei_cpu;
  507. struct irq_data *data = NULL;
  508. const struct cpumask *mask;
  509. int retval = 0;
  510. /*
  511. * dont permit CPEI target to removed.
  512. */
  513. if (cpe_vector > 0 && is_cpu_cpei_target(cpu)) {
  514. printk ("CPU (%d) is CPEI Target\n", cpu);
  515. if (can_cpei_retarget()) {
  516. /*
  517. * Now re-target the CPEI to a different processor
  518. */
  519. new_cpei_cpu = cpumask_any(cpu_online_mask);
  520. mask = cpumask_of(new_cpei_cpu);
  521. set_cpei_target_cpu(new_cpei_cpu);
  522. data = irq_get_irq_data(ia64_cpe_irq);
  523. /*
  524. * Switch for now, immediately, we need to do fake intr
  525. * as other interrupts, but need to study CPEI behaviour with
  526. * polling before making changes.
  527. */
  528. if (data && data->chip) {
  529. data->chip->irq_disable(data);
  530. data->chip->irq_set_affinity(data, mask, false);
  531. data->chip->irq_enable(data);
  532. printk ("Re-targeting CPEI to cpu %d\n", new_cpei_cpu);
  533. }
  534. }
  535. if (!data) {
  536. printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu);
  537. retval = -EBUSY;
  538. }
  539. }
  540. return retval;
  541. }
  542. /* must be called with cpucontrol mutex held */
  543. int __cpu_disable(void)
  544. {
  545. int cpu = smp_processor_id();
  546. /*
  547. * dont permit boot processor for now
  548. */
  549. if (cpu == 0 && !bsp_remove_ok) {
  550. printk ("Your platform does not support removal of BSP\n");
  551. return (-EBUSY);
  552. }
  553. if (ia64_platform_is("sn2")) {
  554. if (!sn_cpu_disable_allowed(cpu))
  555. return -EBUSY;
  556. }
  557. set_cpu_online(cpu, false);
  558. if (migrate_platform_irqs(cpu)) {
  559. set_cpu_online(cpu, true);
  560. return -EBUSY;
  561. }
  562. remove_siblinginfo(cpu);
  563. fixup_irqs();
  564. local_flush_tlb_all();
  565. cpumask_clear_cpu(cpu, &cpu_callin_map);
  566. return 0;
  567. }
  568. void __cpu_die(unsigned int cpu)
  569. {
  570. unsigned int i;
  571. for (i = 0; i < 100; i++) {
  572. /* They ack this in play_dead by setting CPU_DEAD */
  573. if (per_cpu(cpu_state, cpu) == CPU_DEAD)
  574. {
  575. printk ("CPU %d is now offline\n", cpu);
  576. return;
  577. }
  578. msleep(100);
  579. }
  580. printk(KERN_ERR "CPU %u didn't die...\n", cpu);
  581. }
  582. #endif /* CONFIG_HOTPLUG_CPU */
  583. void
  584. smp_cpus_done (unsigned int dummy)
  585. {
  586. int cpu;
  587. unsigned long bogosum = 0;
  588. /*
  589. * Allow the user to impress friends.
  590. */
  591. for_each_online_cpu(cpu) {
  592. bogosum += cpu_data(cpu)->loops_per_jiffy;
  593. }
  594. printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
  595. (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100);
  596. }
  597. static inline void set_cpu_sibling_map(int cpu)
  598. {
  599. int i;
  600. for_each_online_cpu(i) {
  601. if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) {
  602. cpumask_set_cpu(i, &cpu_core_map[cpu]);
  603. cpumask_set_cpu(cpu, &cpu_core_map[i]);
  604. if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) {
  605. cpumask_set_cpu(i,
  606. &per_cpu(cpu_sibling_map, cpu));
  607. cpumask_set_cpu(cpu,
  608. &per_cpu(cpu_sibling_map, i));
  609. }
  610. }
  611. }
  612. }
  613. int
  614. __cpu_up(unsigned int cpu, struct task_struct *tidle)
  615. {
  616. int ret;
  617. int sapicid;
  618. sapicid = ia64_cpu_to_sapicid[cpu];
  619. if (sapicid == -1)
  620. return -EINVAL;
  621. /*
  622. * Already booted cpu? not valid anymore since we dont
  623. * do idle loop tightspin anymore.
  624. */
  625. if (cpumask_test_cpu(cpu, &cpu_callin_map))
  626. return -EINVAL;
  627. per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
  628. /* Processor goes to start_secondary(), sets online flag */
  629. ret = do_boot_cpu(sapicid, cpu, tidle);
  630. if (ret < 0)
  631. return ret;
  632. if (cpu_data(cpu)->threads_per_core == 1 &&
  633. cpu_data(cpu)->cores_per_socket == 1) {
  634. cpumask_set_cpu(cpu, &per_cpu(cpu_sibling_map, cpu));
  635. cpumask_set_cpu(cpu, &cpu_core_map[cpu]);
  636. return 0;
  637. }
  638. set_cpu_sibling_map(cpu);
  639. return 0;
  640. }
  641. /*
  642. * Assume that CPUs have been discovered by some platform-dependent interface. For
  643. * SoftSDV/Lion, that would be ACPI.
  644. *
  645. * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP().
  646. */
  647. void __init
  648. init_smp_config(void)
  649. {
  650. struct fptr {
  651. unsigned long fp;
  652. unsigned long gp;
  653. } *ap_startup;
  654. long sal_ret;
  655. /* Tell SAL where to drop the APs. */
  656. ap_startup = (struct fptr *) start_ap;
  657. sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ,
  658. ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0);
  659. if (sal_ret < 0)
  660. printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n",
  661. ia64_sal_strerror(sal_ret));
  662. }
  663. /*
  664. * identify_siblings(cpu) gets called from identify_cpu. This populates the
  665. * information related to logical execution units in per_cpu_data structure.
  666. */
  667. void identify_siblings(struct cpuinfo_ia64 *c)
  668. {
  669. long status;
  670. u16 pltid;
  671. pal_logical_to_physical_t info;
  672. status = ia64_pal_logical_to_phys(-1, &info);
  673. if (status != PAL_STATUS_SUCCESS) {
  674. if (status != PAL_STATUS_UNIMPLEMENTED) {
  675. printk(KERN_ERR
  676. "ia64_pal_logical_to_phys failed with %ld\n",
  677. status);
  678. return;
  679. }
  680. info.overview_ppid = 0;
  681. info.overview_cpp = 1;
  682. info.overview_tpc = 1;
  683. }
  684. status = ia64_sal_physical_id_info(&pltid);
  685. if (status != PAL_STATUS_SUCCESS) {
  686. if (status != PAL_STATUS_UNIMPLEMENTED)
  687. printk(KERN_ERR
  688. "ia64_sal_pltid failed with %ld\n",
  689. status);
  690. return;
  691. }
  692. c->socket_id = (pltid << 8) | info.overview_ppid;
  693. if (info.overview_cpp == 1 && info.overview_tpc == 1)
  694. return;
  695. c->cores_per_socket = info.overview_cpp;
  696. c->threads_per_core = info.overview_tpc;
  697. c->num_log = info.overview_num_log;
  698. c->core_id = info.log1_cid;
  699. c->thread_id = info.log1_tid;
  700. }
  701. /*
  702. * returns non zero, if multi-threading is enabled
  703. * on at least one physical package. Due to hotplug cpu
  704. * and (maxcpus=), all threads may not necessarily be enabled
  705. * even though the processor supports multi-threading.
  706. */
  707. int is_multithreading_enabled(void)
  708. {
  709. int i, j;
  710. for_each_present_cpu(i) {
  711. for_each_present_cpu(j) {
  712. if (j == i)
  713. continue;
  714. if ((cpu_data(j)->socket_id == cpu_data(i)->socket_id)) {
  715. if (cpu_data(j)->core_id == cpu_data(i)->core_id)
  716. return 1;
  717. }
  718. }
  719. }
  720. return 0;
  721. }
  722. EXPORT_SYMBOL_GPL(is_multithreading_enabled);