config.c 9.8 KB

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  1. /*
  2. * arch/m68k/bvme6000/config.c
  3. *
  4. * Copyright (C) 1997 Richard Hirst [richard@sleepie.demon.co.uk]
  5. *
  6. * Based on:
  7. *
  8. * linux/amiga/config.c
  9. *
  10. * Copyright (C) 1993 Hamish Macdonald
  11. *
  12. * This file is subject to the terms and conditions of the GNU General Public
  13. * License. See the file README.legal in the main directory of this archive
  14. * for more details.
  15. */
  16. #include <linux/types.h>
  17. #include <linux/kernel.h>
  18. #include <linux/mm.h>
  19. #include <linux/tty.h>
  20. #include <linux/console.h>
  21. #include <linux/linkage.h>
  22. #include <linux/init.h>
  23. #include <linux/major.h>
  24. #include <linux/genhd.h>
  25. #include <linux/rtc.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/bcd.h>
  28. #include <asm/bootinfo.h>
  29. #include <asm/bootinfo-vme.h>
  30. #include <asm/byteorder.h>
  31. #include <asm/pgtable.h>
  32. #include <asm/setup.h>
  33. #include <asm/irq.h>
  34. #include <asm/traps.h>
  35. #include <asm/rtc.h>
  36. #include <asm/machdep.h>
  37. #include <asm/bvme6000hw.h>
  38. static void bvme6000_get_model(char *model);
  39. extern void bvme6000_sched_init(irq_handler_t handler);
  40. extern u32 bvme6000_gettimeoffset(void);
  41. extern int bvme6000_hwclk (int, struct rtc_time *);
  42. extern int bvme6000_set_clock_mmss (unsigned long);
  43. extern void bvme6000_reset (void);
  44. void bvme6000_set_vectors (void);
  45. /* Save tick handler routine pointer, will point to xtime_update() in
  46. * kernel/timer/timekeeping.c, called via bvme6000_process_int() */
  47. static irq_handler_t tick_handler;
  48. int __init bvme6000_parse_bootinfo(const struct bi_record *bi)
  49. {
  50. if (be16_to_cpu(bi->tag) == BI_VME_TYPE)
  51. return 0;
  52. else
  53. return 1;
  54. }
  55. void bvme6000_reset(void)
  56. {
  57. volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
  58. printk ("\r\n\nCalled bvme6000_reset\r\n"
  59. "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
  60. /* The string of returns is to delay the reset until the whole
  61. * message is output. */
  62. /* Enable the watchdog, via PIT port C bit 4 */
  63. pit->pcddr |= 0x10; /* WDOG enable */
  64. while(1)
  65. ;
  66. }
  67. static void bvme6000_get_model(char *model)
  68. {
  69. sprintf(model, "BVME%d000", m68k_cputype == CPU_68060 ? 6 : 4);
  70. }
  71. /*
  72. * This function is called during kernel startup to initialize
  73. * the bvme6000 IRQ handling routines.
  74. */
  75. static void __init bvme6000_init_IRQ(void)
  76. {
  77. m68k_setup_user_interrupt(VEC_USER, 192);
  78. }
  79. void __init config_bvme6000(void)
  80. {
  81. volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
  82. /* Board type is only set by newer versions of vmelilo/tftplilo */
  83. if (!vme_brdtype) {
  84. if (m68k_cputype == CPU_68060)
  85. vme_brdtype = VME_TYPE_BVME6000;
  86. else
  87. vme_brdtype = VME_TYPE_BVME4000;
  88. }
  89. #if 0
  90. /* Call bvme6000_set_vectors() so ABORT will work, along with BVMBug
  91. * debugger. Note trap_init() will splat the abort vector, but
  92. * bvme6000_init_IRQ() will put it back again. Hopefully. */
  93. bvme6000_set_vectors();
  94. #endif
  95. mach_max_dma_address = 0xffffffff;
  96. mach_sched_init = bvme6000_sched_init;
  97. mach_init_IRQ = bvme6000_init_IRQ;
  98. arch_gettimeoffset = bvme6000_gettimeoffset;
  99. mach_hwclk = bvme6000_hwclk;
  100. mach_set_clock_mmss = bvme6000_set_clock_mmss;
  101. mach_reset = bvme6000_reset;
  102. mach_get_model = bvme6000_get_model;
  103. printk ("Board is %sconfigured as a System Controller\n",
  104. *config_reg_ptr & BVME_CONFIG_SW1 ? "" : "not ");
  105. /* Now do the PIT configuration */
  106. pit->pgcr = 0x00; /* Unidirectional 8 bit, no handshake for now */
  107. pit->psrr = 0x18; /* PIACK and PIRQ functions enabled */
  108. pit->pacr = 0x00; /* Sub Mode 00, H2 i/p, no DMA */
  109. pit->padr = 0x00; /* Just to be tidy! */
  110. pit->paddr = 0x00; /* All inputs for now (safest) */
  111. pit->pbcr = 0x80; /* Sub Mode 1x, H4 i/p, no DMA */
  112. pit->pbdr = 0xbc | (*config_reg_ptr & BVME_CONFIG_SW1 ? 0 : 0x40);
  113. /* PRI, SYSCON?, Level3, SCC clks from xtal */
  114. pit->pbddr = 0xf3; /* Mostly outputs */
  115. pit->pcdr = 0x01; /* PA transceiver disabled */
  116. pit->pcddr = 0x03; /* WDOG disable */
  117. /* Disable snooping for Ethernet and VME accesses */
  118. bvme_acr_addrctl = 0;
  119. }
  120. irqreturn_t bvme6000_abort_int (int irq, void *dev_id)
  121. {
  122. unsigned long *new = (unsigned long *)vectors;
  123. unsigned long *old = (unsigned long *)0xf8000000;
  124. /* Wait for button release */
  125. while (*(volatile unsigned char *)BVME_LOCAL_IRQ_STAT & BVME_ABORT_STATUS)
  126. ;
  127. *(new+4) = *(old+4); /* Illegal instruction */
  128. *(new+9) = *(old+9); /* Trace */
  129. *(new+47) = *(old+47); /* Trap #15 */
  130. *(new+0x1f) = *(old+0x1f); /* ABORT switch */
  131. return IRQ_HANDLED;
  132. }
  133. static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
  134. {
  135. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  136. unsigned char msr = rtc->msr & 0xc0;
  137. rtc->msr = msr | 0x20; /* Ack the interrupt */
  138. return tick_handler(irq, dev_id);
  139. }
  140. /*
  141. * Set up the RTC timer 1 to mode 2, so T1 output toggles every 5ms
  142. * (40000 x 125ns). It will interrupt every 10ms, when T1 goes low.
  143. * So, when reading the elapsed time, you should read timer1,
  144. * subtract it from 39999, and then add 40000 if T1 is high.
  145. * That gives you the number of 125ns ticks in to the 10ms period,
  146. * so divide by 8 to get the microsecond result.
  147. */
  148. void bvme6000_sched_init (irq_handler_t timer_routine)
  149. {
  150. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  151. unsigned char msr = rtc->msr & 0xc0;
  152. rtc->msr = 0; /* Ensure timer registers accessible */
  153. tick_handler = timer_routine;
  154. if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0,
  155. "timer", bvme6000_timer_int))
  156. panic ("Couldn't register timer int");
  157. rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */
  158. rtc->t1msb = 39999 >> 8;
  159. rtc->t1lsb = 39999 & 0xff;
  160. rtc->irr_icr1 &= 0xef; /* Route timer 1 to INTR pin */
  161. rtc->msr = 0x40; /* Access int.cntrl, etc */
  162. rtc->pfr_icr0 = 0x80; /* Just timer 1 ints enabled */
  163. rtc->irr_icr1 = 0;
  164. rtc->t1cr_omr = 0x0a; /* INTR+T1 active lo, push-pull */
  165. rtc->t0cr_rtmr &= 0xdf; /* Stop timers in standby */
  166. rtc->msr = 0; /* Access timer 1 control */
  167. rtc->t1cr_omr = 0x05; /* Mode 2, ext clk, GO */
  168. rtc->msr = msr;
  169. if (request_irq(BVME_IRQ_ABORT, bvme6000_abort_int, 0,
  170. "abort", bvme6000_abort_int))
  171. panic ("Couldn't register abort int");
  172. }
  173. /* This is always executed with interrupts disabled. */
  174. /*
  175. * NOTE: Don't accept any readings within 5us of rollover, as
  176. * the T1INT bit may be a little slow getting set. There is also
  177. * a fault in the chip, meaning that reads may produce invalid
  178. * results...
  179. */
  180. u32 bvme6000_gettimeoffset(void)
  181. {
  182. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  183. volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
  184. unsigned char msr = rtc->msr & 0xc0;
  185. unsigned char t1int, t1op;
  186. u32 v = 800000, ov;
  187. rtc->msr = 0; /* Ensure timer registers accessible */
  188. do {
  189. ov = v;
  190. t1int = rtc->msr & 0x20;
  191. t1op = pit->pcdr & 0x04;
  192. rtc->t1cr_omr |= 0x40; /* Latch timer1 */
  193. v = rtc->t1msb << 8; /* Read timer1 */
  194. v |= rtc->t1lsb; /* Read timer1 */
  195. } while (t1int != (rtc->msr & 0x20) ||
  196. t1op != (pit->pcdr & 0x04) ||
  197. abs(ov-v) > 80 ||
  198. v > 39960);
  199. v = 39999 - v;
  200. if (!t1op) /* If in second half cycle.. */
  201. v += 40000;
  202. v /= 8; /* Convert ticks to microseconds */
  203. if (t1int)
  204. v += 10000; /* Int pending, + 10ms */
  205. rtc->msr = msr;
  206. return v * 1000;
  207. }
  208. /*
  209. * Looks like op is non-zero for setting the clock, and zero for
  210. * reading the clock.
  211. *
  212. * struct hwclk_time {
  213. * unsigned sec; 0..59
  214. * unsigned min; 0..59
  215. * unsigned hour; 0..23
  216. * unsigned day; 1..31
  217. * unsigned mon; 0..11
  218. * unsigned year; 00...
  219. * int wday; 0..6, 0 is Sunday, -1 means unknown/don't set
  220. * };
  221. */
  222. int bvme6000_hwclk(int op, struct rtc_time *t)
  223. {
  224. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  225. unsigned char msr = rtc->msr & 0xc0;
  226. rtc->msr = 0x40; /* Ensure clock and real-time-mode-register
  227. * are accessible */
  228. if (op)
  229. { /* Write.... */
  230. rtc->t0cr_rtmr = t->tm_year%4;
  231. rtc->bcd_tenms = 0;
  232. rtc->bcd_sec = bin2bcd(t->tm_sec);
  233. rtc->bcd_min = bin2bcd(t->tm_min);
  234. rtc->bcd_hr = bin2bcd(t->tm_hour);
  235. rtc->bcd_dom = bin2bcd(t->tm_mday);
  236. rtc->bcd_mth = bin2bcd(t->tm_mon + 1);
  237. rtc->bcd_year = bin2bcd(t->tm_year%100);
  238. if (t->tm_wday >= 0)
  239. rtc->bcd_dow = bin2bcd(t->tm_wday+1);
  240. rtc->t0cr_rtmr = t->tm_year%4 | 0x08;
  241. }
  242. else
  243. { /* Read.... */
  244. do {
  245. t->tm_sec = bcd2bin(rtc->bcd_sec);
  246. t->tm_min = bcd2bin(rtc->bcd_min);
  247. t->tm_hour = bcd2bin(rtc->bcd_hr);
  248. t->tm_mday = bcd2bin(rtc->bcd_dom);
  249. t->tm_mon = bcd2bin(rtc->bcd_mth)-1;
  250. t->tm_year = bcd2bin(rtc->bcd_year);
  251. if (t->tm_year < 70)
  252. t->tm_year += 100;
  253. t->tm_wday = bcd2bin(rtc->bcd_dow)-1;
  254. } while (t->tm_sec != bcd2bin(rtc->bcd_sec));
  255. }
  256. rtc->msr = msr;
  257. return 0;
  258. }
  259. /*
  260. * Set the minutes and seconds from seconds value 'nowtime'. Fail if
  261. * clock is out by > 30 minutes. Logic lifted from atari code.
  262. * Algorithm is to wait for the 10ms register to change, and then to
  263. * wait a short while, and then set it.
  264. */
  265. int bvme6000_set_clock_mmss (unsigned long nowtime)
  266. {
  267. int retval = 0;
  268. short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
  269. unsigned char rtc_minutes, rtc_tenms;
  270. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  271. unsigned char msr = rtc->msr & 0xc0;
  272. unsigned long flags;
  273. volatile int i;
  274. rtc->msr = 0; /* Ensure clock accessible */
  275. rtc_minutes = bcd2bin (rtc->bcd_min);
  276. if ((rtc_minutes < real_minutes
  277. ? real_minutes - rtc_minutes
  278. : rtc_minutes - real_minutes) < 30)
  279. {
  280. local_irq_save(flags);
  281. rtc_tenms = rtc->bcd_tenms;
  282. while (rtc_tenms == rtc->bcd_tenms)
  283. ;
  284. for (i = 0; i < 1000; i++)
  285. ;
  286. rtc->bcd_min = bin2bcd(real_minutes);
  287. rtc->bcd_sec = bin2bcd(real_seconds);
  288. local_irq_restore(flags);
  289. }
  290. else
  291. retval = -1;
  292. rtc->msr = msr;
  293. return retval;
  294. }