clk.c 2.7 KB

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  1. /***************************************************************************/
  2. /*
  3. * clk.c -- general ColdFire CPU kernel clk handling
  4. *
  5. * Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com)
  6. */
  7. /***************************************************************************/
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mutex.h>
  12. #include <linux/clk.h>
  13. #include <linux/io.h>
  14. #include <linux/err.h>
  15. #include <asm/coldfire.h>
  16. #include <asm/mcfsim.h>
  17. #include <asm/mcfclk.h>
  18. static DEFINE_SPINLOCK(clk_lock);
  19. #ifdef MCFPM_PPMCR0
  20. /*
  21. * For more advanced ColdFire parts that have clocks that can be enabled
  22. * we supply enable/disable functions. These must properly define their
  23. * clocks in their platform specific code.
  24. */
  25. void __clk_init_enabled(struct clk *clk)
  26. {
  27. clk->enabled = 1;
  28. clk->clk_ops->enable(clk);
  29. }
  30. void __clk_init_disabled(struct clk *clk)
  31. {
  32. clk->enabled = 0;
  33. clk->clk_ops->disable(clk);
  34. }
  35. static void __clk_enable0(struct clk *clk)
  36. {
  37. __raw_writeb(clk->slot, MCFPM_PPMCR0);
  38. }
  39. static void __clk_disable0(struct clk *clk)
  40. {
  41. __raw_writeb(clk->slot, MCFPM_PPMSR0);
  42. }
  43. struct clk_ops clk_ops0 = {
  44. .enable = __clk_enable0,
  45. .disable = __clk_disable0,
  46. };
  47. #ifdef MCFPM_PPMCR1
  48. static void __clk_enable1(struct clk *clk)
  49. {
  50. __raw_writeb(clk->slot, MCFPM_PPMCR1);
  51. }
  52. static void __clk_disable1(struct clk *clk)
  53. {
  54. __raw_writeb(clk->slot, MCFPM_PPMSR1);
  55. }
  56. struct clk_ops clk_ops1 = {
  57. .enable = __clk_enable1,
  58. .disable = __clk_disable1,
  59. };
  60. #endif /* MCFPM_PPMCR1 */
  61. #endif /* MCFPM_PPMCR0 */
  62. struct clk *clk_get(struct device *dev, const char *id)
  63. {
  64. const char *clk_name = dev ? dev_name(dev) : id ? id : NULL;
  65. struct clk *clk;
  66. unsigned i;
  67. for (i = 0; (clk = mcf_clks[i]) != NULL; ++i)
  68. if (!strcmp(clk->name, clk_name))
  69. return clk;
  70. pr_warn("clk_get: didn't find clock %s\n", clk_name);
  71. return ERR_PTR(-ENOENT);
  72. }
  73. EXPORT_SYMBOL(clk_get);
  74. int clk_enable(struct clk *clk)
  75. {
  76. unsigned long flags;
  77. spin_lock_irqsave(&clk_lock, flags);
  78. if ((clk->enabled++ == 0) && clk->clk_ops)
  79. clk->clk_ops->enable(clk);
  80. spin_unlock_irqrestore(&clk_lock, flags);
  81. return 0;
  82. }
  83. EXPORT_SYMBOL(clk_enable);
  84. void clk_disable(struct clk *clk)
  85. {
  86. unsigned long flags;
  87. spin_lock_irqsave(&clk_lock, flags);
  88. if ((--clk->enabled == 0) && clk->clk_ops)
  89. clk->clk_ops->disable(clk);
  90. spin_unlock_irqrestore(&clk_lock, flags);
  91. }
  92. EXPORT_SYMBOL(clk_disable);
  93. void clk_put(struct clk *clk)
  94. {
  95. if (clk->enabled != 0)
  96. pr_warn("clk_put %s still enabled\n", clk->name);
  97. }
  98. EXPORT_SYMBOL(clk_put);
  99. unsigned long clk_get_rate(struct clk *clk)
  100. {
  101. return clk->rate;
  102. }
  103. EXPORT_SYMBOL(clk_get_rate);
  104. /***************************************************************************/