m5249.c 2.9 KB

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  1. /***************************************************************************/
  2. /*
  3. * m5249.c -- platform support for ColdFire 5249 based boards
  4. *
  5. * Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
  6. */
  7. /***************************************************************************/
  8. #include <linux/kernel.h>
  9. #include <linux/param.h>
  10. #include <linux/init.h>
  11. #include <linux/io.h>
  12. #include <linux/platform_device.h>
  13. #include <asm/machdep.h>
  14. #include <asm/coldfire.h>
  15. #include <asm/mcfsim.h>
  16. #include <asm/mcfclk.h>
  17. /***************************************************************************/
  18. DEFINE_CLK(pll, "pll.0", MCF_CLK);
  19. DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
  20. DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK);
  21. DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK);
  22. DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
  23. DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
  24. DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK);
  25. struct clk *mcf_clks[] = {
  26. &clk_pll,
  27. &clk_sys,
  28. &clk_mcftmr0,
  29. &clk_mcftmr1,
  30. &clk_mcfuart0,
  31. &clk_mcfuart1,
  32. &clk_mcfqspi0,
  33. NULL
  34. };
  35. /***************************************************************************/
  36. #ifdef CONFIG_M5249C3
  37. static struct resource m5249_smc91x_resources[] = {
  38. {
  39. .start = 0xe0000300,
  40. .end = 0xe0000300 + 0x100,
  41. .flags = IORESOURCE_MEM,
  42. },
  43. {
  44. .start = MCF_IRQ_GPIO6,
  45. .end = MCF_IRQ_GPIO6,
  46. .flags = IORESOURCE_IRQ,
  47. },
  48. };
  49. static struct platform_device m5249_smc91x = {
  50. .name = "smc91x",
  51. .id = 0,
  52. .num_resources = ARRAY_SIZE(m5249_smc91x_resources),
  53. .resource = m5249_smc91x_resources,
  54. };
  55. #endif /* CONFIG_M5249C3 */
  56. static struct platform_device *m5249_devices[] __initdata = {
  57. #ifdef CONFIG_M5249C3
  58. &m5249_smc91x,
  59. #endif
  60. };
  61. /***************************************************************************/
  62. static void __init m5249_qspi_init(void)
  63. {
  64. #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
  65. /* QSPI irq setup */
  66. writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0,
  67. MCFSIM_QSPIICR);
  68. mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
  69. #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
  70. }
  71. /***************************************************************************/
  72. #ifdef CONFIG_M5249C3
  73. static void __init m5249_smc91x_init(void)
  74. {
  75. u32 gpio;
  76. /* Set the GPIO line as interrupt source for smc91x device */
  77. gpio = readl(MCFSIM2_GPIOINTENABLE);
  78. writel(gpio | 0x40, MCFSIM2_GPIOINTENABLE);
  79. gpio = readl(MCFINTC2_INTPRI5);
  80. writel(gpio | 0x04000000, MCFINTC2_INTPRI5);
  81. }
  82. #endif /* CONFIG_M5249C3 */
  83. /***************************************************************************/
  84. void __init config_BSP(char *commandp, int size)
  85. {
  86. mach_sched_init = hw_timer_init;
  87. #ifdef CONFIG_M5249C3
  88. m5249_smc91x_init();
  89. #endif
  90. m5249_qspi_init();
  91. }
  92. /***************************************************************************/
  93. static int __init init_BSP(void)
  94. {
  95. platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
  96. return 0;
  97. }
  98. arch_initcall(init_BSP);
  99. /***************************************************************************/