m5307.c 2.1 KB

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  1. /***************************************************************************/
  2. /*
  3. * m5307.c -- platform support for ColdFire 5307 based boards
  4. *
  5. * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
  6. * Copyright (C) 2000, Lineo (www.lineo.com)
  7. */
  8. /***************************************************************************/
  9. #include <linux/kernel.h>
  10. #include <linux/param.h>
  11. #include <linux/init.h>
  12. #include <linux/io.h>
  13. #include <asm/machdep.h>
  14. #include <asm/coldfire.h>
  15. #include <asm/mcfsim.h>
  16. #include <asm/mcfwdebug.h>
  17. #include <asm/mcfclk.h>
  18. /***************************************************************************/
  19. /*
  20. * Some platforms need software versions of the GPIO data registers.
  21. */
  22. unsigned short ppdata;
  23. unsigned char ledbank = 0xff;
  24. /***************************************************************************/
  25. DEFINE_CLK(pll, "pll.0", MCF_CLK);
  26. DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
  27. DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK);
  28. DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK);
  29. DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
  30. DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
  31. struct clk *mcf_clks[] = {
  32. &clk_pll,
  33. &clk_sys,
  34. &clk_mcftmr0,
  35. &clk_mcftmr1,
  36. &clk_mcfuart0,
  37. &clk_mcfuart1,
  38. NULL
  39. };
  40. /***************************************************************************/
  41. void __init config_BSP(char *commandp, int size)
  42. {
  43. #if defined(CONFIG_NETtel) || \
  44. defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA)
  45. /* Copy command line from FLASH to local buffer... */
  46. memcpy(commandp, (char *) 0xf0004000, size);
  47. commandp[size-1] = 0;
  48. #endif
  49. mach_sched_init = hw_timer_init;
  50. /* Only support the external interrupts on their primary level */
  51. mcf_mapirq2imr(25, MCFINTC_EINT1);
  52. mcf_mapirq2imr(27, MCFINTC_EINT3);
  53. mcf_mapirq2imr(29, MCFINTC_EINT5);
  54. mcf_mapirq2imr(31, MCFINTC_EINT7);
  55. #ifdef CONFIG_BDM_DISABLE
  56. /*
  57. * Disable the BDM clocking. This also turns off most of the rest of
  58. * the BDM device. This is good for EMC reasons. This option is not
  59. * incompatible with the memory protection option.
  60. */
  61. wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
  62. #endif
  63. }
  64. /***************************************************************************/