timers.c 5.3 KB

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  1. /***************************************************************************/
  2. /*
  3. * timers.c -- generic ColdFire hardware timer support.
  4. *
  5. * Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
  6. */
  7. /***************************************************************************/
  8. #include <linux/kernel.h>
  9. #include <linux/init.h>
  10. #include <linux/sched.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/irq.h>
  13. #include <linux/profile.h>
  14. #include <linux/clocksource.h>
  15. #include <asm/io.h>
  16. #include <asm/traps.h>
  17. #include <asm/machdep.h>
  18. #include <asm/coldfire.h>
  19. #include <asm/mcftimer.h>
  20. #include <asm/mcfsim.h>
  21. /***************************************************************************/
  22. /*
  23. * By default use timer1 as the system clock timer.
  24. */
  25. #define FREQ (MCF_BUSCLK / 16)
  26. #define TA(a) (MCFTIMER_BASE1 + (a))
  27. /*
  28. * These provide the underlying interrupt vector support.
  29. * Unfortunately it is a little different on each ColdFire.
  30. */
  31. void coldfire_profile_init(void);
  32. #if defined(CONFIG_M53xx) || defined(CONFIG_M5441x)
  33. #define __raw_readtrr __raw_readl
  34. #define __raw_writetrr __raw_writel
  35. #else
  36. #define __raw_readtrr __raw_readw
  37. #define __raw_writetrr __raw_writew
  38. #endif
  39. static u32 mcftmr_cycles_per_jiffy;
  40. static u32 mcftmr_cnt;
  41. static irq_handler_t timer_interrupt;
  42. /***************************************************************************/
  43. static void init_timer_irq(void)
  44. {
  45. #ifdef MCFSIM_ICR_AUTOVEC
  46. /* Timer1 is always used as system timer */
  47. writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
  48. MCFSIM_TIMER1ICR);
  49. mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
  50. #ifdef CONFIG_HIGHPROFILE
  51. /* Timer2 is to be used as a high speed profile timer */
  52. writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
  53. MCFSIM_TIMER2ICR);
  54. mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
  55. #endif
  56. #endif /* MCFSIM_ICR_AUTOVEC */
  57. }
  58. /***************************************************************************/
  59. static irqreturn_t mcftmr_tick(int irq, void *dummy)
  60. {
  61. /* Reset the ColdFire timer */
  62. __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
  63. mcftmr_cnt += mcftmr_cycles_per_jiffy;
  64. return timer_interrupt(irq, dummy);
  65. }
  66. /***************************************************************************/
  67. static struct irqaction mcftmr_timer_irq = {
  68. .name = "timer",
  69. .flags = IRQF_TIMER,
  70. .handler = mcftmr_tick,
  71. };
  72. /***************************************************************************/
  73. static cycle_t mcftmr_read_clk(struct clocksource *cs)
  74. {
  75. unsigned long flags;
  76. u32 cycles;
  77. u16 tcn;
  78. local_irq_save(flags);
  79. tcn = __raw_readw(TA(MCFTIMER_TCN));
  80. cycles = mcftmr_cnt;
  81. local_irq_restore(flags);
  82. return cycles + tcn;
  83. }
  84. /***************************************************************************/
  85. static struct clocksource mcftmr_clk = {
  86. .name = "tmr",
  87. .rating = 250,
  88. .read = mcftmr_read_clk,
  89. .mask = CLOCKSOURCE_MASK(32),
  90. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  91. };
  92. /***************************************************************************/
  93. void hw_timer_init(irq_handler_t handler)
  94. {
  95. __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
  96. mcftmr_cycles_per_jiffy = FREQ / HZ;
  97. /*
  98. * The coldfire timer runs from 0 to TRR included, then 0
  99. * again and so on. It counts thus actually TRR + 1 steps
  100. * for 1 tick, not TRR. So if you want n cycles,
  101. * initialize TRR with n - 1.
  102. */
  103. __raw_writetrr(mcftmr_cycles_per_jiffy - 1, TA(MCFTIMER_TRR));
  104. __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
  105. MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
  106. clocksource_register_hz(&mcftmr_clk, FREQ);
  107. timer_interrupt = handler;
  108. init_timer_irq();
  109. setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq);
  110. #ifdef CONFIG_HIGHPROFILE
  111. coldfire_profile_init();
  112. #endif
  113. }
  114. /***************************************************************************/
  115. #ifdef CONFIG_HIGHPROFILE
  116. /***************************************************************************/
  117. /*
  118. * By default use timer2 as the profiler clock timer.
  119. */
  120. #define PA(a) (MCFTIMER_BASE2 + (a))
  121. /*
  122. * Choose a reasonably fast profile timer. Make it an odd value to
  123. * try and get good coverage of kernel operations.
  124. */
  125. #define PROFILEHZ 1013
  126. /*
  127. * Use the other timer to provide high accuracy profiling info.
  128. */
  129. irqreturn_t coldfire_profile_tick(int irq, void *dummy)
  130. {
  131. /* Reset ColdFire timer2 */
  132. __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, PA(MCFTIMER_TER));
  133. if (current->pid)
  134. profile_tick(CPU_PROFILING);
  135. return IRQ_HANDLED;
  136. }
  137. /***************************************************************************/
  138. static struct irqaction coldfire_profile_irq = {
  139. .name = "profile timer",
  140. .flags = IRQF_TIMER,
  141. .handler = coldfire_profile_tick,
  142. };
  143. void coldfire_profile_init(void)
  144. {
  145. printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n",
  146. PROFILEHZ);
  147. /* Set up TIMER 2 as high speed profile clock */
  148. __raw_writew(MCFTIMER_TMR_DISABLE, PA(MCFTIMER_TMR));
  149. __raw_writetrr(((MCF_BUSCLK / 16) / PROFILEHZ), PA(MCFTIMER_TRR));
  150. __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
  151. MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, PA(MCFTIMER_TMR));
  152. setup_irq(MCF_IRQ_PROFILER, &coldfire_profile_irq);
  153. }
  154. /***************************************************************************/
  155. #endif /* CONFIG_HIGHPROFILE */
  156. /***************************************************************************/