modsi3.S 1.7 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273
  1. #include <linux/linkage.h>
  2. /*
  3. * modulo operation for 32 bit integers.
  4. * Input : op1 in Reg r5
  5. * op2 in Reg r6
  6. * Output: op1 mod op2 in Reg r3
  7. */
  8. .text
  9. .globl __modsi3
  10. .type __modsi3, @function
  11. .ent __modsi3
  12. __modsi3:
  13. .frame r1, 0, r15
  14. addik r1, r1, -16
  15. swi r28, r1, 0
  16. swi r29, r1, 4
  17. swi r30, r1, 8
  18. swi r31, r1, 12
  19. beqi r6, div_by_zero /* div_by_zero division error */
  20. beqi r5, result_is_zero /* result is zero */
  21. bgeid r5, r5_pos
  22. /* get the sign of the result [ depends only on the first arg] */
  23. add r28, r5, r0
  24. rsubi r5, r5, 0 /* make r5 positive */
  25. r5_pos:
  26. bgei r6, r6_pos
  27. rsubi r6, r6, 0 /* make r6 positive */
  28. r6_pos:
  29. addik r3, r0, 0 /* clear mod */
  30. addik r30, r0, 0 /* clear div */
  31. addik r29, r0, 32 /* initialize the loop count */
  32. /* first part try to find the first '1' in the r5 */
  33. div1:
  34. add r5, r5, r5 /* left shift logical r5 */
  35. bgeid r5, div1
  36. addik r29, r29, -1
  37. div2:
  38. /* left shift logical r5 get the '1' into the carry */
  39. add r5, r5, r5
  40. addc r3, r3, r3 /* move that bit into the mod register */
  41. rsub r31, r6, r3 /* try to subtract (r30 a r6) */
  42. blti r31, mod_too_small
  43. /* move the r31 to mod since the result was positive */
  44. or r3, r0, r31
  45. addik r30, r30, 1
  46. mod_too_small:
  47. addik r29, r29, -1
  48. beqi r29, loop_end
  49. add r30, r30, r30 /* shift in the '1' into div */
  50. bri div2 /* div2 */
  51. loop_end:
  52. bgei r28, return_here
  53. brid return_here
  54. rsubi r3, r3, 0 /* negate the result */
  55. div_by_zero:
  56. result_is_zero:
  57. or r3, r0, r0 /* set result to 0 [both mod as well as div are 0] */
  58. return_here:
  59. /* restore values of csrs and that of r3 and the divisor and the dividend */
  60. lwi r28, r1, 0
  61. lwi r29, r1, 4
  62. lwi r30, r1, 8
  63. lwi r31, r1, 12
  64. rtsd r15, 8
  65. addik r1, r1, 16
  66. .size __modsi3, . - __modsi3
  67. .end __modsi3