cex-oct.S 1.5 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2006 Cavium Networks
  7. * Cache error handler
  8. */
  9. #include <asm/asm.h>
  10. #include <asm/regdef.h>
  11. #include <asm/mipsregs.h>
  12. #include <asm/stackframe.h>
  13. /*
  14. * Handle cache error. Indicate to the second level handler whether
  15. * the exception is recoverable.
  16. */
  17. LEAF(except_vec2_octeon)
  18. .set push
  19. .set mips64r2
  20. .set noreorder
  21. .set noat
  22. /* due to an errata we need to read the COP0 CacheErr (Dcache)
  23. * before any cache/DRAM access */
  24. rdhwr k0, $0 /* get core_id */
  25. PTR_LA k1, cache_err_dcache
  26. sll k0, k0, 3
  27. PTR_ADDU k1, k0, k1 /* k1 = &cache_err_dcache[core_id] */
  28. dmfc0 k0, CP0_CACHEERR, 1
  29. sd k0, (k1)
  30. dmtc0 $0, CP0_CACHEERR, 1
  31. /* check whether this is a nested exception */
  32. mfc0 k1, CP0_STATUS
  33. andi k1, k1, ST0_EXL
  34. beqz k1, 1f
  35. nop
  36. j cache_parity_error_octeon_non_recoverable
  37. nop
  38. /* exception is recoverable */
  39. 1: j handle_cache_err
  40. nop
  41. .set pop
  42. END(except_vec2_octeon)
  43. /* We need to jump to handle_cache_err so that the previous handler
  44. * can fit within 0x80 bytes. We also move from 0xFFFFFFFFAXXXXXXX
  45. * space (uncached) to the 0xFFFFFFFF8XXXXXXX space (cached). */
  46. LEAF(handle_cache_err)
  47. .set push
  48. .set noreorder
  49. .set noat
  50. SAVE_ALL
  51. KMODE
  52. jal cache_parity_error_octeon_recoverable
  53. nop
  54. j ret_from_exception
  55. nop
  56. .set pop
  57. END(handle_cache_err)