setup.c 1.9 KB

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  1. /*
  2. * setup.c: Setup PNX833X Soc.
  3. *
  4. * Copyright 2008 NXP Semiconductors
  5. * Chris Steel <chris.steel@nxp.com>
  6. * Daniel Laird <daniel.j.laird@nxp.com>
  7. *
  8. * Based on software written by:
  9. * Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24. */
  25. #include <linux/init.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/ioport.h>
  28. #include <linux/io.h>
  29. #include <linux/pci.h>
  30. #include <asm/reboot.h>
  31. #include <pnx833x.h>
  32. #include <gpio.h>
  33. extern void pnx833x_board_setup(void);
  34. extern void pnx833x_machine_restart(char *);
  35. extern void pnx833x_machine_halt(void);
  36. extern void pnx833x_machine_power_off(void);
  37. int __init plat_mem_setup(void)
  38. {
  39. /* fake pci bus to avoid bounce buffers */
  40. PCI_DMA_BUS_IS_PHYS = 1;
  41. /* set mips clock to 320MHz */
  42. #if defined(CONFIG_SOC_PNX8335)
  43. PNX8335_WRITEFIELD(0x17, CLOCK_PLL_CPU_CTL, FREQ);
  44. #endif
  45. pnx833x_gpio_init(); /* so it will be ready in board_setup() */
  46. pnx833x_board_setup();
  47. _machine_restart = pnx833x_machine_restart;
  48. _machine_halt = pnx833x_machine_halt;
  49. pm_power_off = pnx833x_machine_power_off;
  50. /* IO/MEM resources. */
  51. set_io_port_base(KSEG1);
  52. ioport_resource.start = 0;
  53. ioport_resource.end = ~0;
  54. iomem_resource.start = 0;
  55. iomem_resource.end = ~0;
  56. return 0;
  57. }