cache.h 2.1 KB

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  1. /* MN10300 cache management registers
  2. *
  3. * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
  4. * Written by David Howells (dhowells@redhat.com)
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public Licence
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the Licence, or (at your option) any later version.
  10. */
  11. #ifndef _ASM_CACHE_H
  12. #define _ASM_CACHE_H
  13. #include <asm/cpu-regs.h>
  14. #include <proc/cache.h>
  15. #ifndef __ASSEMBLY__
  16. #define L1_CACHE_DISPARITY (L1_CACHE_NENTRIES * L1_CACHE_BYTES)
  17. #else
  18. #define L1_CACHE_DISPARITY L1_CACHE_NENTRIES * L1_CACHE_BYTES
  19. #endif
  20. #define ARCH_DMA_MINALIGN L1_CACHE_BYTES
  21. /* data cache purge registers
  22. * - read from the register to unconditionally purge that cache line
  23. * - write address & 0xffffff00 to conditionally purge that cache line
  24. * - clear LSB to request invalidation as well
  25. */
  26. #define DCACHE_PURGE(WAY, ENTRY) \
  27. __SYSREG(0xc8400000 + (WAY) * L1_CACHE_WAYDISP + \
  28. (ENTRY) * L1_CACHE_BYTES, u32)
  29. #define DCACHE_PURGE_WAY0(ENTRY) \
  30. __SYSREG(0xc8400000 + 0 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
  31. #define DCACHE_PURGE_WAY1(ENTRY) \
  32. __SYSREG(0xc8400000 + 1 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
  33. #define DCACHE_PURGE_WAY2(ENTRY) \
  34. __SYSREG(0xc8400000 + 2 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
  35. #define DCACHE_PURGE_WAY3(ENTRY) \
  36. __SYSREG(0xc8400000 + 3 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
  37. /* instruction cache access registers */
  38. #define ICACHE_DATA(WAY, ENTRY, OFF) \
  39. __SYSREG(0xc8000000 + (WAY) * L1_CACHE_WAYDISP + \
  40. (ENTRY) * L1_CACHE_BYTES + (OFF) * 4, u32)
  41. #define ICACHE_TAG(WAY, ENTRY) \
  42. __SYSREG(0xc8100000 + (WAY) * L1_CACHE_WAYDISP + \
  43. (ENTRY) * L1_CACHE_BYTES, u32)
  44. /* data cache access registers */
  45. #define DCACHE_DATA(WAY, ENTRY, OFF) \
  46. __SYSREG(0xc8200000 + (WAY) * L1_CACHE_WAYDISP + \
  47. (ENTRY) * L1_CACHE_BYTES + (OFF) * 4, u32)
  48. #define DCACHE_TAG(WAY, ENTRY) \
  49. __SYSREG(0xc8300000 + (WAY) * L1_CACHE_WAYDISP + \
  50. (ENTRY) * L1_CACHE_BYTES, u32)
  51. #endif /* _ASM_CACHE_H */