redwood.dts 11 KB

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  1. /*
  2. * Device Tree Source for AMCC Redwood(460SX)
  3. *
  4. * Copyright 2008 AMCC <tmarri@amcc.com>
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without
  8. * any warranty of any kind, whether express or implied.
  9. */
  10. /dts-v1/;
  11. / {
  12. #address-cells = <2>;
  13. #size-cells = <1>;
  14. model = "amcc,redwood";
  15. compatible = "amcc,redwood";
  16. dcr-parent = <&{/cpus/cpu@0}>;
  17. aliases {
  18. ethernet0 = &EMAC0;
  19. serial0 = &UART0;
  20. };
  21. cpus {
  22. #address-cells = <1>;
  23. #size-cells = <0>;
  24. cpu@0 {
  25. device_type = "cpu";
  26. model = "PowerPC,460SX";
  27. reg = <0x00000000>;
  28. clock-frequency = <0>; /* Filled in by U-Boot */
  29. timebase-frequency = <0>; /* Filled in by U-Boot */
  30. i-cache-line-size = <32>;
  31. d-cache-line-size = <32>;
  32. i-cache-size = <32768>;
  33. d-cache-size = <32768>;
  34. dcr-controller;
  35. dcr-access-method = "native";
  36. };
  37. };
  38. memory {
  39. device_type = "memory";
  40. reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
  41. };
  42. UIC0: interrupt-controller0 {
  43. compatible = "ibm,uic-460sx","ibm,uic";
  44. interrupt-controller;
  45. cell-index = <0>;
  46. dcr-reg = <0x0c0 0x009>;
  47. #address-cells = <0>;
  48. #size-cells = <0>;
  49. #interrupt-cells = <2>;
  50. };
  51. UIC1: interrupt-controller1 {
  52. compatible = "ibm,uic-460sx","ibm,uic";
  53. interrupt-controller;
  54. cell-index = <1>;
  55. dcr-reg = <0x0d0 0x009>;
  56. #address-cells = <0>;
  57. #size-cells = <0>;
  58. #interrupt-cells = <2>;
  59. interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
  60. interrupt-parent = <&UIC0>;
  61. };
  62. UIC2: interrupt-controller2 {
  63. compatible = "ibm,uic-460sx","ibm,uic";
  64. interrupt-controller;
  65. cell-index = <2>;
  66. dcr-reg = <0x0e0 0x009>;
  67. #address-cells = <0>;
  68. #size-cells = <0>;
  69. #interrupt-cells = <2>;
  70. interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
  71. interrupt-parent = <&UIC0>;
  72. };
  73. UIC3: interrupt-controller3 {
  74. compatible = "ibm,uic-460sx","ibm,uic";
  75. interrupt-controller;
  76. cell-index = <3>;
  77. dcr-reg = <0x0f0 0x009>;
  78. #address-cells = <0>;
  79. #size-cells = <0>;
  80. #interrupt-cells = <2>;
  81. interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
  82. interrupt-parent = <&UIC0>;
  83. };
  84. SDR0: sdr {
  85. compatible = "ibm,sdr-460sx";
  86. dcr-reg = <0x00e 0x002>;
  87. };
  88. CPR0: cpr {
  89. compatible = "ibm,cpr-460sx";
  90. dcr-reg = <0x00c 0x002>;
  91. };
  92. plb {
  93. compatible = "ibm,plb-460sx", "ibm,plb4";
  94. #address-cells = <2>;
  95. #size-cells = <1>;
  96. ranges;
  97. clock-frequency = <0>; /* Filled in by U-Boot */
  98. SDRAM0: sdram {
  99. compatible = "ibm,sdram-460sx", "ibm,sdram-405gp";
  100. dcr-reg = <0x010 0x002>;
  101. };
  102. MAL0: mcmal {
  103. compatible = "ibm,mcmal-460sx", "ibm,mcmal2";
  104. dcr-reg = <0x180 0x62>;
  105. num-tx-chans = <4>;
  106. num-rx-chans = <32>;
  107. #address-cells = <1>;
  108. #size-cells = <1>;
  109. interrupt-parent = <&UIC1>;
  110. interrupts = < /*TXEOB*/ 0x6 0x4
  111. /*RXEOB*/ 0x7 0x4
  112. /*SERR*/ 0x1 0x4
  113. /*TXDE*/ 0x2 0x4
  114. /*RXDE*/ 0x3 0x4
  115. /*COAL TX0*/ 0x18 0x2
  116. /*COAL TX1*/ 0x19 0x2
  117. /*COAL TX2*/ 0x1a 0x2
  118. /*COAL TX3*/ 0x1b 0x2
  119. /*COAL RX0*/ 0x1c 0x2
  120. /*COAL RX1*/ 0x1d 0x2
  121. /*COAL RX2*/ 0x1e 0x2
  122. /*COAL RX3*/ 0x1f 0x2>;
  123. };
  124. POB0: opb {
  125. compatible = "ibm,opb-460sx", "ibm,opb";
  126. #address-cells = <1>;
  127. #size-cells = <1>;
  128. ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
  129. clock-frequency = <0>; /* Filled in by U-Boot */
  130. EBC0: ebc {
  131. compatible = "ibm,ebc-460sx", "ibm,ebc";
  132. dcr-reg = <0x012 0x002>;
  133. #address-cells = <2>;
  134. #size-cells = <1>;
  135. clock-frequency = <0>; /* Filled in by U-Boot */
  136. /* ranges property is supplied by U-Boot */
  137. interrupts = <0x6 0x4>;
  138. interrupt-parent = <&UIC1>;
  139. nor_flash@0,0 {
  140. compatible = "amd,s29gl512n", "cfi-flash";
  141. bank-width = <2>;
  142. reg = <0x0000000 0x00000000 0x04000000>;
  143. #address-cells = <1>;
  144. #size-cells = <1>;
  145. partition@0 {
  146. label = "kernel";
  147. reg = <0x00000000 0x001e0000>;
  148. };
  149. partition@1e0000 {
  150. label = "dtb";
  151. reg = <0x001e0000 0x00020000>;
  152. };
  153. partition@200000 {
  154. label = "ramdisk";
  155. reg = <0x00200000 0x01400000>;
  156. };
  157. partition@1600000 {
  158. label = "jffs2";
  159. reg = <0x01600000 0x00400000>;
  160. };
  161. partition@1a00000 {
  162. label = "user";
  163. reg = <0x01a00000 0x02560000>;
  164. };
  165. partition@3f60000 {
  166. label = "env";
  167. reg = <0x03f60000 0x00040000>;
  168. };
  169. partition@3fa0000 {
  170. label = "u-boot";
  171. reg = <0x03fa0000 0x00060000>;
  172. };
  173. };
  174. };
  175. UART0: serial@ef600200 {
  176. device_type = "serial";
  177. compatible = "ns16550";
  178. reg = <0xef600200 0x00000008>;
  179. virtual-reg = <0xef600200>;
  180. clock-frequency = <0>; /* Filled in by U-Boot */
  181. current-speed = <0>; /* Filled in by U-Boot */
  182. interrupt-parent = <&UIC0>;
  183. interrupts = <0x0 0x4>;
  184. };
  185. RGMII0: emac-rgmii@ef600900 {
  186. compatible = "ibm,rgmii-460sx", "ibm,rgmii";
  187. reg = <0xef600900 0x00000008>;
  188. };
  189. EMAC0: ethernet@ef600a00 {
  190. device_type = "network";
  191. compatible = "ibm,emac-460sx", "ibm,emac4";
  192. interrupt-parent = <&EMAC0>;
  193. interrupts = <0x0 0x1>;
  194. #interrupt-cells = <1>;
  195. #address-cells = <0>;
  196. #size-cells = <0>;
  197. interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4
  198. /*Wake*/ 0x1 &UIC2 0x1d 0x4>;
  199. reg = <0xef600a00 0x00000070>;
  200. local-mac-address = [000000000000]; /* Filled in by U-Boot */
  201. mal-device = <&MAL0>;
  202. mal-tx-channel = <0>;
  203. mal-rx-channel = <0>;
  204. cell-index = <0>;
  205. max-frame-size = <9000>;
  206. rx-fifo-size = <4096>;
  207. tx-fifo-size = <2048>;
  208. rx-fifo-size-gige = <16384>;
  209. phy-mode = "rgmii";
  210. phy-map = <0x00000000>;
  211. rgmii-device = <&RGMII0>;
  212. rgmii-channel = <0>;
  213. has-inverted-stacr-oc;
  214. has-new-stacr-staopc;
  215. };
  216. };
  217. PCIE0: pciex@d00000000 {
  218. device_type = "pci";
  219. #interrupt-cells = <1>;
  220. #size-cells = <2>;
  221. #address-cells = <3>;
  222. compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex";
  223. primary;
  224. port = <0x0>; /* port number */
  225. reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
  226. 0x0000000c 0x10000000 0x00001000>; /* Registers */
  227. dcr-reg = <0x100 0x020>;
  228. sdr-base = <0x300>;
  229. /* Outbound ranges, one memory and one IO,
  230. * later cannot be changed
  231. */
  232. ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
  233. 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
  234. /* Inbound 2GB range starting at 0 */
  235. dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
  236. /* This drives busses 10 to 0x1f */
  237. bus-range = <0x10 0x1f>;
  238. /* Legacy interrupts (note the weird polarity, the bridge seems
  239. * to invert PCIe legacy interrupts).
  240. * We are de-swizzling here because the numbers are actually for
  241. * port of the root complex virtual P2P bridge. But I want
  242. * to avoid putting a node for it in the tree, so the numbers
  243. * below are basically de-swizzled numbers.
  244. * The real slot is on idsel 0, so the swizzling is 1:1
  245. */
  246. interrupt-map-mask = <0x0 0x0 0x0 0x7>;
  247. interrupt-map = <
  248. 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */
  249. 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */
  250. 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */
  251. 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>;
  252. };
  253. PCIE1: pciex@d20000000 {
  254. device_type = "pci";
  255. #interrupt-cells = <1>;
  256. #size-cells = <2>;
  257. #address-cells = <3>;
  258. compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex";
  259. primary;
  260. port = <0x1>; /* port number */
  261. reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
  262. 0x0000000c 0x10001000 0x00001000>; /* Registers */
  263. dcr-reg = <0x120 0x020>;
  264. sdr-base = <0x340>;
  265. /* Outbound ranges, one memory and one IO,
  266. * later cannot be changed
  267. */
  268. ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
  269. 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
  270. /* Inbound 2GB range starting at 0 */
  271. dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
  272. /* This drives busses 10 to 0x1f */
  273. bus-range = <0x20 0x2f>;
  274. /* Legacy interrupts (note the weird polarity, the bridge seems
  275. * to invert PCIe legacy interrupts).
  276. * We are de-swizzling here because the numbers are actually for
  277. * port of the root complex virtual P2P bridge. But I want
  278. * to avoid putting a node for it in the tree, so the numbers
  279. * below are basically de-swizzled numbers.
  280. * The real slot is on idsel 0, so the swizzling is 1:1
  281. */
  282. interrupt-map-mask = <0x0 0x0 0x0 0x7>;
  283. interrupt-map = <
  284. 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */
  285. 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */
  286. 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */
  287. 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>;
  288. };
  289. PCIE2: pciex@d40000000 {
  290. device_type = "pci";
  291. #interrupt-cells = <1>;
  292. #size-cells = <2>;
  293. #address-cells = <3>;
  294. compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex";
  295. primary;
  296. port = <0x2>; /* port number */
  297. reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */
  298. 0x0000000c 0x10002000 0x00001000>; /* Registers */
  299. dcr-reg = <0x140 0x020>;
  300. sdr-base = <0x370>;
  301. /* Outbound ranges, one memory and one IO,
  302. * later cannot be changed
  303. */
  304. ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000
  305. 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>;
  306. /* Inbound 2GB range starting at 0 */
  307. dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
  308. /* This drives busses 10 to 0x1f */
  309. bus-range = <0x30 0x3f>;
  310. /* Legacy interrupts (note the weird polarity, the bridge seems
  311. * to invert PCIe legacy interrupts).
  312. * We are de-swizzling here because the numbers are actually for
  313. * port of the root complex virtual P2P bridge. But I want
  314. * to avoid putting a node for it in the tree, so the numbers
  315. * below are basically de-swizzled numbers.
  316. * The real slot is on idsel 0, so the swizzling is 1:1
  317. */
  318. interrupt-map-mask = <0x0 0x0 0x0 0x7>;
  319. interrupt-map = <
  320. 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */
  321. 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */
  322. 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */
  323. 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>;
  324. };
  325. MSI: ppc4xx-msi@400300000 {
  326. compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
  327. reg = < 0x4 0x00300000 0x100
  328. 0x4 0x00300000 0x100>;
  329. sdr-base = <0x3B0>;
  330. msi-data = <0x00000000>;
  331. msi-mask = <0x44440000>;
  332. interrupt-count = <3>;
  333. interrupts =<0 1 2 3>;
  334. interrupt-parent = <&UIC0>;
  335. #interrupt-cells = <1>;
  336. #address-cells = <0>;
  337. #size-cells = <0>;
  338. interrupt-map = <0 &UIC0 0xC 1
  339. 1 &UIC0 0x0D 1
  340. 2 &UIC0 0x0E 1
  341. 3 &UIC0 0x0F 1>;
  342. };
  343. };
  344. chosen {
  345. linux,stdout-path = "/plb/opb/serial@ef600200";
  346. };
  347. };