sequoia.dts 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412
  1. /*
  2. * Device Tree Source for AMCC Sequoia
  3. *
  4. * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
  5. * Copyright (c) 2006, 2007 IBM Corp.
  6. *
  7. * FIXME: Draft only!
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without
  11. * any warranty of any kind, whether express or implied.
  12. *
  13. */
  14. /dts-v1/;
  15. / {
  16. #address-cells = <2>;
  17. #size-cells = <1>;
  18. model = "amcc,sequoia";
  19. compatible = "amcc,sequoia";
  20. dcr-parent = <&{/cpus/cpu@0}>;
  21. aliases {
  22. ethernet0 = &EMAC0;
  23. ethernet1 = &EMAC1;
  24. serial0 = &UART0;
  25. serial1 = &UART1;
  26. serial2 = &UART2;
  27. serial3 = &UART3;
  28. };
  29. cpus {
  30. #address-cells = <1>;
  31. #size-cells = <0>;
  32. cpu@0 {
  33. device_type = "cpu";
  34. model = "PowerPC,440EPx";
  35. reg = <0x00000000>;
  36. clock-frequency = <0>; /* Filled in by zImage */
  37. timebase-frequency = <0>; /* Filled in by zImage */
  38. i-cache-line-size = <32>;
  39. d-cache-line-size = <32>;
  40. i-cache-size = <32768>;
  41. d-cache-size = <32768>;
  42. dcr-controller;
  43. dcr-access-method = "native";
  44. };
  45. };
  46. memory {
  47. device_type = "memory";
  48. reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
  49. };
  50. UIC0: interrupt-controller0 {
  51. compatible = "ibm,uic-440epx","ibm,uic";
  52. interrupt-controller;
  53. cell-index = <0>;
  54. dcr-reg = <0x0c0 0x009>;
  55. #address-cells = <0>;
  56. #size-cells = <0>;
  57. #interrupt-cells = <2>;
  58. };
  59. UIC1: interrupt-controller1 {
  60. compatible = "ibm,uic-440epx","ibm,uic";
  61. interrupt-controller;
  62. cell-index = <1>;
  63. dcr-reg = <0x0d0 0x009>;
  64. #address-cells = <0>;
  65. #size-cells = <0>;
  66. #interrupt-cells = <2>;
  67. interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
  68. interrupt-parent = <&UIC0>;
  69. };
  70. UIC2: interrupt-controller2 {
  71. compatible = "ibm,uic-440epx","ibm,uic";
  72. interrupt-controller;
  73. cell-index = <2>;
  74. dcr-reg = <0x0e0 0x009>;
  75. #address-cells = <0>;
  76. #size-cells = <0>;
  77. #interrupt-cells = <2>;
  78. interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
  79. interrupt-parent = <&UIC0>;
  80. };
  81. SDR0: sdr {
  82. compatible = "ibm,sdr-440epx", "ibm,sdr-440ep";
  83. dcr-reg = <0x00e 0x002>;
  84. };
  85. CPR0: cpr {
  86. compatible = "ibm,cpr-440epx", "ibm,cpr-440ep";
  87. dcr-reg = <0x00c 0x002>;
  88. };
  89. plb {
  90. compatible = "ibm,plb-440epx", "ibm,plb4";
  91. #address-cells = <2>;
  92. #size-cells = <1>;
  93. ranges;
  94. clock-frequency = <0>; /* Filled in by zImage */
  95. SDRAM0: sdram {
  96. compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
  97. dcr-reg = <0x010 0x002>;
  98. };
  99. CRYPTO: crypto@e0100000 {
  100. compatible = "amcc,ppc440epx-crypto","amcc,ppc4xx-crypto";
  101. reg = <0 0xE0100000 0x80400>;
  102. interrupt-parent = <&UIC0>;
  103. interrupts = <0x17 0x4>;
  104. };
  105. rng@e0120000 {
  106. compatible = "amcc,ppc440epx-rng","amcc,ppc4xx-rng";
  107. reg = <0 0xE0120000 0x150>;
  108. };
  109. DMA0: dma {
  110. compatible = "ibm,dma-440epx", "ibm,dma-4xx";
  111. dcr-reg = <0x100 0x027>;
  112. };
  113. MAL0: mcmal {
  114. compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
  115. dcr-reg = <0x180 0x062>;
  116. num-tx-chans = <2>;
  117. num-rx-chans = <2>;
  118. interrupt-parent = <&MAL0>;
  119. interrupts = <0x0 0x1 0x2 0x3 0x4>;
  120. #interrupt-cells = <1>;
  121. #address-cells = <0>;
  122. #size-cells = <0>;
  123. interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
  124. /*RXEOB*/ 0x1 &UIC0 0xb 0x4
  125. /*SERR*/ 0x2 &UIC1 0x0 0x4
  126. /*TXDE*/ 0x3 &UIC1 0x1 0x4
  127. /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
  128. interrupt-map-mask = <0xffffffff>;
  129. };
  130. USB1: usb@e0000400 {
  131. compatible = "ibm,usb-ohci-440epx", "ohci-be";
  132. reg = <0x00000000 0xe0000400 0x00000060>;
  133. interrupt-parent = <&UIC0>;
  134. interrupts = <0x15 0x8>;
  135. };
  136. USB0: ehci@e0000300 {
  137. compatible = "ibm,usb-ehci-440epx", "usb-ehci";
  138. interrupt-parent = <&UIC0>;
  139. interrupts = <0x1a 0x4>;
  140. reg = <0x00000000 0xe0000300 0x00000090 0x00000000 0xe0000390 0x00000070>;
  141. big-endian;
  142. };
  143. POB0: opb {
  144. compatible = "ibm,opb-440epx", "ibm,opb";
  145. #address-cells = <1>;
  146. #size-cells = <1>;
  147. ranges = <0x00000000 0x00000001 0x00000000 0x80000000
  148. 0x80000000 0x00000001 0x80000000 0x80000000>;
  149. interrupt-parent = <&UIC1>;
  150. interrupts = <0x7 0x4>;
  151. clock-frequency = <0>; /* Filled in by zImage */
  152. EBC0: ebc {
  153. compatible = "ibm,ebc-440epx", "ibm,ebc";
  154. dcr-reg = <0x012 0x002>;
  155. #address-cells = <2>;
  156. #size-cells = <1>;
  157. clock-frequency = <0>; /* Filled in by zImage */
  158. interrupts = <0x5 0x1>;
  159. interrupt-parent = <&UIC1>;
  160. nor_flash@0,0 {
  161. compatible = "amd,s29gl256n", "cfi-flash";
  162. bank-width = <2>;
  163. reg = <0x00000000 0x00000000 0x04000000>;
  164. #address-cells = <1>;
  165. #size-cells = <1>;
  166. partition@0 {
  167. label = "Kernel";
  168. reg = <0x00000000 0x00180000>;
  169. };
  170. partition@180000 {
  171. label = "ramdisk";
  172. reg = <0x00180000 0x00200000>;
  173. };
  174. partition@380000 {
  175. label = "file system";
  176. reg = <0x00380000 0x03aa0000>;
  177. };
  178. partition@3e20000 {
  179. label = "kozio";
  180. reg = <0x03e20000 0x00140000>;
  181. };
  182. partition@3f60000 {
  183. label = "env";
  184. reg = <0x03f60000 0x00040000>;
  185. };
  186. partition@3fa0000 {
  187. label = "u-boot";
  188. reg = <0x03fa0000 0x00060000>;
  189. };
  190. };
  191. ndfc@3,0 {
  192. compatible = "ibm,ndfc";
  193. reg = <0x00000003 0x00000000 0x00002000>;
  194. ccr = <0x00001000>;
  195. bank-settings = <0x80002222>;
  196. #address-cells = <1>;
  197. #size-cells = <1>;
  198. nand {
  199. #address-cells = <1>;
  200. #size-cells = <1>;
  201. partition@0 {
  202. label = "u-boot";
  203. reg = <0x00000000 0x00084000>;
  204. };
  205. partition@84000 {
  206. label = "user";
  207. reg = <0x00000000 0x01f7c000>;
  208. };
  209. };
  210. };
  211. };
  212. UART0: serial@ef600300 {
  213. device_type = "serial";
  214. compatible = "ns16550";
  215. reg = <0xef600300 0x00000008>;
  216. virtual-reg = <0xef600300>;
  217. clock-frequency = <0>; /* Filled in by zImage */
  218. current-speed = <115200>;
  219. interrupt-parent = <&UIC0>;
  220. interrupts = <0x0 0x4>;
  221. };
  222. UART1: serial@ef600400 {
  223. device_type = "serial";
  224. compatible = "ns16550";
  225. reg = <0xef600400 0x00000008>;
  226. virtual-reg = <0xef600400>;
  227. clock-frequency = <0>;
  228. current-speed = <0>;
  229. interrupt-parent = <&UIC0>;
  230. interrupts = <0x1 0x4>;
  231. };
  232. UART2: serial@ef600500 {
  233. device_type = "serial";
  234. compatible = "ns16550";
  235. reg = <0xef600500 0x00000008>;
  236. virtual-reg = <0xef600500>;
  237. clock-frequency = <0>;
  238. current-speed = <0>;
  239. interrupt-parent = <&UIC1>;
  240. interrupts = <0x3 0x4>;
  241. };
  242. UART3: serial@ef600600 {
  243. device_type = "serial";
  244. compatible = "ns16550";
  245. reg = <0xef600600 0x00000008>;
  246. virtual-reg = <0xef600600>;
  247. clock-frequency = <0>;
  248. current-speed = <0>;
  249. interrupt-parent = <&UIC1>;
  250. interrupts = <0x4 0x4>;
  251. };
  252. IIC0: i2c@ef600700 {
  253. #address-cells = <1>;
  254. #size-cells = <0>;
  255. compatible = "ibm,iic-440epx", "ibm,iic";
  256. reg = <0xef600700 0x00000014>;
  257. interrupt-parent = <&UIC0>;
  258. interrupts = <0x2 0x4>;
  259. hwmon@48 {
  260. compatible = "adi,ad7414";
  261. reg = <0x48>;
  262. };
  263. };
  264. IIC1: i2c@ef600800 {
  265. #address-cells = <1>;
  266. #size-cells = <0>;
  267. compatible = "ibm,iic-440epx", "ibm,iic";
  268. reg = <0xef600800 0x00000014>;
  269. interrupt-parent = <&UIC0>;
  270. interrupts = <0x7 0x4>;
  271. };
  272. ZMII0: emac-zmii@ef600d00 {
  273. compatible = "ibm,zmii-440epx", "ibm,zmii";
  274. reg = <0xef600d00 0x0000000c>;
  275. };
  276. RGMII0: emac-rgmii@ef601000 {
  277. compatible = "ibm,rgmii-440epx", "ibm,rgmii";
  278. reg = <0xef601000 0x00000008>;
  279. has-mdio;
  280. };
  281. EMAC0: ethernet@ef600e00 {
  282. device_type = "network";
  283. compatible = "ibm,emac-440epx", "ibm,emac4";
  284. interrupt-parent = <&EMAC0>;
  285. interrupts = <0x0 0x1>;
  286. #interrupt-cells = <1>;
  287. #address-cells = <0>;
  288. #size-cells = <0>;
  289. interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
  290. /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
  291. reg = <0xef600e00 0x00000074>;
  292. local-mac-address = [000000000000];
  293. mal-device = <&MAL0>;
  294. mal-tx-channel = <0>;
  295. mal-rx-channel = <0>;
  296. cell-index = <0>;
  297. max-frame-size = <9000>;
  298. rx-fifo-size = <4096>;
  299. tx-fifo-size = <2048>;
  300. phy-mode = "rgmii";
  301. phy-map = <0x00000000>;
  302. zmii-device = <&ZMII0>;
  303. zmii-channel = <0>;
  304. rgmii-device = <&RGMII0>;
  305. rgmii-channel = <0>;
  306. has-inverted-stacr-oc;
  307. has-new-stacr-staopc;
  308. };
  309. EMAC1: ethernet@ef600f00 {
  310. device_type = "network";
  311. compatible = "ibm,emac-440epx", "ibm,emac4";
  312. interrupt-parent = <&EMAC1>;
  313. interrupts = <0x0 0x1>;
  314. #interrupt-cells = <1>;
  315. #address-cells = <0>;
  316. #size-cells = <0>;
  317. interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
  318. /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
  319. reg = <0xef600f00 0x00000074>;
  320. local-mac-address = [000000000000];
  321. mal-device = <&MAL0>;
  322. mal-tx-channel = <1>;
  323. mal-rx-channel = <1>;
  324. cell-index = <1>;
  325. max-frame-size = <9000>;
  326. rx-fifo-size = <4096>;
  327. tx-fifo-size = <2048>;
  328. phy-mode = "rgmii";
  329. phy-map = <0x00000000>;
  330. zmii-device = <&ZMII0>;
  331. zmii-channel = <1>;
  332. rgmii-device = <&RGMII0>;
  333. rgmii-channel = <1>;
  334. has-inverted-stacr-oc;
  335. has-new-stacr-staopc;
  336. };
  337. };
  338. PCI0: pci@1ec000000 {
  339. device_type = "pci";
  340. #interrupt-cells = <1>;
  341. #size-cells = <2>;
  342. #address-cells = <3>;
  343. compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
  344. primary;
  345. reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */
  346. 0x00000001 0xeed00000 0x00000004 /* IACK */
  347. 0x00000001 0xeed00000 0x00000004 /* Special cycle */
  348. 0x00000001 0xef400000 0x00000040>; /* Internal registers */
  349. /* Outbound ranges, one memory and one IO,
  350. * later cannot be changed. Chip supports a second
  351. * IO range but we don't use it for now
  352. * From the 440EPx user manual:
  353. * PCI 1 Memory 1 8000 0000 1 BFFF FFFF 1GB
  354. * I/O 1 E800 0000 1 E800 FFFF 64KB
  355. * I/O 1 E880 0000 1 EBFF FFFF 56MB
  356. */
  357. ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x40000000
  358. 0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00010000
  359. 0x01000000 0x00000000 0x00000000 0x00000001 0xe8800000 0x00000000 0x03800000>;
  360. /* Inbound 2GB range starting at 0 */
  361. dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
  362. /* All PCI interrupts are routed to IRQ 67 */
  363. interrupt-map-mask = <0x0 0x0 0x0 0x0>;
  364. interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >;
  365. };
  366. };
  367. chosen {
  368. linux,stdout-path = "/plb/opb/serial@ef600300";
  369. bootargs = "console=ttyS0,115200";
  370. };
  371. };