yosemite.dts 8.2 KB

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  1. /*
  2. * Device Tree Source for AMCC Yosemite
  3. *
  4. * Copyright 2008 IBM Corp.
  5. * Josh Boyer <jwboyer@linux.vnet.ibm.com>
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without
  9. * any warranty of any kind, whether express or implied.
  10. */
  11. /dts-v1/;
  12. / {
  13. #address-cells = <2>;
  14. #size-cells = <1>;
  15. model = "amcc,yosemite";
  16. compatible = "amcc,yosemite";
  17. dcr-parent = <&{/cpus/cpu@0}>;
  18. aliases {
  19. ethernet0 = &EMAC0;
  20. ethernet1 = &EMAC1;
  21. serial0 = &UART0;
  22. serial1 = &UART1;
  23. serial2 = &UART2;
  24. serial3 = &UART3;
  25. };
  26. cpus {
  27. #address-cells = <1>;
  28. #size-cells = <0>;
  29. cpu@0 {
  30. device_type = "cpu";
  31. model = "PowerPC,440EP";
  32. reg = <0x00000000>;
  33. clock-frequency = <0>; /* Filled in by zImage */
  34. timebase-frequency = <0>; /* Filled in by zImage */
  35. i-cache-line-size = <32>;
  36. d-cache-line-size = <32>;
  37. i-cache-size = <32768>;
  38. d-cache-size = <32768>;
  39. dcr-controller;
  40. dcr-access-method = "native";
  41. };
  42. };
  43. memory {
  44. device_type = "memory";
  45. reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
  46. };
  47. UIC0: interrupt-controller0 {
  48. compatible = "ibm,uic-440ep","ibm,uic";
  49. interrupt-controller;
  50. cell-index = <0>;
  51. dcr-reg = <0x0c0 0x009>;
  52. #address-cells = <0>;
  53. #size-cells = <0>;
  54. #interrupt-cells = <2>;
  55. };
  56. UIC1: interrupt-controller1 {
  57. compatible = "ibm,uic-440ep","ibm,uic";
  58. interrupt-controller;
  59. cell-index = <1>;
  60. dcr-reg = <0x0d0 0x009>;
  61. #address-cells = <0>;
  62. #size-cells = <0>;
  63. #interrupt-cells = <2>;
  64. interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
  65. interrupt-parent = <&UIC0>;
  66. };
  67. SDR0: sdr {
  68. compatible = "ibm,sdr-440ep";
  69. dcr-reg = <0x00e 0x002>;
  70. };
  71. CPR0: cpr {
  72. compatible = "ibm,cpr-440ep";
  73. dcr-reg = <0x00c 0x002>;
  74. };
  75. plb {
  76. compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
  77. #address-cells = <2>;
  78. #size-cells = <1>;
  79. ranges;
  80. clock-frequency = <0>; /* Filled in by zImage */
  81. SDRAM0: sdram {
  82. compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
  83. dcr-reg = <0x010 0x002>;
  84. };
  85. DMA0: dma {
  86. compatible = "ibm,dma-440ep", "ibm,dma-440gp";
  87. dcr-reg = <0x100 0x027>;
  88. };
  89. MAL0: mcmal {
  90. compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
  91. dcr-reg = <0x180 0x062>;
  92. num-tx-chans = <4>;
  93. num-rx-chans = <2>;
  94. interrupt-parent = <&MAL0>;
  95. interrupts = <0x0 0x1 0x2 0x3 0x4>;
  96. #interrupt-cells = <1>;
  97. #address-cells = <0>;
  98. #size-cells = <0>;
  99. interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
  100. /*RXEOB*/ 0x1 &UIC0 0xb 0x4
  101. /*SERR*/ 0x2 &UIC1 0x0 0x4
  102. /*TXDE*/ 0x3 &UIC1 0x1 0x4
  103. /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
  104. };
  105. POB0: opb {
  106. compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
  107. #address-cells = <1>;
  108. #size-cells = <1>;
  109. /* Bamboo is oddball in the 44x world and doesn't use the ERPN
  110. * bits.
  111. */
  112. ranges = <0x00000000 0x00000000 0x00000000 0x80000000
  113. 0x80000000 0x00000000 0x80000000 0x80000000>;
  114. interrupt-parent = <&UIC1>;
  115. interrupts = <0x7 0x4>;
  116. clock-frequency = <0>; /* Filled in by zImage */
  117. EBC0: ebc {
  118. compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
  119. dcr-reg = <0x012 0x002>;
  120. #address-cells = <2>;
  121. #size-cells = <1>;
  122. clock-frequency = <0>; /* Filled in by zImage */
  123. interrupts = <0x5 0x1>;
  124. interrupt-parent = <&UIC1>;
  125. nor_flash@0,0 {
  126. compatible = "amd,s29gl256n", "cfi-flash";
  127. bank-width = <2>;
  128. reg = <0x00000000 0x00000000 0x04000000>;
  129. #address-cells = <1>;
  130. #size-cells = <1>;
  131. partition@0 {
  132. label = "kernel";
  133. reg = <0x00000000 0x001e0000>;
  134. };
  135. partition@1e0000 {
  136. label = "dtb";
  137. reg = <0x001e0000 0x00020000>;
  138. };
  139. partition@200000 {
  140. label = "ramdisk";
  141. reg = <0x00200000 0x01400000>;
  142. };
  143. partition@1600000 {
  144. label = "jffs2";
  145. reg = <0x01600000 0x00400000>;
  146. };
  147. partition@1a00000 {
  148. label = "user";
  149. reg = <0x01a00000 0x02540000>;
  150. };
  151. partition@3f40000 {
  152. label = "env";
  153. reg = <0x03f40000 0x00040000>;
  154. };
  155. partition@3f80000 {
  156. label = "u-boot";
  157. reg = <0x03f80000 0x00080000>;
  158. };
  159. };
  160. };
  161. UART0: serial@ef600300 {
  162. device_type = "serial";
  163. compatible = "ns16550";
  164. reg = <0xef600300 0x00000008>;
  165. virtual-reg = <0xef600300>;
  166. clock-frequency = <0>; /* Filled in by zImage */
  167. current-speed = <115200>;
  168. interrupt-parent = <&UIC0>;
  169. interrupts = <0x0 0x4>;
  170. };
  171. UART1: serial@ef600400 {
  172. device_type = "serial";
  173. compatible = "ns16550";
  174. reg = <0xef600400 0x00000008>;
  175. virtual-reg = <0xef600400>;
  176. clock-frequency = <0>;
  177. current-speed = <0>;
  178. interrupt-parent = <&UIC0>;
  179. interrupts = <0x1 0x4>;
  180. };
  181. UART2: serial@ef600500 {
  182. device_type = "serial";
  183. compatible = "ns16550";
  184. reg = <0xef600500 0x00000008>;
  185. virtual-reg = <0xef600500>;
  186. clock-frequency = <0>;
  187. current-speed = <0>;
  188. interrupt-parent = <&UIC0>;
  189. interrupts = <0x3 0x4>;
  190. status = "disabled";
  191. };
  192. UART3: serial@ef600600 {
  193. device_type = "serial";
  194. compatible = "ns16550";
  195. reg = <0xef600600 0x00000008>;
  196. virtual-reg = <0xef600600>;
  197. clock-frequency = <0>;
  198. current-speed = <0>;
  199. interrupt-parent = <&UIC0>;
  200. interrupts = <0x4 0x4>;
  201. status = "disabled";
  202. };
  203. IIC0: i2c@ef600700 {
  204. compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
  205. reg = <0xef600700 0x00000014>;
  206. interrupt-parent = <&UIC0>;
  207. interrupts = <0x2 0x4>;
  208. };
  209. IIC1: i2c@ef600800 {
  210. compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
  211. reg = <0xef600800 0x00000014>;
  212. interrupt-parent = <&UIC0>;
  213. interrupts = <0x7 0x4>;
  214. };
  215. spi@ef600900 {
  216. compatible = "amcc,spi-440ep";
  217. reg = <0xef600900 0x00000006>;
  218. interrupts = <0x8 0x4>;
  219. interrupt-parent = <&UIC0>;
  220. };
  221. ZMII0: emac-zmii@ef600d00 {
  222. compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
  223. reg = <0xef600d00 0x0000000c>;
  224. };
  225. EMAC0: ethernet@ef600e00 {
  226. device_type = "network";
  227. compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
  228. interrupt-parent = <&UIC1>;
  229. interrupts = <0x1c 0x4 0x1d 0x4>;
  230. reg = <0xef600e00 0x00000070>;
  231. local-mac-address = [000000000000];
  232. mal-device = <&MAL0>;
  233. mal-tx-channel = <0 1>;
  234. mal-rx-channel = <0>;
  235. cell-index = <0>;
  236. max-frame-size = <1500>;
  237. rx-fifo-size = <4096>;
  238. tx-fifo-size = <2048>;
  239. phy-mode = "rmii";
  240. phy-map = <0x00000000>;
  241. zmii-device = <&ZMII0>;
  242. zmii-channel = <0>;
  243. };
  244. EMAC1: ethernet@ef600f00 {
  245. device_type = "network";
  246. compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
  247. interrupt-parent = <&UIC1>;
  248. interrupts = <0x1e 0x4 0x1f 0x4>;
  249. reg = <0xef600f00 0x00000070>;
  250. local-mac-address = [000000000000];
  251. mal-device = <&MAL0>;
  252. mal-tx-channel = <2 3>;
  253. mal-rx-channel = <1>;
  254. cell-index = <1>;
  255. max-frame-size = <1500>;
  256. rx-fifo-size = <4096>;
  257. tx-fifo-size = <2048>;
  258. phy-mode = "rmii";
  259. phy-map = <0x00000000>;
  260. zmii-device = <&ZMII0>;
  261. zmii-channel = <1>;
  262. };
  263. usb@ef601000 {
  264. compatible = "ohci-be";
  265. reg = <0xef601000 0x00000080>;
  266. interrupts = <0x8 0x4 0x9 0x4>;
  267. interrupt-parent = < &UIC1 >;
  268. };
  269. };
  270. PCI0: pci@ec000000 {
  271. device_type = "pci";
  272. #interrupt-cells = <1>;
  273. #size-cells = <2>;
  274. #address-cells = <3>;
  275. compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
  276. primary;
  277. reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */
  278. 0x00000000 0xeed00000 0x00000004 /* IACK */
  279. 0x00000000 0xeed00000 0x00000004 /* Special cycle */
  280. 0x00000000 0xef400000 0x00000040>; /* Internal registers */
  281. /* Outbound ranges, one memory and one IO,
  282. * later cannot be changed. Chip supports a second
  283. * IO range but we don't use it for now
  284. */
  285. ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000
  286. 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
  287. /* Inbound 2GB range starting at 0 */
  288. dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
  289. interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
  290. interrupt-map = <
  291. /* IDSEL 12 */
  292. 0x6000 0x0 0x0 0x0 &UIC0 0x19 0x8
  293. >;
  294. };
  295. };
  296. chosen {
  297. linux,stdout-path = "/plb/opb/serial@ef600300";
  298. };
  299. };