hw_irq.h 4.6 KB

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  1. /*
  2. * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
  3. */
  4. #ifndef _ASM_POWERPC_HW_IRQ_H
  5. #define _ASM_POWERPC_HW_IRQ_H
  6. #ifdef __KERNEL__
  7. #include <linux/errno.h>
  8. #include <linux/compiler.h>
  9. #include <asm/ptrace.h>
  10. #include <asm/processor.h>
  11. #ifdef CONFIG_PPC64
  12. /*
  13. * PACA flags in paca->irq_happened.
  14. *
  15. * This bits are set when interrupts occur while soft-disabled
  16. * and allow a proper replay. Additionally, PACA_IRQ_HARD_DIS
  17. * is set whenever we manually hard disable.
  18. */
  19. #define PACA_IRQ_HARD_DIS 0x01
  20. #define PACA_IRQ_DBELL 0x02
  21. #define PACA_IRQ_EE 0x04
  22. #define PACA_IRQ_DEC 0x08 /* Or FIT */
  23. #define PACA_IRQ_EE_EDGE 0x10 /* BookE only */
  24. #define PACA_IRQ_HMI 0x20
  25. #endif /* CONFIG_PPC64 */
  26. #ifndef __ASSEMBLY__
  27. extern void __replay_interrupt(unsigned int vector);
  28. extern void timer_interrupt(struct pt_regs *);
  29. extern void performance_monitor_exception(struct pt_regs *regs);
  30. extern void WatchdogException(struct pt_regs *regs);
  31. extern void unknown_exception(struct pt_regs *regs);
  32. #ifdef CONFIG_PPC64
  33. #include <asm/paca.h>
  34. static inline unsigned long arch_local_save_flags(void)
  35. {
  36. unsigned long flags;
  37. asm volatile(
  38. "lbz %0,%1(13)"
  39. : "=r" (flags)
  40. : "i" (offsetof(struct paca_struct, soft_enabled)));
  41. return flags;
  42. }
  43. static inline unsigned long arch_local_irq_disable(void)
  44. {
  45. unsigned long flags, zero;
  46. asm volatile(
  47. "li %1,0; lbz %0,%2(13); stb %1,%2(13)"
  48. : "=r" (flags), "=&r" (zero)
  49. : "i" (offsetof(struct paca_struct, soft_enabled))
  50. : "memory");
  51. return flags;
  52. }
  53. extern void arch_local_irq_restore(unsigned long);
  54. static inline void arch_local_irq_enable(void)
  55. {
  56. arch_local_irq_restore(1);
  57. }
  58. static inline unsigned long arch_local_irq_save(void)
  59. {
  60. return arch_local_irq_disable();
  61. }
  62. static inline bool arch_irqs_disabled_flags(unsigned long flags)
  63. {
  64. return flags == 0;
  65. }
  66. static inline bool arch_irqs_disabled(void)
  67. {
  68. return arch_irqs_disabled_flags(arch_local_save_flags());
  69. }
  70. #ifdef CONFIG_PPC_BOOK3E
  71. #define __hard_irq_enable() asm volatile("wrteei 1" : : : "memory")
  72. #define __hard_irq_disable() asm volatile("wrteei 0" : : : "memory")
  73. #else
  74. #define __hard_irq_enable() __mtmsrd(local_paca->kernel_msr | MSR_EE, 1)
  75. #define __hard_irq_disable() __mtmsrd(local_paca->kernel_msr, 1)
  76. #endif
  77. #define hard_irq_disable() do { \
  78. u8 _was_enabled; \
  79. __hard_irq_disable(); \
  80. _was_enabled = local_paca->soft_enabled; \
  81. local_paca->soft_enabled = 0; \
  82. local_paca->irq_happened |= PACA_IRQ_HARD_DIS; \
  83. if (_was_enabled) \
  84. trace_hardirqs_off(); \
  85. } while(0)
  86. static inline bool lazy_irq_pending(void)
  87. {
  88. return !!(get_paca()->irq_happened & ~PACA_IRQ_HARD_DIS);
  89. }
  90. /*
  91. * This is called by asynchronous interrupts to conditionally
  92. * re-enable hard interrupts when soft-disabled after having
  93. * cleared the source of the interrupt
  94. */
  95. static inline void may_hard_irq_enable(void)
  96. {
  97. get_paca()->irq_happened &= ~PACA_IRQ_HARD_DIS;
  98. if (!(get_paca()->irq_happened & PACA_IRQ_EE))
  99. __hard_irq_enable();
  100. }
  101. static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
  102. {
  103. return !regs->softe;
  104. }
  105. extern bool prep_irq_for_idle(void);
  106. #else /* CONFIG_PPC64 */
  107. #define SET_MSR_EE(x) mtmsr(x)
  108. static inline unsigned long arch_local_save_flags(void)
  109. {
  110. return mfmsr();
  111. }
  112. static inline void arch_local_irq_restore(unsigned long flags)
  113. {
  114. #if defined(CONFIG_BOOKE)
  115. asm volatile("wrtee %0" : : "r" (flags) : "memory");
  116. #else
  117. mtmsr(flags);
  118. #endif
  119. }
  120. static inline unsigned long arch_local_irq_save(void)
  121. {
  122. unsigned long flags = arch_local_save_flags();
  123. #ifdef CONFIG_BOOKE
  124. asm volatile("wrteei 0" : : : "memory");
  125. #else
  126. SET_MSR_EE(flags & ~MSR_EE);
  127. #endif
  128. return flags;
  129. }
  130. static inline void arch_local_irq_disable(void)
  131. {
  132. #ifdef CONFIG_BOOKE
  133. asm volatile("wrteei 0" : : : "memory");
  134. #else
  135. arch_local_irq_save();
  136. #endif
  137. }
  138. static inline void arch_local_irq_enable(void)
  139. {
  140. #ifdef CONFIG_BOOKE
  141. asm volatile("wrteei 1" : : : "memory");
  142. #else
  143. unsigned long msr = mfmsr();
  144. SET_MSR_EE(msr | MSR_EE);
  145. #endif
  146. }
  147. static inline bool arch_irqs_disabled_flags(unsigned long flags)
  148. {
  149. return (flags & MSR_EE) == 0;
  150. }
  151. static inline bool arch_irqs_disabled(void)
  152. {
  153. return arch_irqs_disabled_flags(arch_local_save_flags());
  154. }
  155. #define hard_irq_disable() arch_local_irq_disable()
  156. static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
  157. {
  158. return !(regs->msr & MSR_EE);
  159. }
  160. static inline void may_hard_irq_enable(void) { }
  161. #endif /* CONFIG_PPC64 */
  162. #define ARCH_IRQ_INIT_FLAGS IRQ_NOREQUEST
  163. /*
  164. * interrupt-retrigger: should we handle this via lost interrupts and IPIs
  165. * or should we not care like we do now ? --BenH.
  166. */
  167. struct irq_chip;
  168. #endif /* __ASSEMBLY__ */
  169. #endif /* __KERNEL__ */
  170. #endif /* _ASM_POWERPC_HW_IRQ_H */