book3s.c 23 KB

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  1. /*
  2. * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
  3. *
  4. * Authors:
  5. * Alexander Graf <agraf@suse.de>
  6. * Kevin Wolf <mail@kevin-wolf.de>
  7. *
  8. * Description:
  9. * This file is derived from arch/powerpc/kvm/44x.c,
  10. * by Hollis Blanchard <hollisb@us.ibm.com>.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License, version 2, as
  14. * published by the Free Software Foundation.
  15. */
  16. #include <linux/kvm_host.h>
  17. #include <linux/err.h>
  18. #include <linux/export.h>
  19. #include <linux/slab.h>
  20. #include <linux/module.h>
  21. #include <linux/miscdevice.h>
  22. #include <asm/reg.h>
  23. #include <asm/cputable.h>
  24. #include <asm/cacheflush.h>
  25. #include <asm/tlbflush.h>
  26. #include <asm/uaccess.h>
  27. #include <asm/io.h>
  28. #include <asm/kvm_ppc.h>
  29. #include <asm/kvm_book3s.h>
  30. #include <asm/mmu_context.h>
  31. #include <asm/page.h>
  32. #include <linux/gfp.h>
  33. #include <linux/sched.h>
  34. #include <linux/vmalloc.h>
  35. #include <linux/highmem.h>
  36. #include "book3s.h"
  37. #include "trace.h"
  38. #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  39. /* #define EXIT_DEBUG */
  40. struct kvm_stats_debugfs_item debugfs_entries[] = {
  41. { "exits", VCPU_STAT(sum_exits) },
  42. { "mmio", VCPU_STAT(mmio_exits) },
  43. { "sig", VCPU_STAT(signal_exits) },
  44. { "sysc", VCPU_STAT(syscall_exits) },
  45. { "inst_emu", VCPU_STAT(emulated_inst_exits) },
  46. { "dec", VCPU_STAT(dec_exits) },
  47. { "ext_intr", VCPU_STAT(ext_intr_exits) },
  48. { "queue_intr", VCPU_STAT(queue_intr) },
  49. { "halt_successful_poll", VCPU_STAT(halt_successful_poll), },
  50. { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), },
  51. { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  52. { "pf_storage", VCPU_STAT(pf_storage) },
  53. { "sp_storage", VCPU_STAT(sp_storage) },
  54. { "pf_instruc", VCPU_STAT(pf_instruc) },
  55. { "sp_instruc", VCPU_STAT(sp_instruc) },
  56. { "ld", VCPU_STAT(ld) },
  57. { "ld_slow", VCPU_STAT(ld_slow) },
  58. { "st", VCPU_STAT(st) },
  59. { "st_slow", VCPU_STAT(st_slow) },
  60. { NULL }
  61. };
  62. void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu)
  63. {
  64. if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) {
  65. ulong pc = kvmppc_get_pc(vcpu);
  66. if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
  67. kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK);
  68. vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK;
  69. }
  70. }
  71. EXPORT_SYMBOL_GPL(kvmppc_unfixup_split_real);
  72. static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
  73. {
  74. if (!is_kvmppc_hv_enabled(vcpu->kvm))
  75. return to_book3s(vcpu)->hior;
  76. return 0;
  77. }
  78. static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
  79. unsigned long pending_now, unsigned long old_pending)
  80. {
  81. if (is_kvmppc_hv_enabled(vcpu->kvm))
  82. return;
  83. if (pending_now)
  84. kvmppc_set_int_pending(vcpu, 1);
  85. else if (old_pending)
  86. kvmppc_set_int_pending(vcpu, 0);
  87. }
  88. static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
  89. {
  90. ulong crit_raw;
  91. ulong crit_r1;
  92. bool crit;
  93. if (is_kvmppc_hv_enabled(vcpu->kvm))
  94. return false;
  95. crit_raw = kvmppc_get_critical(vcpu);
  96. crit_r1 = kvmppc_get_gpr(vcpu, 1);
  97. /* Truncate crit indicators in 32 bit mode */
  98. if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
  99. crit_raw &= 0xffffffff;
  100. crit_r1 &= 0xffffffff;
  101. }
  102. /* Critical section when crit == r1 */
  103. crit = (crit_raw == crit_r1);
  104. /* ... and we're in supervisor mode */
  105. crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
  106. return crit;
  107. }
  108. void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
  109. {
  110. kvmppc_unfixup_split_real(vcpu);
  111. kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu));
  112. kvmppc_set_srr1(vcpu, kvmppc_get_msr(vcpu) | flags);
  113. kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec);
  114. vcpu->arch.mmu.reset_msr(vcpu);
  115. }
  116. static int kvmppc_book3s_vec2irqprio(unsigned int vec)
  117. {
  118. unsigned int prio;
  119. switch (vec) {
  120. case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
  121. case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
  122. case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
  123. case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
  124. case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
  125. case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
  126. case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
  127. case 0x501: prio = BOOK3S_IRQPRIO_EXTERNAL_LEVEL; break;
  128. case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
  129. case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
  130. case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
  131. case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
  132. case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
  133. case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
  134. case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
  135. case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
  136. case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
  137. default: prio = BOOK3S_IRQPRIO_MAX; break;
  138. }
  139. return prio;
  140. }
  141. void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
  142. unsigned int vec)
  143. {
  144. unsigned long old_pending = vcpu->arch.pending_exceptions;
  145. clear_bit(kvmppc_book3s_vec2irqprio(vec),
  146. &vcpu->arch.pending_exceptions);
  147. kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
  148. old_pending);
  149. }
  150. void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
  151. {
  152. vcpu->stat.queue_intr++;
  153. set_bit(kvmppc_book3s_vec2irqprio(vec),
  154. &vcpu->arch.pending_exceptions);
  155. #ifdef EXIT_DEBUG
  156. printk(KERN_INFO "Queueing interrupt %x\n", vec);
  157. #endif
  158. }
  159. EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
  160. void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
  161. {
  162. /* might as well deliver this straight away */
  163. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
  164. }
  165. EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
  166. void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
  167. {
  168. kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
  169. }
  170. EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
  171. int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
  172. {
  173. return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
  174. }
  175. EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
  176. void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
  177. {
  178. kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
  179. }
  180. EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
  181. void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
  182. struct kvm_interrupt *irq)
  183. {
  184. unsigned int vec = BOOK3S_INTERRUPT_EXTERNAL;
  185. if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
  186. vec = BOOK3S_INTERRUPT_EXTERNAL_LEVEL;
  187. kvmppc_book3s_queue_irqprio(vcpu, vec);
  188. }
  189. void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
  190. {
  191. kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
  192. kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  193. }
  194. void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
  195. ulong flags)
  196. {
  197. kvmppc_set_dar(vcpu, dar);
  198. kvmppc_set_dsisr(vcpu, flags);
  199. kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE);
  200. }
  201. void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags)
  202. {
  203. u64 msr = kvmppc_get_msr(vcpu);
  204. msr &= ~(SRR1_ISI_NOPT | SRR1_ISI_N_OR_G | SRR1_ISI_PROT);
  205. msr |= flags & (SRR1_ISI_NOPT | SRR1_ISI_N_OR_G | SRR1_ISI_PROT);
  206. kvmppc_set_msr_fast(vcpu, msr);
  207. kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE);
  208. }
  209. static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
  210. unsigned int priority)
  211. {
  212. int deliver = 1;
  213. int vec = 0;
  214. bool crit = kvmppc_critical_section(vcpu);
  215. switch (priority) {
  216. case BOOK3S_IRQPRIO_DECREMENTER:
  217. deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
  218. vec = BOOK3S_INTERRUPT_DECREMENTER;
  219. break;
  220. case BOOK3S_IRQPRIO_EXTERNAL:
  221. case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
  222. deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
  223. vec = BOOK3S_INTERRUPT_EXTERNAL;
  224. break;
  225. case BOOK3S_IRQPRIO_SYSTEM_RESET:
  226. vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
  227. break;
  228. case BOOK3S_IRQPRIO_MACHINE_CHECK:
  229. vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
  230. break;
  231. case BOOK3S_IRQPRIO_DATA_STORAGE:
  232. vec = BOOK3S_INTERRUPT_DATA_STORAGE;
  233. break;
  234. case BOOK3S_IRQPRIO_INST_STORAGE:
  235. vec = BOOK3S_INTERRUPT_INST_STORAGE;
  236. break;
  237. case BOOK3S_IRQPRIO_DATA_SEGMENT:
  238. vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
  239. break;
  240. case BOOK3S_IRQPRIO_INST_SEGMENT:
  241. vec = BOOK3S_INTERRUPT_INST_SEGMENT;
  242. break;
  243. case BOOK3S_IRQPRIO_ALIGNMENT:
  244. vec = BOOK3S_INTERRUPT_ALIGNMENT;
  245. break;
  246. case BOOK3S_IRQPRIO_PROGRAM:
  247. vec = BOOK3S_INTERRUPT_PROGRAM;
  248. break;
  249. case BOOK3S_IRQPRIO_VSX:
  250. vec = BOOK3S_INTERRUPT_VSX;
  251. break;
  252. case BOOK3S_IRQPRIO_ALTIVEC:
  253. vec = BOOK3S_INTERRUPT_ALTIVEC;
  254. break;
  255. case BOOK3S_IRQPRIO_FP_UNAVAIL:
  256. vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
  257. break;
  258. case BOOK3S_IRQPRIO_SYSCALL:
  259. vec = BOOK3S_INTERRUPT_SYSCALL;
  260. break;
  261. case BOOK3S_IRQPRIO_DEBUG:
  262. vec = BOOK3S_INTERRUPT_TRACE;
  263. break;
  264. case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
  265. vec = BOOK3S_INTERRUPT_PERFMON;
  266. break;
  267. case BOOK3S_IRQPRIO_FAC_UNAVAIL:
  268. vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
  269. break;
  270. default:
  271. deliver = 0;
  272. printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
  273. break;
  274. }
  275. #if 0
  276. printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
  277. #endif
  278. if (deliver)
  279. kvmppc_inject_interrupt(vcpu, vec, 0);
  280. return deliver;
  281. }
  282. /*
  283. * This function determines if an irqprio should be cleared once issued.
  284. */
  285. static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
  286. {
  287. switch (priority) {
  288. case BOOK3S_IRQPRIO_DECREMENTER:
  289. /* DEC interrupts get cleared by mtdec */
  290. return false;
  291. case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
  292. /* External interrupts get cleared by userspace */
  293. return false;
  294. }
  295. return true;
  296. }
  297. int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
  298. {
  299. unsigned long *pending = &vcpu->arch.pending_exceptions;
  300. unsigned long old_pending = vcpu->arch.pending_exceptions;
  301. unsigned int priority;
  302. #ifdef EXIT_DEBUG
  303. if (vcpu->arch.pending_exceptions)
  304. printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
  305. #endif
  306. priority = __ffs(*pending);
  307. while (priority < BOOK3S_IRQPRIO_MAX) {
  308. if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
  309. clear_irqprio(vcpu, priority)) {
  310. clear_bit(priority, &vcpu->arch.pending_exceptions);
  311. break;
  312. }
  313. priority = find_next_bit(pending,
  314. BITS_PER_BYTE * sizeof(*pending),
  315. priority + 1);
  316. }
  317. /* Tell the guest about our interrupt status */
  318. kvmppc_update_int_pending(vcpu, *pending, old_pending);
  319. return 0;
  320. }
  321. EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
  322. pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
  323. bool *writable)
  324. {
  325. ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
  326. gfn_t gfn = gpa >> PAGE_SHIFT;
  327. if (!(kvmppc_get_msr(vcpu) & MSR_SF))
  328. mp_pa = (uint32_t)mp_pa;
  329. /* Magic page override */
  330. gpa &= ~0xFFFULL;
  331. if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
  332. ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
  333. pfn_t pfn;
  334. pfn = (pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
  335. get_page(pfn_to_page(pfn));
  336. if (writable)
  337. *writable = true;
  338. return pfn;
  339. }
  340. return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
  341. }
  342. EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
  343. int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
  344. enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
  345. {
  346. bool data = (xlid == XLATE_DATA);
  347. bool iswrite = (xlrw == XLATE_WRITE);
  348. int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
  349. int r;
  350. if (relocated) {
  351. r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
  352. } else {
  353. pte->eaddr = eaddr;
  354. pte->raddr = eaddr & KVM_PAM;
  355. pte->vpage = VSID_REAL | eaddr >> 12;
  356. pte->may_read = true;
  357. pte->may_write = true;
  358. pte->may_execute = true;
  359. r = 0;
  360. if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
  361. !data) {
  362. if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
  363. ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
  364. pte->raddr &= ~SPLIT_HACK_MASK;
  365. }
  366. }
  367. return r;
  368. }
  369. int kvmppc_load_last_inst(struct kvm_vcpu *vcpu, enum instruction_type type,
  370. u32 *inst)
  371. {
  372. ulong pc = kvmppc_get_pc(vcpu);
  373. int r;
  374. if (type == INST_SC)
  375. pc -= 4;
  376. r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false);
  377. if (r == EMULATE_DONE)
  378. return r;
  379. else
  380. return EMULATE_AGAIN;
  381. }
  382. EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
  383. int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
  384. {
  385. return 0;
  386. }
  387. int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
  388. {
  389. return 0;
  390. }
  391. void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
  392. {
  393. }
  394. int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
  395. struct kvm_sregs *sregs)
  396. {
  397. return vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
  398. }
  399. int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
  400. struct kvm_sregs *sregs)
  401. {
  402. return vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
  403. }
  404. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  405. {
  406. int i;
  407. regs->pc = kvmppc_get_pc(vcpu);
  408. regs->cr = kvmppc_get_cr(vcpu);
  409. regs->ctr = kvmppc_get_ctr(vcpu);
  410. regs->lr = kvmppc_get_lr(vcpu);
  411. regs->xer = kvmppc_get_xer(vcpu);
  412. regs->msr = kvmppc_get_msr(vcpu);
  413. regs->srr0 = kvmppc_get_srr0(vcpu);
  414. regs->srr1 = kvmppc_get_srr1(vcpu);
  415. regs->pid = vcpu->arch.pid;
  416. regs->sprg0 = kvmppc_get_sprg0(vcpu);
  417. regs->sprg1 = kvmppc_get_sprg1(vcpu);
  418. regs->sprg2 = kvmppc_get_sprg2(vcpu);
  419. regs->sprg3 = kvmppc_get_sprg3(vcpu);
  420. regs->sprg4 = kvmppc_get_sprg4(vcpu);
  421. regs->sprg5 = kvmppc_get_sprg5(vcpu);
  422. regs->sprg6 = kvmppc_get_sprg6(vcpu);
  423. regs->sprg7 = kvmppc_get_sprg7(vcpu);
  424. for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
  425. regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
  426. return 0;
  427. }
  428. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  429. {
  430. int i;
  431. kvmppc_set_pc(vcpu, regs->pc);
  432. kvmppc_set_cr(vcpu, regs->cr);
  433. kvmppc_set_ctr(vcpu, regs->ctr);
  434. kvmppc_set_lr(vcpu, regs->lr);
  435. kvmppc_set_xer(vcpu, regs->xer);
  436. kvmppc_set_msr(vcpu, regs->msr);
  437. kvmppc_set_srr0(vcpu, regs->srr0);
  438. kvmppc_set_srr1(vcpu, regs->srr1);
  439. kvmppc_set_sprg0(vcpu, regs->sprg0);
  440. kvmppc_set_sprg1(vcpu, regs->sprg1);
  441. kvmppc_set_sprg2(vcpu, regs->sprg2);
  442. kvmppc_set_sprg3(vcpu, regs->sprg3);
  443. kvmppc_set_sprg4(vcpu, regs->sprg4);
  444. kvmppc_set_sprg5(vcpu, regs->sprg5);
  445. kvmppc_set_sprg6(vcpu, regs->sprg6);
  446. kvmppc_set_sprg7(vcpu, regs->sprg7);
  447. for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
  448. kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
  449. return 0;
  450. }
  451. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  452. {
  453. return -ENOTSUPP;
  454. }
  455. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  456. {
  457. return -ENOTSUPP;
  458. }
  459. int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
  460. union kvmppc_one_reg *val)
  461. {
  462. int r = 0;
  463. long int i;
  464. r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
  465. if (r == -EINVAL) {
  466. r = 0;
  467. switch (id) {
  468. case KVM_REG_PPC_DAR:
  469. *val = get_reg_val(id, kvmppc_get_dar(vcpu));
  470. break;
  471. case KVM_REG_PPC_DSISR:
  472. *val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
  473. break;
  474. case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
  475. i = id - KVM_REG_PPC_FPR0;
  476. *val = get_reg_val(id, VCPU_FPR(vcpu, i));
  477. break;
  478. case KVM_REG_PPC_FPSCR:
  479. *val = get_reg_val(id, vcpu->arch.fp.fpscr);
  480. break;
  481. #ifdef CONFIG_VSX
  482. case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
  483. if (cpu_has_feature(CPU_FTR_VSX)) {
  484. i = id - KVM_REG_PPC_VSR0;
  485. val->vsxval[0] = vcpu->arch.fp.fpr[i][0];
  486. val->vsxval[1] = vcpu->arch.fp.fpr[i][1];
  487. } else {
  488. r = -ENXIO;
  489. }
  490. break;
  491. #endif /* CONFIG_VSX */
  492. case KVM_REG_PPC_DEBUG_INST:
  493. *val = get_reg_val(id, INS_TW);
  494. break;
  495. #ifdef CONFIG_KVM_XICS
  496. case KVM_REG_PPC_ICP_STATE:
  497. if (!vcpu->arch.icp) {
  498. r = -ENXIO;
  499. break;
  500. }
  501. *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
  502. break;
  503. #endif /* CONFIG_KVM_XICS */
  504. case KVM_REG_PPC_FSCR:
  505. *val = get_reg_val(id, vcpu->arch.fscr);
  506. break;
  507. case KVM_REG_PPC_TAR:
  508. *val = get_reg_val(id, vcpu->arch.tar);
  509. break;
  510. case KVM_REG_PPC_EBBHR:
  511. *val = get_reg_val(id, vcpu->arch.ebbhr);
  512. break;
  513. case KVM_REG_PPC_EBBRR:
  514. *val = get_reg_val(id, vcpu->arch.ebbrr);
  515. break;
  516. case KVM_REG_PPC_BESCR:
  517. *val = get_reg_val(id, vcpu->arch.bescr);
  518. break;
  519. case KVM_REG_PPC_VTB:
  520. *val = get_reg_val(id, vcpu->arch.vtb);
  521. break;
  522. case KVM_REG_PPC_IC:
  523. *val = get_reg_val(id, vcpu->arch.ic);
  524. break;
  525. default:
  526. r = -EINVAL;
  527. break;
  528. }
  529. }
  530. return r;
  531. }
  532. int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
  533. union kvmppc_one_reg *val)
  534. {
  535. int r = 0;
  536. long int i;
  537. r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
  538. if (r == -EINVAL) {
  539. r = 0;
  540. switch (id) {
  541. case KVM_REG_PPC_DAR:
  542. kvmppc_set_dar(vcpu, set_reg_val(id, *val));
  543. break;
  544. case KVM_REG_PPC_DSISR:
  545. kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
  546. break;
  547. case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
  548. i = id - KVM_REG_PPC_FPR0;
  549. VCPU_FPR(vcpu, i) = set_reg_val(id, *val);
  550. break;
  551. case KVM_REG_PPC_FPSCR:
  552. vcpu->arch.fp.fpscr = set_reg_val(id, *val);
  553. break;
  554. #ifdef CONFIG_VSX
  555. case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
  556. if (cpu_has_feature(CPU_FTR_VSX)) {
  557. i = id - KVM_REG_PPC_VSR0;
  558. vcpu->arch.fp.fpr[i][0] = val->vsxval[0];
  559. vcpu->arch.fp.fpr[i][1] = val->vsxval[1];
  560. } else {
  561. r = -ENXIO;
  562. }
  563. break;
  564. #endif /* CONFIG_VSX */
  565. #ifdef CONFIG_KVM_XICS
  566. case KVM_REG_PPC_ICP_STATE:
  567. if (!vcpu->arch.icp) {
  568. r = -ENXIO;
  569. break;
  570. }
  571. r = kvmppc_xics_set_icp(vcpu,
  572. set_reg_val(id, *val));
  573. break;
  574. #endif /* CONFIG_KVM_XICS */
  575. case KVM_REG_PPC_FSCR:
  576. vcpu->arch.fscr = set_reg_val(id, *val);
  577. break;
  578. case KVM_REG_PPC_TAR:
  579. vcpu->arch.tar = set_reg_val(id, *val);
  580. break;
  581. case KVM_REG_PPC_EBBHR:
  582. vcpu->arch.ebbhr = set_reg_val(id, *val);
  583. break;
  584. case KVM_REG_PPC_EBBRR:
  585. vcpu->arch.ebbrr = set_reg_val(id, *val);
  586. break;
  587. case KVM_REG_PPC_BESCR:
  588. vcpu->arch.bescr = set_reg_val(id, *val);
  589. break;
  590. case KVM_REG_PPC_VTB:
  591. vcpu->arch.vtb = set_reg_val(id, *val);
  592. break;
  593. case KVM_REG_PPC_IC:
  594. vcpu->arch.ic = set_reg_val(id, *val);
  595. break;
  596. default:
  597. r = -EINVAL;
  598. break;
  599. }
  600. }
  601. return r;
  602. }
  603. void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  604. {
  605. vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
  606. }
  607. void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
  608. {
  609. vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
  610. }
  611. void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
  612. {
  613. vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
  614. }
  615. EXPORT_SYMBOL_GPL(kvmppc_set_msr);
  616. int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
  617. {
  618. return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu);
  619. }
  620. int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
  621. struct kvm_translation *tr)
  622. {
  623. return 0;
  624. }
  625. int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
  626. struct kvm_guest_debug *dbg)
  627. {
  628. vcpu->guest_debug = dbg->control;
  629. return 0;
  630. }
  631. void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
  632. {
  633. kvmppc_core_queue_dec(vcpu);
  634. kvm_vcpu_kick(vcpu);
  635. }
  636. struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
  637. {
  638. return kvm->arch.kvm_ops->vcpu_create(kvm, id);
  639. }
  640. void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
  641. {
  642. vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
  643. }
  644. int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
  645. {
  646. return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
  647. }
  648. int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
  649. {
  650. return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
  651. }
  652. void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
  653. struct kvm_memory_slot *dont)
  654. {
  655. kvm->arch.kvm_ops->free_memslot(free, dont);
  656. }
  657. int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
  658. unsigned long npages)
  659. {
  660. return kvm->arch.kvm_ops->create_memslot(slot, npages);
  661. }
  662. void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
  663. {
  664. kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
  665. }
  666. int kvmppc_core_prepare_memory_region(struct kvm *kvm,
  667. struct kvm_memory_slot *memslot,
  668. const struct kvm_userspace_memory_region *mem)
  669. {
  670. return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem);
  671. }
  672. void kvmppc_core_commit_memory_region(struct kvm *kvm,
  673. const struct kvm_userspace_memory_region *mem,
  674. const struct kvm_memory_slot *old,
  675. const struct kvm_memory_slot *new)
  676. {
  677. kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new);
  678. }
  679. int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
  680. {
  681. return kvm->arch.kvm_ops->unmap_hva(kvm, hva);
  682. }
  683. EXPORT_SYMBOL_GPL(kvm_unmap_hva);
  684. int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
  685. {
  686. return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end);
  687. }
  688. int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
  689. {
  690. return kvm->arch.kvm_ops->age_hva(kvm, start, end);
  691. }
  692. int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
  693. {
  694. return kvm->arch.kvm_ops->test_age_hva(kvm, hva);
  695. }
  696. void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
  697. {
  698. kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte);
  699. }
  700. void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
  701. {
  702. vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
  703. }
  704. int kvmppc_core_init_vm(struct kvm *kvm)
  705. {
  706. #ifdef CONFIG_PPC64
  707. INIT_LIST_HEAD(&kvm->arch.spapr_tce_tables);
  708. INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
  709. #endif
  710. return kvm->arch.kvm_ops->init_vm(kvm);
  711. }
  712. void kvmppc_core_destroy_vm(struct kvm *kvm)
  713. {
  714. kvm->arch.kvm_ops->destroy_vm(kvm);
  715. #ifdef CONFIG_PPC64
  716. kvmppc_rtas_tokens_free(kvm);
  717. WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
  718. #endif
  719. }
  720. int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
  721. {
  722. unsigned long size = kvmppc_get_gpr(vcpu, 4);
  723. unsigned long addr = kvmppc_get_gpr(vcpu, 5);
  724. u64 buf;
  725. int srcu_idx;
  726. int ret;
  727. if (!is_power_of_2(size) || (size > sizeof(buf)))
  728. return H_TOO_HARD;
  729. srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
  730. ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
  731. srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
  732. if (ret != 0)
  733. return H_TOO_HARD;
  734. switch (size) {
  735. case 1:
  736. kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
  737. break;
  738. case 2:
  739. kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
  740. break;
  741. case 4:
  742. kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
  743. break;
  744. case 8:
  745. kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
  746. break;
  747. default:
  748. BUG();
  749. }
  750. return H_SUCCESS;
  751. }
  752. EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
  753. int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
  754. {
  755. unsigned long size = kvmppc_get_gpr(vcpu, 4);
  756. unsigned long addr = kvmppc_get_gpr(vcpu, 5);
  757. unsigned long val = kvmppc_get_gpr(vcpu, 6);
  758. u64 buf;
  759. int srcu_idx;
  760. int ret;
  761. switch (size) {
  762. case 1:
  763. *(u8 *)&buf = val;
  764. break;
  765. case 2:
  766. *(__be16 *)&buf = cpu_to_be16(val);
  767. break;
  768. case 4:
  769. *(__be32 *)&buf = cpu_to_be32(val);
  770. break;
  771. case 8:
  772. *(__be64 *)&buf = cpu_to_be64(val);
  773. break;
  774. default:
  775. return H_TOO_HARD;
  776. }
  777. srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
  778. ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
  779. srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
  780. if (ret != 0)
  781. return H_TOO_HARD;
  782. return H_SUCCESS;
  783. }
  784. EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
  785. int kvmppc_core_check_processor_compat(void)
  786. {
  787. /*
  788. * We always return 0 for book3s. We check
  789. * for compatibility while loading the HV
  790. * or PR module
  791. */
  792. return 0;
  793. }
  794. int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
  795. {
  796. return kvm->arch.kvm_ops->hcall_implemented(hcall);
  797. }
  798. static int kvmppc_book3s_init(void)
  799. {
  800. int r;
  801. r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
  802. if (r)
  803. return r;
  804. #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
  805. r = kvmppc_book3s_init_pr();
  806. #endif
  807. return r;
  808. }
  809. static void kvmppc_book3s_exit(void)
  810. {
  811. #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
  812. kvmppc_book3s_exit_pr();
  813. #endif
  814. kvm_exit();
  815. }
  816. module_init(kvmppc_book3s_init);
  817. module_exit(kvmppc_book3s_exit);
  818. /* On 32bit this is our one and only kernel module */
  819. #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
  820. MODULE_ALIAS_MISCDEV(KVM_MINOR);
  821. MODULE_ALIAS("devname:kvm");
  822. #endif