book3s_hv_interrupts.S 4.0 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License, version 2, as
  4. * published by the Free Software Foundation.
  5. *
  6. * This program is distributed in the hope that it will be useful,
  7. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  9. * GNU General Public License for more details.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program; if not, write to the Free Software
  13. * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  14. *
  15. * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
  16. *
  17. * Derived from book3s_interrupts.S, which is:
  18. * Copyright SUSE Linux Products GmbH 2009
  19. *
  20. * Authors: Alexander Graf <agraf@suse.de>
  21. */
  22. #include <asm/ppc_asm.h>
  23. #include <asm/kvm_asm.h>
  24. #include <asm/reg.h>
  25. #include <asm/page.h>
  26. #include <asm/asm-offsets.h>
  27. #include <asm/exception-64s.h>
  28. #include <asm/ppc-opcode.h>
  29. /*****************************************************************************
  30. * *
  31. * Guest entry / exit code that is in kernel module memory (vmalloc) *
  32. * *
  33. ****************************************************************************/
  34. /* Registers:
  35. * none
  36. */
  37. _GLOBAL(__kvmppc_vcore_entry)
  38. /* Write correct stack frame */
  39. mflr r0
  40. std r0,PPC_LR_STKOFF(r1)
  41. /* Save host state to the stack */
  42. stdu r1, -SWITCH_FRAME_SIZE(r1)
  43. /* Save non-volatile registers (r14 - r31) and CR */
  44. SAVE_NVGPRS(r1)
  45. mfcr r3
  46. std r3, _CCR(r1)
  47. /* Save host DSCR */
  48. mfspr r3, SPRN_DSCR
  49. std r3, HSTATE_DSCR(r13)
  50. BEGIN_FTR_SECTION
  51. /* Save host DABR */
  52. mfspr r3, SPRN_DABR
  53. std r3, HSTATE_DABR(r13)
  54. END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
  55. /* Hard-disable interrupts */
  56. mfmsr r10
  57. std r10, HSTATE_HOST_MSR(r13)
  58. rldicl r10,r10,48,1
  59. rotldi r10,r10,16
  60. mtmsrd r10,1
  61. /* Save host PMU registers */
  62. BEGIN_FTR_SECTION
  63. /* Work around P8 PMAE bug */
  64. li r3, -1
  65. clrrdi r3, r3, 10
  66. mfspr r8, SPRN_MMCR2
  67. mtspr SPRN_MMCR2, r3 /* freeze all counters using MMCR2 */
  68. isync
  69. END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
  70. li r3, 1
  71. sldi r3, r3, 31 /* MMCR0_FC (freeze counters) bit */
  72. mfspr r7, SPRN_MMCR0 /* save MMCR0 */
  73. mtspr SPRN_MMCR0, r3 /* freeze all counters, disable interrupts */
  74. mfspr r6, SPRN_MMCRA
  75. /* Clear MMCRA in order to disable SDAR updates */
  76. li r5, 0
  77. mtspr SPRN_MMCRA, r5
  78. isync
  79. ld r3, PACALPPACAPTR(r13) /* is the host using the PMU? */
  80. lbz r5, LPPACA_PMCINUSE(r3)
  81. cmpwi r5, 0
  82. beq 31f /* skip if not */
  83. mfspr r5, SPRN_MMCR1
  84. mfspr r9, SPRN_SIAR
  85. mfspr r10, SPRN_SDAR
  86. std r7, HSTATE_MMCR0(r13)
  87. std r5, HSTATE_MMCR1(r13)
  88. std r6, HSTATE_MMCRA(r13)
  89. std r9, HSTATE_SIAR(r13)
  90. std r10, HSTATE_SDAR(r13)
  91. BEGIN_FTR_SECTION
  92. mfspr r9, SPRN_SIER
  93. std r8, HSTATE_MMCR2(r13)
  94. std r9, HSTATE_SIER(r13)
  95. END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
  96. mfspr r3, SPRN_PMC1
  97. mfspr r5, SPRN_PMC2
  98. mfspr r6, SPRN_PMC3
  99. mfspr r7, SPRN_PMC4
  100. mfspr r8, SPRN_PMC5
  101. mfspr r9, SPRN_PMC6
  102. stw r3, HSTATE_PMC1(r13)
  103. stw r5, HSTATE_PMC2(r13)
  104. stw r6, HSTATE_PMC3(r13)
  105. stw r7, HSTATE_PMC4(r13)
  106. stw r8, HSTATE_PMC5(r13)
  107. stw r9, HSTATE_PMC6(r13)
  108. 31:
  109. /*
  110. * Put whatever is in the decrementer into the
  111. * hypervisor decrementer.
  112. */
  113. mfspr r8,SPRN_DEC
  114. mftb r7
  115. mtspr SPRN_HDEC,r8
  116. extsw r8,r8
  117. add r8,r8,r7
  118. std r8,HSTATE_DECEXP(r13)
  119. /* Jump to partition switch code */
  120. bl kvmppc_hv_entry_trampoline
  121. nop
  122. /*
  123. * We return here in virtual mode after the guest exits
  124. * with something that we can't handle in real mode.
  125. * Interrupts are enabled again at this point.
  126. */
  127. /*
  128. * Register usage at this point:
  129. *
  130. * R1 = host R1
  131. * R2 = host R2
  132. * R12 = exit handler id
  133. * R13 = PACA
  134. */
  135. /* Restore non-volatile host registers (r14 - r31) and CR */
  136. REST_NVGPRS(r1)
  137. ld r4, _CCR(r1)
  138. mtcr r4
  139. addi r1, r1, SWITCH_FRAME_SIZE
  140. ld r0, PPC_LR_STKOFF(r1)
  141. mtlr r0
  142. blr