book3s_xics.c 35 KB

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  1. /*
  2. * Copyright 2012 Michael Ellerman, IBM Corporation.
  3. * Copyright 2012 Benjamin Herrenschmidt, IBM Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License, version 2, as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/kvm_host.h>
  11. #include <linux/err.h>
  12. #include <linux/gfp.h>
  13. #include <linux/anon_inodes.h>
  14. #include <linux/spinlock.h>
  15. #include <asm/uaccess.h>
  16. #include <asm/kvm_book3s.h>
  17. #include <asm/kvm_ppc.h>
  18. #include <asm/hvcall.h>
  19. #include <asm/xics.h>
  20. #include <asm/debug.h>
  21. #include <asm/time.h>
  22. #include <linux/debugfs.h>
  23. #include <linux/seq_file.h>
  24. #include "book3s_xics.h"
  25. #if 1
  26. #define XICS_DBG(fmt...) do { } while (0)
  27. #else
  28. #define XICS_DBG(fmt...) trace_printk(fmt)
  29. #endif
  30. #define ENABLE_REALMODE true
  31. #define DEBUG_REALMODE false
  32. /*
  33. * LOCKING
  34. * =======
  35. *
  36. * Each ICS has a spin lock protecting the information about the IRQ
  37. * sources and avoiding simultaneous deliveries of the same interrupt.
  38. *
  39. * ICP operations are done via a single compare & swap transaction
  40. * (most ICP state fits in the union kvmppc_icp_state)
  41. */
  42. /*
  43. * TODO
  44. * ====
  45. *
  46. * - To speed up resends, keep a bitmap of "resend" set bits in the
  47. * ICS
  48. *
  49. * - Speed up server# -> ICP lookup (array ? hash table ?)
  50. *
  51. * - Make ICS lockless as well, or at least a per-interrupt lock or hashed
  52. * locks array to improve scalability
  53. */
  54. /* -- ICS routines -- */
  55. static void icp_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
  56. u32 new_irq);
  57. /*
  58. * Return value ideally indicates how the interrupt was handled, but no
  59. * callers look at it (given that we don't implement KVM_IRQ_LINE_STATUS),
  60. * so just return 0.
  61. */
  62. static int ics_deliver_irq(struct kvmppc_xics *xics, u32 irq, u32 level)
  63. {
  64. struct ics_irq_state *state;
  65. struct kvmppc_ics *ics;
  66. u16 src;
  67. XICS_DBG("ics deliver %#x (level: %d)\n", irq, level);
  68. ics = kvmppc_xics_find_ics(xics, irq, &src);
  69. if (!ics) {
  70. XICS_DBG("ics_deliver_irq: IRQ 0x%06x not found !\n", irq);
  71. return -EINVAL;
  72. }
  73. state = &ics->irq_state[src];
  74. if (!state->exists)
  75. return -EINVAL;
  76. /*
  77. * We set state->asserted locklessly. This should be fine as
  78. * we are the only setter, thus concurrent access is undefined
  79. * to begin with.
  80. */
  81. if (level == 1 || level == KVM_INTERRUPT_SET_LEVEL)
  82. state->asserted = 1;
  83. else if (level == 0 || level == KVM_INTERRUPT_UNSET) {
  84. state->asserted = 0;
  85. return 0;
  86. }
  87. /* Attempt delivery */
  88. icp_deliver_irq(xics, NULL, irq);
  89. return 0;
  90. }
  91. static void ics_check_resend(struct kvmppc_xics *xics, struct kvmppc_ics *ics,
  92. struct kvmppc_icp *icp)
  93. {
  94. int i;
  95. unsigned long flags;
  96. local_irq_save(flags);
  97. arch_spin_lock(&ics->lock);
  98. for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
  99. struct ics_irq_state *state = &ics->irq_state[i];
  100. if (!state->resend)
  101. continue;
  102. XICS_DBG("resend %#x prio %#x\n", state->number,
  103. state->priority);
  104. arch_spin_unlock(&ics->lock);
  105. local_irq_restore(flags);
  106. icp_deliver_irq(xics, icp, state->number);
  107. local_irq_save(flags);
  108. arch_spin_lock(&ics->lock);
  109. }
  110. arch_spin_unlock(&ics->lock);
  111. local_irq_restore(flags);
  112. }
  113. static bool write_xive(struct kvmppc_xics *xics, struct kvmppc_ics *ics,
  114. struct ics_irq_state *state,
  115. u32 server, u32 priority, u32 saved_priority)
  116. {
  117. bool deliver;
  118. unsigned long flags;
  119. local_irq_save(flags);
  120. arch_spin_lock(&ics->lock);
  121. state->server = server;
  122. state->priority = priority;
  123. state->saved_priority = saved_priority;
  124. deliver = false;
  125. if ((state->masked_pending || state->resend) && priority != MASKED) {
  126. state->masked_pending = 0;
  127. deliver = true;
  128. }
  129. arch_spin_unlock(&ics->lock);
  130. local_irq_restore(flags);
  131. return deliver;
  132. }
  133. int kvmppc_xics_set_xive(struct kvm *kvm, u32 irq, u32 server, u32 priority)
  134. {
  135. struct kvmppc_xics *xics = kvm->arch.xics;
  136. struct kvmppc_icp *icp;
  137. struct kvmppc_ics *ics;
  138. struct ics_irq_state *state;
  139. u16 src;
  140. if (!xics)
  141. return -ENODEV;
  142. ics = kvmppc_xics_find_ics(xics, irq, &src);
  143. if (!ics)
  144. return -EINVAL;
  145. state = &ics->irq_state[src];
  146. icp = kvmppc_xics_find_server(kvm, server);
  147. if (!icp)
  148. return -EINVAL;
  149. XICS_DBG("set_xive %#x server %#x prio %#x MP:%d RS:%d\n",
  150. irq, server, priority,
  151. state->masked_pending, state->resend);
  152. if (write_xive(xics, ics, state, server, priority, priority))
  153. icp_deliver_irq(xics, icp, irq);
  154. return 0;
  155. }
  156. int kvmppc_xics_get_xive(struct kvm *kvm, u32 irq, u32 *server, u32 *priority)
  157. {
  158. struct kvmppc_xics *xics = kvm->arch.xics;
  159. struct kvmppc_ics *ics;
  160. struct ics_irq_state *state;
  161. u16 src;
  162. unsigned long flags;
  163. if (!xics)
  164. return -ENODEV;
  165. ics = kvmppc_xics_find_ics(xics, irq, &src);
  166. if (!ics)
  167. return -EINVAL;
  168. state = &ics->irq_state[src];
  169. local_irq_save(flags);
  170. arch_spin_lock(&ics->lock);
  171. *server = state->server;
  172. *priority = state->priority;
  173. arch_spin_unlock(&ics->lock);
  174. local_irq_restore(flags);
  175. return 0;
  176. }
  177. int kvmppc_xics_int_on(struct kvm *kvm, u32 irq)
  178. {
  179. struct kvmppc_xics *xics = kvm->arch.xics;
  180. struct kvmppc_icp *icp;
  181. struct kvmppc_ics *ics;
  182. struct ics_irq_state *state;
  183. u16 src;
  184. if (!xics)
  185. return -ENODEV;
  186. ics = kvmppc_xics_find_ics(xics, irq, &src);
  187. if (!ics)
  188. return -EINVAL;
  189. state = &ics->irq_state[src];
  190. icp = kvmppc_xics_find_server(kvm, state->server);
  191. if (!icp)
  192. return -EINVAL;
  193. if (write_xive(xics, ics, state, state->server, state->saved_priority,
  194. state->saved_priority))
  195. icp_deliver_irq(xics, icp, irq);
  196. return 0;
  197. }
  198. int kvmppc_xics_int_off(struct kvm *kvm, u32 irq)
  199. {
  200. struct kvmppc_xics *xics = kvm->arch.xics;
  201. struct kvmppc_ics *ics;
  202. struct ics_irq_state *state;
  203. u16 src;
  204. if (!xics)
  205. return -ENODEV;
  206. ics = kvmppc_xics_find_ics(xics, irq, &src);
  207. if (!ics)
  208. return -EINVAL;
  209. state = &ics->irq_state[src];
  210. write_xive(xics, ics, state, state->server, MASKED, state->priority);
  211. return 0;
  212. }
  213. /* -- ICP routines, including hcalls -- */
  214. static inline bool icp_try_update(struct kvmppc_icp *icp,
  215. union kvmppc_icp_state old,
  216. union kvmppc_icp_state new,
  217. bool change_self)
  218. {
  219. bool success;
  220. /* Calculate new output value */
  221. new.out_ee = (new.xisr && (new.pending_pri < new.cppr));
  222. /* Attempt atomic update */
  223. success = cmpxchg64(&icp->state.raw, old.raw, new.raw) == old.raw;
  224. if (!success)
  225. goto bail;
  226. XICS_DBG("UPD [%04x] - C:%02x M:%02x PP: %02x PI:%06x R:%d O:%d\n",
  227. icp->server_num,
  228. old.cppr, old.mfrr, old.pending_pri, old.xisr,
  229. old.need_resend, old.out_ee);
  230. XICS_DBG("UPD - C:%02x M:%02x PP: %02x PI:%06x R:%d O:%d\n",
  231. new.cppr, new.mfrr, new.pending_pri, new.xisr,
  232. new.need_resend, new.out_ee);
  233. /*
  234. * Check for output state update
  235. *
  236. * Note that this is racy since another processor could be updating
  237. * the state already. This is why we never clear the interrupt output
  238. * here, we only ever set it. The clear only happens prior to doing
  239. * an update and only by the processor itself. Currently we do it
  240. * in Accept (H_XIRR) and Up_Cppr (H_XPPR).
  241. *
  242. * We also do not try to figure out whether the EE state has changed,
  243. * we unconditionally set it if the new state calls for it. The reason
  244. * for that is that we opportunistically remove the pending interrupt
  245. * flag when raising CPPR, so we need to set it back here if an
  246. * interrupt is still pending.
  247. */
  248. if (new.out_ee) {
  249. kvmppc_book3s_queue_irqprio(icp->vcpu,
  250. BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  251. if (!change_self)
  252. kvmppc_fast_vcpu_kick(icp->vcpu);
  253. }
  254. bail:
  255. return success;
  256. }
  257. static void icp_check_resend(struct kvmppc_xics *xics,
  258. struct kvmppc_icp *icp)
  259. {
  260. u32 icsid;
  261. /* Order this load with the test for need_resend in the caller */
  262. smp_rmb();
  263. for_each_set_bit(icsid, icp->resend_map, xics->max_icsid + 1) {
  264. struct kvmppc_ics *ics = xics->ics[icsid];
  265. if (!test_and_clear_bit(icsid, icp->resend_map))
  266. continue;
  267. if (!ics)
  268. continue;
  269. ics_check_resend(xics, ics, icp);
  270. }
  271. }
  272. static bool icp_try_to_deliver(struct kvmppc_icp *icp, u32 irq, u8 priority,
  273. u32 *reject)
  274. {
  275. union kvmppc_icp_state old_state, new_state;
  276. bool success;
  277. XICS_DBG("try deliver %#x(P:%#x) to server %#x\n", irq, priority,
  278. icp->server_num);
  279. do {
  280. old_state = new_state = READ_ONCE(icp->state);
  281. *reject = 0;
  282. /* See if we can deliver */
  283. success = new_state.cppr > priority &&
  284. new_state.mfrr > priority &&
  285. new_state.pending_pri > priority;
  286. /*
  287. * If we can, check for a rejection and perform the
  288. * delivery
  289. */
  290. if (success) {
  291. *reject = new_state.xisr;
  292. new_state.xisr = irq;
  293. new_state.pending_pri = priority;
  294. } else {
  295. /*
  296. * If we failed to deliver we set need_resend
  297. * so a subsequent CPPR state change causes us
  298. * to try a new delivery.
  299. */
  300. new_state.need_resend = true;
  301. }
  302. } while (!icp_try_update(icp, old_state, new_state, false));
  303. return success;
  304. }
  305. static void icp_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
  306. u32 new_irq)
  307. {
  308. struct ics_irq_state *state;
  309. struct kvmppc_ics *ics;
  310. u32 reject;
  311. u16 src;
  312. unsigned long flags;
  313. /*
  314. * This is used both for initial delivery of an interrupt and
  315. * for subsequent rejection.
  316. *
  317. * Rejection can be racy vs. resends. We have evaluated the
  318. * rejection in an atomic ICP transaction which is now complete,
  319. * so potentially the ICP can already accept the interrupt again.
  320. *
  321. * So we need to retry the delivery. Essentially the reject path
  322. * boils down to a failed delivery. Always.
  323. *
  324. * Now the interrupt could also have moved to a different target,
  325. * thus we may need to re-do the ICP lookup as well
  326. */
  327. again:
  328. /* Get the ICS state and lock it */
  329. ics = kvmppc_xics_find_ics(xics, new_irq, &src);
  330. if (!ics) {
  331. XICS_DBG("icp_deliver_irq: IRQ 0x%06x not found !\n", new_irq);
  332. return;
  333. }
  334. state = &ics->irq_state[src];
  335. /* Get a lock on the ICS */
  336. local_irq_save(flags);
  337. arch_spin_lock(&ics->lock);
  338. /* Get our server */
  339. if (!icp || state->server != icp->server_num) {
  340. icp = kvmppc_xics_find_server(xics->kvm, state->server);
  341. if (!icp) {
  342. pr_warn("icp_deliver_irq: IRQ 0x%06x server 0x%x not found !\n",
  343. new_irq, state->server);
  344. goto out;
  345. }
  346. }
  347. /* Clear the resend bit of that interrupt */
  348. state->resend = 0;
  349. /*
  350. * If masked, bail out
  351. *
  352. * Note: PAPR doesn't mention anything about masked pending
  353. * when doing a resend, only when doing a delivery.
  354. *
  355. * However that would have the effect of losing a masked
  356. * interrupt that was rejected and isn't consistent with
  357. * the whole masked_pending business which is about not
  358. * losing interrupts that occur while masked.
  359. *
  360. * I don't differenciate normal deliveries and resends, this
  361. * implementation will differ from PAPR and not lose such
  362. * interrupts.
  363. */
  364. if (state->priority == MASKED) {
  365. XICS_DBG("irq %#x masked pending\n", new_irq);
  366. state->masked_pending = 1;
  367. goto out;
  368. }
  369. /*
  370. * Try the delivery, this will set the need_resend flag
  371. * in the ICP as part of the atomic transaction if the
  372. * delivery is not possible.
  373. *
  374. * Note that if successful, the new delivery might have itself
  375. * rejected an interrupt that was "delivered" before we took the
  376. * ics spin lock.
  377. *
  378. * In this case we do the whole sequence all over again for the
  379. * new guy. We cannot assume that the rejected interrupt is less
  380. * favored than the new one, and thus doesn't need to be delivered,
  381. * because by the time we exit icp_try_to_deliver() the target
  382. * processor may well have alrady consumed & completed it, and thus
  383. * the rejected interrupt might actually be already acceptable.
  384. */
  385. if (icp_try_to_deliver(icp, new_irq, state->priority, &reject)) {
  386. /*
  387. * Delivery was successful, did we reject somebody else ?
  388. */
  389. if (reject && reject != XICS_IPI) {
  390. arch_spin_unlock(&ics->lock);
  391. local_irq_restore(flags);
  392. new_irq = reject;
  393. goto again;
  394. }
  395. } else {
  396. /*
  397. * We failed to deliver the interrupt we need to set the
  398. * resend map bit and mark the ICS state as needing a resend
  399. */
  400. set_bit(ics->icsid, icp->resend_map);
  401. state->resend = 1;
  402. /*
  403. * If the need_resend flag got cleared in the ICP some time
  404. * between icp_try_to_deliver() atomic update and now, then
  405. * we know it might have missed the resend_map bit. So we
  406. * retry
  407. */
  408. smp_mb();
  409. if (!icp->state.need_resend) {
  410. arch_spin_unlock(&ics->lock);
  411. local_irq_restore(flags);
  412. goto again;
  413. }
  414. }
  415. out:
  416. arch_spin_unlock(&ics->lock);
  417. local_irq_restore(flags);
  418. }
  419. static void icp_down_cppr(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
  420. u8 new_cppr)
  421. {
  422. union kvmppc_icp_state old_state, new_state;
  423. bool resend;
  424. /*
  425. * This handles several related states in one operation:
  426. *
  427. * ICP State: Down_CPPR
  428. *
  429. * Load CPPR with new value and if the XISR is 0
  430. * then check for resends:
  431. *
  432. * ICP State: Resend
  433. *
  434. * If MFRR is more favored than CPPR, check for IPIs
  435. * and notify ICS of a potential resend. This is done
  436. * asynchronously (when used in real mode, we will have
  437. * to exit here).
  438. *
  439. * We do not handle the complete Check_IPI as documented
  440. * here. In the PAPR, this state will be used for both
  441. * Set_MFRR and Down_CPPR. However, we know that we aren't
  442. * changing the MFRR state here so we don't need to handle
  443. * the case of an MFRR causing a reject of a pending irq,
  444. * this will have been handled when the MFRR was set in the
  445. * first place.
  446. *
  447. * Thus we don't have to handle rejects, only resends.
  448. *
  449. * When implementing real mode for HV KVM, resend will lead to
  450. * a H_TOO_HARD return and the whole transaction will be handled
  451. * in virtual mode.
  452. */
  453. do {
  454. old_state = new_state = READ_ONCE(icp->state);
  455. /* Down_CPPR */
  456. new_state.cppr = new_cppr;
  457. /*
  458. * Cut down Resend / Check_IPI / IPI
  459. *
  460. * The logic is that we cannot have a pending interrupt
  461. * trumped by an IPI at this point (see above), so we
  462. * know that either the pending interrupt is already an
  463. * IPI (in which case we don't care to override it) or
  464. * it's either more favored than us or non existent
  465. */
  466. if (new_state.mfrr < new_cppr &&
  467. new_state.mfrr <= new_state.pending_pri) {
  468. WARN_ON(new_state.xisr != XICS_IPI &&
  469. new_state.xisr != 0);
  470. new_state.pending_pri = new_state.mfrr;
  471. new_state.xisr = XICS_IPI;
  472. }
  473. /* Latch/clear resend bit */
  474. resend = new_state.need_resend;
  475. new_state.need_resend = 0;
  476. } while (!icp_try_update(icp, old_state, new_state, true));
  477. /*
  478. * Now handle resend checks. Those are asynchronous to the ICP
  479. * state update in HW (ie bus transactions) so we can handle them
  480. * separately here too
  481. */
  482. if (resend)
  483. icp_check_resend(xics, icp);
  484. }
  485. static noinline unsigned long kvmppc_h_xirr(struct kvm_vcpu *vcpu)
  486. {
  487. union kvmppc_icp_state old_state, new_state;
  488. struct kvmppc_icp *icp = vcpu->arch.icp;
  489. u32 xirr;
  490. /* First, remove EE from the processor */
  491. kvmppc_book3s_dequeue_irqprio(icp->vcpu,
  492. BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  493. /*
  494. * ICP State: Accept_Interrupt
  495. *
  496. * Return the pending interrupt (if any) along with the
  497. * current CPPR, then clear the XISR & set CPPR to the
  498. * pending priority
  499. */
  500. do {
  501. old_state = new_state = READ_ONCE(icp->state);
  502. xirr = old_state.xisr | (((u32)old_state.cppr) << 24);
  503. if (!old_state.xisr)
  504. break;
  505. new_state.cppr = new_state.pending_pri;
  506. new_state.pending_pri = 0xff;
  507. new_state.xisr = 0;
  508. } while (!icp_try_update(icp, old_state, new_state, true));
  509. XICS_DBG("h_xirr vcpu %d xirr %#x\n", vcpu->vcpu_id, xirr);
  510. return xirr;
  511. }
  512. static noinline int kvmppc_h_ipi(struct kvm_vcpu *vcpu, unsigned long server,
  513. unsigned long mfrr)
  514. {
  515. union kvmppc_icp_state old_state, new_state;
  516. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  517. struct kvmppc_icp *icp;
  518. u32 reject;
  519. bool resend;
  520. bool local;
  521. XICS_DBG("h_ipi vcpu %d to server %lu mfrr %#lx\n",
  522. vcpu->vcpu_id, server, mfrr);
  523. icp = vcpu->arch.icp;
  524. local = icp->server_num == server;
  525. if (!local) {
  526. icp = kvmppc_xics_find_server(vcpu->kvm, server);
  527. if (!icp)
  528. return H_PARAMETER;
  529. }
  530. /*
  531. * ICP state: Set_MFRR
  532. *
  533. * If the CPPR is more favored than the new MFRR, then
  534. * nothing needs to be rejected as there can be no XISR to
  535. * reject. If the MFRR is being made less favored then
  536. * there might be a previously-rejected interrupt needing
  537. * to be resent.
  538. *
  539. * ICP state: Check_IPI
  540. *
  541. * If the CPPR is less favored, then we might be replacing
  542. * an interrupt, and thus need to possibly reject it.
  543. *
  544. * ICP State: IPI
  545. *
  546. * Besides rejecting any pending interrupts, we also
  547. * update XISR and pending_pri to mark IPI as pending.
  548. *
  549. * PAPR does not describe this state, but if the MFRR is being
  550. * made less favored than its earlier value, there might be
  551. * a previously-rejected interrupt needing to be resent.
  552. * Ideally, we would want to resend only if
  553. * prio(pending_interrupt) < mfrr &&
  554. * prio(pending_interrupt) < cppr
  555. * where pending interrupt is the one that was rejected. But
  556. * we don't have that state, so we simply trigger a resend
  557. * whenever the MFRR is made less favored.
  558. */
  559. do {
  560. old_state = new_state = READ_ONCE(icp->state);
  561. /* Set_MFRR */
  562. new_state.mfrr = mfrr;
  563. /* Check_IPI */
  564. reject = 0;
  565. resend = false;
  566. if (mfrr < new_state.cppr) {
  567. /* Reject a pending interrupt if not an IPI */
  568. if (mfrr <= new_state.pending_pri) {
  569. reject = new_state.xisr;
  570. new_state.pending_pri = mfrr;
  571. new_state.xisr = XICS_IPI;
  572. }
  573. }
  574. if (mfrr > old_state.mfrr) {
  575. resend = new_state.need_resend;
  576. new_state.need_resend = 0;
  577. }
  578. } while (!icp_try_update(icp, old_state, new_state, local));
  579. /* Handle reject */
  580. if (reject && reject != XICS_IPI)
  581. icp_deliver_irq(xics, icp, reject);
  582. /* Handle resend */
  583. if (resend)
  584. icp_check_resend(xics, icp);
  585. return H_SUCCESS;
  586. }
  587. static int kvmppc_h_ipoll(struct kvm_vcpu *vcpu, unsigned long server)
  588. {
  589. union kvmppc_icp_state state;
  590. struct kvmppc_icp *icp;
  591. icp = vcpu->arch.icp;
  592. if (icp->server_num != server) {
  593. icp = kvmppc_xics_find_server(vcpu->kvm, server);
  594. if (!icp)
  595. return H_PARAMETER;
  596. }
  597. state = READ_ONCE(icp->state);
  598. kvmppc_set_gpr(vcpu, 4, ((u32)state.cppr << 24) | state.xisr);
  599. kvmppc_set_gpr(vcpu, 5, state.mfrr);
  600. return H_SUCCESS;
  601. }
  602. static noinline void kvmppc_h_cppr(struct kvm_vcpu *vcpu, unsigned long cppr)
  603. {
  604. union kvmppc_icp_state old_state, new_state;
  605. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  606. struct kvmppc_icp *icp = vcpu->arch.icp;
  607. u32 reject;
  608. XICS_DBG("h_cppr vcpu %d cppr %#lx\n", vcpu->vcpu_id, cppr);
  609. /*
  610. * ICP State: Set_CPPR
  611. *
  612. * We can safely compare the new value with the current
  613. * value outside of the transaction as the CPPR is only
  614. * ever changed by the processor on itself
  615. */
  616. if (cppr > icp->state.cppr)
  617. icp_down_cppr(xics, icp, cppr);
  618. else if (cppr == icp->state.cppr)
  619. return;
  620. /*
  621. * ICP State: Up_CPPR
  622. *
  623. * The processor is raising its priority, this can result
  624. * in a rejection of a pending interrupt:
  625. *
  626. * ICP State: Reject_Current
  627. *
  628. * We can remove EE from the current processor, the update
  629. * transaction will set it again if needed
  630. */
  631. kvmppc_book3s_dequeue_irqprio(icp->vcpu,
  632. BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  633. do {
  634. old_state = new_state = READ_ONCE(icp->state);
  635. reject = 0;
  636. new_state.cppr = cppr;
  637. if (cppr <= new_state.pending_pri) {
  638. reject = new_state.xisr;
  639. new_state.xisr = 0;
  640. new_state.pending_pri = 0xff;
  641. }
  642. } while (!icp_try_update(icp, old_state, new_state, true));
  643. /*
  644. * Check for rejects. They are handled by doing a new delivery
  645. * attempt (see comments in icp_deliver_irq).
  646. */
  647. if (reject && reject != XICS_IPI)
  648. icp_deliver_irq(xics, icp, reject);
  649. }
  650. static noinline int kvmppc_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr)
  651. {
  652. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  653. struct kvmppc_icp *icp = vcpu->arch.icp;
  654. struct kvmppc_ics *ics;
  655. struct ics_irq_state *state;
  656. u32 irq = xirr & 0x00ffffff;
  657. u16 src;
  658. XICS_DBG("h_eoi vcpu %d eoi %#lx\n", vcpu->vcpu_id, xirr);
  659. /*
  660. * ICP State: EOI
  661. *
  662. * Note: If EOI is incorrectly used by SW to lower the CPPR
  663. * value (ie more favored), we do not check for rejection of
  664. * a pending interrupt, this is a SW error and PAPR sepcifies
  665. * that we don't have to deal with it.
  666. *
  667. * The sending of an EOI to the ICS is handled after the
  668. * CPPR update
  669. *
  670. * ICP State: Down_CPPR which we handle
  671. * in a separate function as it's shared with H_CPPR.
  672. */
  673. icp_down_cppr(xics, icp, xirr >> 24);
  674. /* IPIs have no EOI */
  675. if (irq == XICS_IPI)
  676. return H_SUCCESS;
  677. /*
  678. * EOI handling: If the interrupt is still asserted, we need to
  679. * resend it. We can take a lockless "peek" at the ICS state here.
  680. *
  681. * "Message" interrupts will never have "asserted" set
  682. */
  683. ics = kvmppc_xics_find_ics(xics, irq, &src);
  684. if (!ics) {
  685. XICS_DBG("h_eoi: IRQ 0x%06x not found !\n", irq);
  686. return H_PARAMETER;
  687. }
  688. state = &ics->irq_state[src];
  689. /* Still asserted, resend it */
  690. if (state->asserted)
  691. icp_deliver_irq(xics, icp, irq);
  692. kvm_notify_acked_irq(vcpu->kvm, 0, irq);
  693. return H_SUCCESS;
  694. }
  695. static noinline int kvmppc_xics_rm_complete(struct kvm_vcpu *vcpu, u32 hcall)
  696. {
  697. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  698. struct kvmppc_icp *icp = vcpu->arch.icp;
  699. XICS_DBG("XICS_RM: H_%x completing, act: %x state: %lx tgt: %p\n",
  700. hcall, icp->rm_action, icp->rm_dbgstate.raw, icp->rm_dbgtgt);
  701. if (icp->rm_action & XICS_RM_KICK_VCPU) {
  702. icp->n_rm_kick_vcpu++;
  703. kvmppc_fast_vcpu_kick(icp->rm_kick_target);
  704. }
  705. if (icp->rm_action & XICS_RM_CHECK_RESEND) {
  706. icp->n_rm_check_resend++;
  707. icp_check_resend(xics, icp->rm_resend_icp);
  708. }
  709. if (icp->rm_action & XICS_RM_REJECT) {
  710. icp->n_rm_reject++;
  711. icp_deliver_irq(xics, icp, icp->rm_reject);
  712. }
  713. if (icp->rm_action & XICS_RM_NOTIFY_EOI) {
  714. icp->n_rm_notify_eoi++;
  715. kvm_notify_acked_irq(vcpu->kvm, 0, icp->rm_eoied_irq);
  716. }
  717. icp->rm_action = 0;
  718. return H_SUCCESS;
  719. }
  720. int kvmppc_xics_hcall(struct kvm_vcpu *vcpu, u32 req)
  721. {
  722. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  723. unsigned long res;
  724. int rc = H_SUCCESS;
  725. /* Check if we have an ICP */
  726. if (!xics || !vcpu->arch.icp)
  727. return H_HARDWARE;
  728. /* These requests don't have real-mode implementations at present */
  729. switch (req) {
  730. case H_XIRR_X:
  731. res = kvmppc_h_xirr(vcpu);
  732. kvmppc_set_gpr(vcpu, 4, res);
  733. kvmppc_set_gpr(vcpu, 5, get_tb());
  734. return rc;
  735. case H_IPOLL:
  736. rc = kvmppc_h_ipoll(vcpu, kvmppc_get_gpr(vcpu, 4));
  737. return rc;
  738. }
  739. /* Check for real mode returning too hard */
  740. if (xics->real_mode && is_kvmppc_hv_enabled(vcpu->kvm))
  741. return kvmppc_xics_rm_complete(vcpu, req);
  742. switch (req) {
  743. case H_XIRR:
  744. res = kvmppc_h_xirr(vcpu);
  745. kvmppc_set_gpr(vcpu, 4, res);
  746. break;
  747. case H_CPPR:
  748. kvmppc_h_cppr(vcpu, kvmppc_get_gpr(vcpu, 4));
  749. break;
  750. case H_EOI:
  751. rc = kvmppc_h_eoi(vcpu, kvmppc_get_gpr(vcpu, 4));
  752. break;
  753. case H_IPI:
  754. rc = kvmppc_h_ipi(vcpu, kvmppc_get_gpr(vcpu, 4),
  755. kvmppc_get_gpr(vcpu, 5));
  756. break;
  757. }
  758. return rc;
  759. }
  760. EXPORT_SYMBOL_GPL(kvmppc_xics_hcall);
  761. /* -- Initialisation code etc. -- */
  762. static int xics_debug_show(struct seq_file *m, void *private)
  763. {
  764. struct kvmppc_xics *xics = m->private;
  765. struct kvm *kvm = xics->kvm;
  766. struct kvm_vcpu *vcpu;
  767. int icsid, i;
  768. unsigned long flags;
  769. unsigned long t_rm_kick_vcpu, t_rm_check_resend;
  770. unsigned long t_rm_reject, t_rm_notify_eoi;
  771. unsigned long t_reject, t_check_resend;
  772. if (!kvm)
  773. return 0;
  774. t_rm_kick_vcpu = 0;
  775. t_rm_notify_eoi = 0;
  776. t_rm_check_resend = 0;
  777. t_rm_reject = 0;
  778. t_check_resend = 0;
  779. t_reject = 0;
  780. seq_printf(m, "=========\nICP state\n=========\n");
  781. kvm_for_each_vcpu(i, vcpu, kvm) {
  782. struct kvmppc_icp *icp = vcpu->arch.icp;
  783. union kvmppc_icp_state state;
  784. if (!icp)
  785. continue;
  786. state.raw = READ_ONCE(icp->state.raw);
  787. seq_printf(m, "cpu server %#lx XIRR:%#x PPRI:%#x CPPR:%#x MFRR:%#x OUT:%d NR:%d\n",
  788. icp->server_num, state.xisr,
  789. state.pending_pri, state.cppr, state.mfrr,
  790. state.out_ee, state.need_resend);
  791. t_rm_kick_vcpu += icp->n_rm_kick_vcpu;
  792. t_rm_notify_eoi += icp->n_rm_notify_eoi;
  793. t_rm_check_resend += icp->n_rm_check_resend;
  794. t_rm_reject += icp->n_rm_reject;
  795. t_check_resend += icp->n_check_resend;
  796. t_reject += icp->n_reject;
  797. }
  798. seq_printf(m, "ICP Guest->Host totals: kick_vcpu=%lu check_resend=%lu reject=%lu notify_eoi=%lu\n",
  799. t_rm_kick_vcpu, t_rm_check_resend,
  800. t_rm_reject, t_rm_notify_eoi);
  801. seq_printf(m, "ICP Real Mode totals: check_resend=%lu resend=%lu\n",
  802. t_check_resend, t_reject);
  803. for (icsid = 0; icsid <= KVMPPC_XICS_MAX_ICS_ID; icsid++) {
  804. struct kvmppc_ics *ics = xics->ics[icsid];
  805. if (!ics)
  806. continue;
  807. seq_printf(m, "=========\nICS state for ICS 0x%x\n=========\n",
  808. icsid);
  809. local_irq_save(flags);
  810. arch_spin_lock(&ics->lock);
  811. for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
  812. struct ics_irq_state *irq = &ics->irq_state[i];
  813. seq_printf(m, "irq 0x%06x: server %#x prio %#x save prio %#x asserted %d resend %d masked pending %d\n",
  814. irq->number, irq->server, irq->priority,
  815. irq->saved_priority, irq->asserted,
  816. irq->resend, irq->masked_pending);
  817. }
  818. arch_spin_unlock(&ics->lock);
  819. local_irq_restore(flags);
  820. }
  821. return 0;
  822. }
  823. static int xics_debug_open(struct inode *inode, struct file *file)
  824. {
  825. return single_open(file, xics_debug_show, inode->i_private);
  826. }
  827. static const struct file_operations xics_debug_fops = {
  828. .open = xics_debug_open,
  829. .read = seq_read,
  830. .llseek = seq_lseek,
  831. .release = single_release,
  832. };
  833. static void xics_debugfs_init(struct kvmppc_xics *xics)
  834. {
  835. char *name;
  836. name = kasprintf(GFP_KERNEL, "kvm-xics-%p", xics);
  837. if (!name) {
  838. pr_err("%s: no memory for name\n", __func__);
  839. return;
  840. }
  841. xics->dentry = debugfs_create_file(name, S_IRUGO, powerpc_debugfs_root,
  842. xics, &xics_debug_fops);
  843. pr_debug("%s: created %s\n", __func__, name);
  844. kfree(name);
  845. }
  846. static struct kvmppc_ics *kvmppc_xics_create_ics(struct kvm *kvm,
  847. struct kvmppc_xics *xics, int irq)
  848. {
  849. struct kvmppc_ics *ics;
  850. int i, icsid;
  851. icsid = irq >> KVMPPC_XICS_ICS_SHIFT;
  852. mutex_lock(&kvm->lock);
  853. /* ICS already exists - somebody else got here first */
  854. if (xics->ics[icsid])
  855. goto out;
  856. /* Create the ICS */
  857. ics = kzalloc(sizeof(struct kvmppc_ics), GFP_KERNEL);
  858. if (!ics)
  859. goto out;
  860. ics->icsid = icsid;
  861. for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
  862. ics->irq_state[i].number = (icsid << KVMPPC_XICS_ICS_SHIFT) | i;
  863. ics->irq_state[i].priority = MASKED;
  864. ics->irq_state[i].saved_priority = MASKED;
  865. }
  866. smp_wmb();
  867. xics->ics[icsid] = ics;
  868. if (icsid > xics->max_icsid)
  869. xics->max_icsid = icsid;
  870. out:
  871. mutex_unlock(&kvm->lock);
  872. return xics->ics[icsid];
  873. }
  874. int kvmppc_xics_create_icp(struct kvm_vcpu *vcpu, unsigned long server_num)
  875. {
  876. struct kvmppc_icp *icp;
  877. if (!vcpu->kvm->arch.xics)
  878. return -ENODEV;
  879. if (kvmppc_xics_find_server(vcpu->kvm, server_num))
  880. return -EEXIST;
  881. icp = kzalloc(sizeof(struct kvmppc_icp), GFP_KERNEL);
  882. if (!icp)
  883. return -ENOMEM;
  884. icp->vcpu = vcpu;
  885. icp->server_num = server_num;
  886. icp->state.mfrr = MASKED;
  887. icp->state.pending_pri = MASKED;
  888. vcpu->arch.icp = icp;
  889. XICS_DBG("created server for vcpu %d\n", vcpu->vcpu_id);
  890. return 0;
  891. }
  892. u64 kvmppc_xics_get_icp(struct kvm_vcpu *vcpu)
  893. {
  894. struct kvmppc_icp *icp = vcpu->arch.icp;
  895. union kvmppc_icp_state state;
  896. if (!icp)
  897. return 0;
  898. state = icp->state;
  899. return ((u64)state.cppr << KVM_REG_PPC_ICP_CPPR_SHIFT) |
  900. ((u64)state.xisr << KVM_REG_PPC_ICP_XISR_SHIFT) |
  901. ((u64)state.mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT) |
  902. ((u64)state.pending_pri << KVM_REG_PPC_ICP_PPRI_SHIFT);
  903. }
  904. int kvmppc_xics_set_icp(struct kvm_vcpu *vcpu, u64 icpval)
  905. {
  906. struct kvmppc_icp *icp = vcpu->arch.icp;
  907. struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
  908. union kvmppc_icp_state old_state, new_state;
  909. struct kvmppc_ics *ics;
  910. u8 cppr, mfrr, pending_pri;
  911. u32 xisr;
  912. u16 src;
  913. bool resend;
  914. if (!icp || !xics)
  915. return -ENOENT;
  916. cppr = icpval >> KVM_REG_PPC_ICP_CPPR_SHIFT;
  917. xisr = (icpval >> KVM_REG_PPC_ICP_XISR_SHIFT) &
  918. KVM_REG_PPC_ICP_XISR_MASK;
  919. mfrr = icpval >> KVM_REG_PPC_ICP_MFRR_SHIFT;
  920. pending_pri = icpval >> KVM_REG_PPC_ICP_PPRI_SHIFT;
  921. /* Require the new state to be internally consistent */
  922. if (xisr == 0) {
  923. if (pending_pri != 0xff)
  924. return -EINVAL;
  925. } else if (xisr == XICS_IPI) {
  926. if (pending_pri != mfrr || pending_pri >= cppr)
  927. return -EINVAL;
  928. } else {
  929. if (pending_pri >= mfrr || pending_pri >= cppr)
  930. return -EINVAL;
  931. ics = kvmppc_xics_find_ics(xics, xisr, &src);
  932. if (!ics)
  933. return -EINVAL;
  934. }
  935. new_state.raw = 0;
  936. new_state.cppr = cppr;
  937. new_state.xisr = xisr;
  938. new_state.mfrr = mfrr;
  939. new_state.pending_pri = pending_pri;
  940. /*
  941. * Deassert the CPU interrupt request.
  942. * icp_try_update will reassert it if necessary.
  943. */
  944. kvmppc_book3s_dequeue_irqprio(icp->vcpu,
  945. BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
  946. /*
  947. * Note that if we displace an interrupt from old_state.xisr,
  948. * we don't mark it as rejected. We expect userspace to set
  949. * the state of the interrupt sources to be consistent with
  950. * the ICP states (either before or afterwards, which doesn't
  951. * matter). We do handle resends due to CPPR becoming less
  952. * favoured because that is necessary to end up with a
  953. * consistent state in the situation where userspace restores
  954. * the ICS states before the ICP states.
  955. */
  956. do {
  957. old_state = READ_ONCE(icp->state);
  958. if (new_state.mfrr <= old_state.mfrr) {
  959. resend = false;
  960. new_state.need_resend = old_state.need_resend;
  961. } else {
  962. resend = old_state.need_resend;
  963. new_state.need_resend = 0;
  964. }
  965. } while (!icp_try_update(icp, old_state, new_state, false));
  966. if (resend)
  967. icp_check_resend(xics, icp);
  968. return 0;
  969. }
  970. static int xics_get_source(struct kvmppc_xics *xics, long irq, u64 addr)
  971. {
  972. int ret;
  973. struct kvmppc_ics *ics;
  974. struct ics_irq_state *irqp;
  975. u64 __user *ubufp = (u64 __user *) addr;
  976. u16 idx;
  977. u64 val, prio;
  978. unsigned long flags;
  979. ics = kvmppc_xics_find_ics(xics, irq, &idx);
  980. if (!ics)
  981. return -ENOENT;
  982. irqp = &ics->irq_state[idx];
  983. local_irq_save(flags);
  984. arch_spin_lock(&ics->lock);
  985. ret = -ENOENT;
  986. if (irqp->exists) {
  987. val = irqp->server;
  988. prio = irqp->priority;
  989. if (prio == MASKED) {
  990. val |= KVM_XICS_MASKED;
  991. prio = irqp->saved_priority;
  992. }
  993. val |= prio << KVM_XICS_PRIORITY_SHIFT;
  994. if (irqp->asserted)
  995. val |= KVM_XICS_LEVEL_SENSITIVE | KVM_XICS_PENDING;
  996. else if (irqp->masked_pending || irqp->resend)
  997. val |= KVM_XICS_PENDING;
  998. ret = 0;
  999. }
  1000. arch_spin_unlock(&ics->lock);
  1001. local_irq_restore(flags);
  1002. if (!ret && put_user(val, ubufp))
  1003. ret = -EFAULT;
  1004. return ret;
  1005. }
  1006. static int xics_set_source(struct kvmppc_xics *xics, long irq, u64 addr)
  1007. {
  1008. struct kvmppc_ics *ics;
  1009. struct ics_irq_state *irqp;
  1010. u64 __user *ubufp = (u64 __user *) addr;
  1011. u16 idx;
  1012. u64 val;
  1013. u8 prio;
  1014. u32 server;
  1015. unsigned long flags;
  1016. if (irq < KVMPPC_XICS_FIRST_IRQ || irq >= KVMPPC_XICS_NR_IRQS)
  1017. return -ENOENT;
  1018. ics = kvmppc_xics_find_ics(xics, irq, &idx);
  1019. if (!ics) {
  1020. ics = kvmppc_xics_create_ics(xics->kvm, xics, irq);
  1021. if (!ics)
  1022. return -ENOMEM;
  1023. }
  1024. irqp = &ics->irq_state[idx];
  1025. if (get_user(val, ubufp))
  1026. return -EFAULT;
  1027. server = val & KVM_XICS_DESTINATION_MASK;
  1028. prio = val >> KVM_XICS_PRIORITY_SHIFT;
  1029. if (prio != MASKED &&
  1030. kvmppc_xics_find_server(xics->kvm, server) == NULL)
  1031. return -EINVAL;
  1032. local_irq_save(flags);
  1033. arch_spin_lock(&ics->lock);
  1034. irqp->server = server;
  1035. irqp->saved_priority = prio;
  1036. if (val & KVM_XICS_MASKED)
  1037. prio = MASKED;
  1038. irqp->priority = prio;
  1039. irqp->resend = 0;
  1040. irqp->masked_pending = 0;
  1041. irqp->asserted = 0;
  1042. if ((val & KVM_XICS_PENDING) && (val & KVM_XICS_LEVEL_SENSITIVE))
  1043. irqp->asserted = 1;
  1044. irqp->exists = 1;
  1045. arch_spin_unlock(&ics->lock);
  1046. local_irq_restore(flags);
  1047. if (val & KVM_XICS_PENDING)
  1048. icp_deliver_irq(xics, NULL, irqp->number);
  1049. return 0;
  1050. }
  1051. int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
  1052. bool line_status)
  1053. {
  1054. struct kvmppc_xics *xics = kvm->arch.xics;
  1055. return ics_deliver_irq(xics, irq, level);
  1056. }
  1057. int kvm_set_msi(struct kvm_kernel_irq_routing_entry *irq_entry, struct kvm *kvm,
  1058. int irq_source_id, int level, bool line_status)
  1059. {
  1060. if (!level)
  1061. return -1;
  1062. return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi,
  1063. level, line_status);
  1064. }
  1065. static int xics_set_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
  1066. {
  1067. struct kvmppc_xics *xics = dev->private;
  1068. switch (attr->group) {
  1069. case KVM_DEV_XICS_GRP_SOURCES:
  1070. return xics_set_source(xics, attr->attr, attr->addr);
  1071. }
  1072. return -ENXIO;
  1073. }
  1074. static int xics_get_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
  1075. {
  1076. struct kvmppc_xics *xics = dev->private;
  1077. switch (attr->group) {
  1078. case KVM_DEV_XICS_GRP_SOURCES:
  1079. return xics_get_source(xics, attr->attr, attr->addr);
  1080. }
  1081. return -ENXIO;
  1082. }
  1083. static int xics_has_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
  1084. {
  1085. switch (attr->group) {
  1086. case KVM_DEV_XICS_GRP_SOURCES:
  1087. if (attr->attr >= KVMPPC_XICS_FIRST_IRQ &&
  1088. attr->attr < KVMPPC_XICS_NR_IRQS)
  1089. return 0;
  1090. break;
  1091. }
  1092. return -ENXIO;
  1093. }
  1094. static void kvmppc_xics_free(struct kvm_device *dev)
  1095. {
  1096. struct kvmppc_xics *xics = dev->private;
  1097. int i;
  1098. struct kvm *kvm = xics->kvm;
  1099. debugfs_remove(xics->dentry);
  1100. if (kvm)
  1101. kvm->arch.xics = NULL;
  1102. for (i = 0; i <= xics->max_icsid; i++)
  1103. kfree(xics->ics[i]);
  1104. kfree(xics);
  1105. kfree(dev);
  1106. }
  1107. static int kvmppc_xics_create(struct kvm_device *dev, u32 type)
  1108. {
  1109. struct kvmppc_xics *xics;
  1110. struct kvm *kvm = dev->kvm;
  1111. int ret = 0;
  1112. xics = kzalloc(sizeof(*xics), GFP_KERNEL);
  1113. if (!xics)
  1114. return -ENOMEM;
  1115. dev->private = xics;
  1116. xics->dev = dev;
  1117. xics->kvm = kvm;
  1118. /* Already there ? */
  1119. mutex_lock(&kvm->lock);
  1120. if (kvm->arch.xics)
  1121. ret = -EEXIST;
  1122. else
  1123. kvm->arch.xics = xics;
  1124. mutex_unlock(&kvm->lock);
  1125. if (ret) {
  1126. kfree(xics);
  1127. return ret;
  1128. }
  1129. xics_debugfs_init(xics);
  1130. #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
  1131. if (cpu_has_feature(CPU_FTR_ARCH_206)) {
  1132. /* Enable real mode support */
  1133. xics->real_mode = ENABLE_REALMODE;
  1134. xics->real_mode_dbg = DEBUG_REALMODE;
  1135. }
  1136. #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
  1137. return 0;
  1138. }
  1139. struct kvm_device_ops kvm_xics_ops = {
  1140. .name = "kvm-xics",
  1141. .create = kvmppc_xics_create,
  1142. .destroy = kvmppc_xics_free,
  1143. .set_attr = xics_set_attr,
  1144. .get_attr = xics_get_attr,
  1145. .has_attr = xics_has_attr,
  1146. };
  1147. int kvmppc_xics_connect_vcpu(struct kvm_device *dev, struct kvm_vcpu *vcpu,
  1148. u32 xcpu)
  1149. {
  1150. struct kvmppc_xics *xics = dev->private;
  1151. int r = -EBUSY;
  1152. if (dev->ops != &kvm_xics_ops)
  1153. return -EPERM;
  1154. if (xics->kvm != vcpu->kvm)
  1155. return -EPERM;
  1156. if (vcpu->arch.irq_type)
  1157. return -EBUSY;
  1158. r = kvmppc_xics_create_icp(vcpu, xcpu);
  1159. if (!r)
  1160. vcpu->arch.irq_type = KVMPPC_IRQ_XICS;
  1161. return r;
  1162. }
  1163. void kvmppc_xics_free_icp(struct kvm_vcpu *vcpu)
  1164. {
  1165. if (!vcpu->arch.icp)
  1166. return;
  1167. kfree(vcpu->arch.icp);
  1168. vcpu->arch.icp = NULL;
  1169. vcpu->arch.irq_type = KVMPPC_IRQ_DEFAULT;
  1170. }
  1171. static int xics_set_irq(struct kvm_kernel_irq_routing_entry *e,
  1172. struct kvm *kvm, int irq_source_id, int level,
  1173. bool line_status)
  1174. {
  1175. return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status);
  1176. }
  1177. int kvm_irq_map_gsi(struct kvm *kvm,
  1178. struct kvm_kernel_irq_routing_entry *entries, int gsi)
  1179. {
  1180. entries->gsi = gsi;
  1181. entries->type = KVM_IRQ_ROUTING_IRQCHIP;
  1182. entries->set = xics_set_irq;
  1183. entries->irqchip.irqchip = 0;
  1184. entries->irqchip.pin = gsi;
  1185. return 1;
  1186. }
  1187. int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
  1188. {
  1189. return pin;
  1190. }