e500_emulate.c 9.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449
  1. /*
  2. * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
  3. *
  4. * Author: Yu Liu, <yu.liu@freescale.com>
  5. *
  6. * Description:
  7. * This file is derived from arch/powerpc/kvm/44x_emulate.c,
  8. * by Hollis Blanchard <hollisb@us.ibm.com>.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License, version 2, as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <asm/kvm_ppc.h>
  15. #include <asm/disassemble.h>
  16. #include <asm/dbell.h>
  17. #include <asm/reg_booke.h>
  18. #include "booke.h"
  19. #include "e500.h"
  20. #define XOP_DCBTLS 166
  21. #define XOP_MSGSND 206
  22. #define XOP_MSGCLR 238
  23. #define XOP_MFTMR 366
  24. #define XOP_TLBIVAX 786
  25. #define XOP_TLBSX 914
  26. #define XOP_TLBRE 946
  27. #define XOP_TLBWE 978
  28. #define XOP_TLBILX 18
  29. #define XOP_EHPRIV 270
  30. #ifdef CONFIG_KVM_E500MC
  31. static int dbell2prio(ulong param)
  32. {
  33. int msg = param & PPC_DBELL_TYPE_MASK;
  34. int prio = -1;
  35. switch (msg) {
  36. case PPC_DBELL_TYPE(PPC_DBELL):
  37. prio = BOOKE_IRQPRIO_DBELL;
  38. break;
  39. case PPC_DBELL_TYPE(PPC_DBELL_CRIT):
  40. prio = BOOKE_IRQPRIO_DBELL_CRIT;
  41. break;
  42. default:
  43. break;
  44. }
  45. return prio;
  46. }
  47. static int kvmppc_e500_emul_msgclr(struct kvm_vcpu *vcpu, int rb)
  48. {
  49. ulong param = vcpu->arch.gpr[rb];
  50. int prio = dbell2prio(param);
  51. if (prio < 0)
  52. return EMULATE_FAIL;
  53. clear_bit(prio, &vcpu->arch.pending_exceptions);
  54. return EMULATE_DONE;
  55. }
  56. static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, int rb)
  57. {
  58. ulong param = vcpu->arch.gpr[rb];
  59. int prio = dbell2prio(rb);
  60. int pir = param & PPC_DBELL_PIR_MASK;
  61. int i;
  62. struct kvm_vcpu *cvcpu;
  63. if (prio < 0)
  64. return EMULATE_FAIL;
  65. kvm_for_each_vcpu(i, cvcpu, vcpu->kvm) {
  66. int cpir = cvcpu->arch.shared->pir;
  67. if ((param & PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) {
  68. set_bit(prio, &cvcpu->arch.pending_exceptions);
  69. kvm_vcpu_kick(cvcpu);
  70. }
  71. }
  72. return EMULATE_DONE;
  73. }
  74. #endif
  75. static int kvmppc_e500_emul_ehpriv(struct kvm_run *run, struct kvm_vcpu *vcpu,
  76. unsigned int inst, int *advance)
  77. {
  78. int emulated = EMULATE_DONE;
  79. switch (get_oc(inst)) {
  80. case EHPRIV_OC_DEBUG:
  81. run->exit_reason = KVM_EXIT_DEBUG;
  82. run->debug.arch.address = vcpu->arch.pc;
  83. run->debug.arch.status = 0;
  84. kvmppc_account_exit(vcpu, DEBUG_EXITS);
  85. emulated = EMULATE_EXIT_USER;
  86. *advance = 0;
  87. break;
  88. default:
  89. emulated = EMULATE_FAIL;
  90. }
  91. return emulated;
  92. }
  93. static int kvmppc_e500_emul_dcbtls(struct kvm_vcpu *vcpu)
  94. {
  95. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  96. /* Always fail to lock the cache */
  97. vcpu_e500->l1csr0 |= L1CSR0_CUL;
  98. return EMULATE_DONE;
  99. }
  100. static int kvmppc_e500_emul_mftmr(struct kvm_vcpu *vcpu, unsigned int inst,
  101. int rt)
  102. {
  103. /* Expose one thread per vcpu */
  104. if (get_tmrn(inst) == TMRN_TMCFG0) {
  105. kvmppc_set_gpr(vcpu, rt,
  106. 1 | (1 << TMRN_TMCFG0_NATHRD_SHIFT));
  107. return EMULATE_DONE;
  108. }
  109. return EMULATE_FAIL;
  110. }
  111. int kvmppc_core_emulate_op_e500(struct kvm_run *run, struct kvm_vcpu *vcpu,
  112. unsigned int inst, int *advance)
  113. {
  114. int emulated = EMULATE_DONE;
  115. int ra = get_ra(inst);
  116. int rb = get_rb(inst);
  117. int rt = get_rt(inst);
  118. gva_t ea;
  119. switch (get_op(inst)) {
  120. case 31:
  121. switch (get_xop(inst)) {
  122. case XOP_DCBTLS:
  123. emulated = kvmppc_e500_emul_dcbtls(vcpu);
  124. break;
  125. #ifdef CONFIG_KVM_E500MC
  126. case XOP_MSGSND:
  127. emulated = kvmppc_e500_emul_msgsnd(vcpu, rb);
  128. break;
  129. case XOP_MSGCLR:
  130. emulated = kvmppc_e500_emul_msgclr(vcpu, rb);
  131. break;
  132. #endif
  133. case XOP_TLBRE:
  134. emulated = kvmppc_e500_emul_tlbre(vcpu);
  135. break;
  136. case XOP_TLBWE:
  137. emulated = kvmppc_e500_emul_tlbwe(vcpu);
  138. break;
  139. case XOP_TLBSX:
  140. ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
  141. emulated = kvmppc_e500_emul_tlbsx(vcpu, ea);
  142. break;
  143. case XOP_TLBILX: {
  144. int type = rt & 0x3;
  145. ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
  146. emulated = kvmppc_e500_emul_tlbilx(vcpu, type, ea);
  147. break;
  148. }
  149. case XOP_TLBIVAX:
  150. ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
  151. emulated = kvmppc_e500_emul_tlbivax(vcpu, ea);
  152. break;
  153. case XOP_MFTMR:
  154. emulated = kvmppc_e500_emul_mftmr(vcpu, inst, rt);
  155. break;
  156. case XOP_EHPRIV:
  157. emulated = kvmppc_e500_emul_ehpriv(run, vcpu, inst,
  158. advance);
  159. break;
  160. default:
  161. emulated = EMULATE_FAIL;
  162. }
  163. break;
  164. default:
  165. emulated = EMULATE_FAIL;
  166. }
  167. if (emulated == EMULATE_FAIL)
  168. emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
  169. return emulated;
  170. }
  171. int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
  172. {
  173. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  174. int emulated = EMULATE_DONE;
  175. switch (sprn) {
  176. #ifndef CONFIG_KVM_BOOKE_HV
  177. case SPRN_PID:
  178. kvmppc_set_pid(vcpu, spr_val);
  179. break;
  180. case SPRN_PID1:
  181. if (spr_val != 0)
  182. return EMULATE_FAIL;
  183. vcpu_e500->pid[1] = spr_val;
  184. break;
  185. case SPRN_PID2:
  186. if (spr_val != 0)
  187. return EMULATE_FAIL;
  188. vcpu_e500->pid[2] = spr_val;
  189. break;
  190. case SPRN_MAS0:
  191. vcpu->arch.shared->mas0 = spr_val;
  192. break;
  193. case SPRN_MAS1:
  194. vcpu->arch.shared->mas1 = spr_val;
  195. break;
  196. case SPRN_MAS2:
  197. vcpu->arch.shared->mas2 = spr_val;
  198. break;
  199. case SPRN_MAS3:
  200. vcpu->arch.shared->mas7_3 &= ~(u64)0xffffffff;
  201. vcpu->arch.shared->mas7_3 |= spr_val;
  202. break;
  203. case SPRN_MAS4:
  204. vcpu->arch.shared->mas4 = spr_val;
  205. break;
  206. case SPRN_MAS6:
  207. vcpu->arch.shared->mas6 = spr_val;
  208. break;
  209. case SPRN_MAS7:
  210. vcpu->arch.shared->mas7_3 &= (u64)0xffffffff;
  211. vcpu->arch.shared->mas7_3 |= (u64)spr_val << 32;
  212. break;
  213. #endif
  214. case SPRN_L1CSR0:
  215. vcpu_e500->l1csr0 = spr_val;
  216. vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC);
  217. break;
  218. case SPRN_L1CSR1:
  219. vcpu_e500->l1csr1 = spr_val;
  220. vcpu_e500->l1csr1 &= ~(L1CSR1_ICFI | L1CSR1_ICLFR);
  221. break;
  222. case SPRN_HID0:
  223. vcpu_e500->hid0 = spr_val;
  224. break;
  225. case SPRN_HID1:
  226. vcpu_e500->hid1 = spr_val;
  227. break;
  228. case SPRN_MMUCSR0:
  229. emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
  230. spr_val);
  231. break;
  232. case SPRN_PWRMGTCR0:
  233. /*
  234. * Guest relies on host power management configurations
  235. * Treat the request as a general store
  236. */
  237. vcpu->arch.pwrmgtcr0 = spr_val;
  238. break;
  239. /* extra exceptions */
  240. #ifdef CONFIG_SPE_POSSIBLE
  241. case SPRN_IVOR32:
  242. vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
  243. break;
  244. case SPRN_IVOR33:
  245. vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
  246. break;
  247. case SPRN_IVOR34:
  248. vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
  249. break;
  250. #endif
  251. #ifdef CONFIG_ALTIVEC
  252. case SPRN_IVOR32:
  253. vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL] = spr_val;
  254. break;
  255. case SPRN_IVOR33:
  256. vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST] = spr_val;
  257. break;
  258. #endif
  259. case SPRN_IVOR35:
  260. vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
  261. break;
  262. #ifdef CONFIG_KVM_BOOKE_HV
  263. case SPRN_IVOR36:
  264. vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] = spr_val;
  265. break;
  266. case SPRN_IVOR37:
  267. vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = spr_val;
  268. break;
  269. #endif
  270. default:
  271. emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val);
  272. }
  273. return emulated;
  274. }
  275. int kvmppc_core_emulate_mfspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
  276. {
  277. struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
  278. int emulated = EMULATE_DONE;
  279. switch (sprn) {
  280. #ifndef CONFIG_KVM_BOOKE_HV
  281. case SPRN_PID:
  282. *spr_val = vcpu_e500->pid[0];
  283. break;
  284. case SPRN_PID1:
  285. *spr_val = vcpu_e500->pid[1];
  286. break;
  287. case SPRN_PID2:
  288. *spr_val = vcpu_e500->pid[2];
  289. break;
  290. case SPRN_MAS0:
  291. *spr_val = vcpu->arch.shared->mas0;
  292. break;
  293. case SPRN_MAS1:
  294. *spr_val = vcpu->arch.shared->mas1;
  295. break;
  296. case SPRN_MAS2:
  297. *spr_val = vcpu->arch.shared->mas2;
  298. break;
  299. case SPRN_MAS3:
  300. *spr_val = (u32)vcpu->arch.shared->mas7_3;
  301. break;
  302. case SPRN_MAS4:
  303. *spr_val = vcpu->arch.shared->mas4;
  304. break;
  305. case SPRN_MAS6:
  306. *spr_val = vcpu->arch.shared->mas6;
  307. break;
  308. case SPRN_MAS7:
  309. *spr_val = vcpu->arch.shared->mas7_3 >> 32;
  310. break;
  311. #endif
  312. case SPRN_DECAR:
  313. *spr_val = vcpu->arch.decar;
  314. break;
  315. case SPRN_TLB0CFG:
  316. *spr_val = vcpu->arch.tlbcfg[0];
  317. break;
  318. case SPRN_TLB1CFG:
  319. *spr_val = vcpu->arch.tlbcfg[1];
  320. break;
  321. case SPRN_TLB0PS:
  322. if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
  323. return EMULATE_FAIL;
  324. *spr_val = vcpu->arch.tlbps[0];
  325. break;
  326. case SPRN_TLB1PS:
  327. if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
  328. return EMULATE_FAIL;
  329. *spr_val = vcpu->arch.tlbps[1];
  330. break;
  331. case SPRN_L1CSR0:
  332. *spr_val = vcpu_e500->l1csr0;
  333. break;
  334. case SPRN_L1CSR1:
  335. *spr_val = vcpu_e500->l1csr1;
  336. break;
  337. case SPRN_HID0:
  338. *spr_val = vcpu_e500->hid0;
  339. break;
  340. case SPRN_HID1:
  341. *spr_val = vcpu_e500->hid1;
  342. break;
  343. case SPRN_SVR:
  344. *spr_val = vcpu_e500->svr;
  345. break;
  346. case SPRN_MMUCSR0:
  347. *spr_val = 0;
  348. break;
  349. case SPRN_MMUCFG:
  350. *spr_val = vcpu->arch.mmucfg;
  351. break;
  352. case SPRN_EPTCFG:
  353. if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
  354. return EMULATE_FAIL;
  355. /*
  356. * Legacy Linux guests access EPTCFG register even if the E.PT
  357. * category is disabled in the VM. Give them a chance to live.
  358. */
  359. *spr_val = vcpu->arch.eptcfg;
  360. break;
  361. case SPRN_PWRMGTCR0:
  362. *spr_val = vcpu->arch.pwrmgtcr0;
  363. break;
  364. /* extra exceptions */
  365. #ifdef CONFIG_SPE_POSSIBLE
  366. case SPRN_IVOR32:
  367. *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
  368. break;
  369. case SPRN_IVOR33:
  370. *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
  371. break;
  372. case SPRN_IVOR34:
  373. *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
  374. break;
  375. #endif
  376. #ifdef CONFIG_ALTIVEC
  377. case SPRN_IVOR32:
  378. *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL];
  379. break;
  380. case SPRN_IVOR33:
  381. *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST];
  382. break;
  383. #endif
  384. case SPRN_IVOR35:
  385. *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
  386. break;
  387. #ifdef CONFIG_KVM_BOOKE_HV
  388. case SPRN_IVOR36:
  389. *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL];
  390. break;
  391. case SPRN_IVOR37:
  392. *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];
  393. break;
  394. #endif
  395. default:
  396. emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val);
  397. }
  398. return emulated;
  399. }