ppc476.c 7.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299
  1. /*
  2. * PowerPC 476FPE board specific routines
  3. *
  4. * Copyright © 2013 Tony Breeds IBM Corporation
  5. * Copyright © 2013 Alistair Popple IBM Corporation
  6. *
  7. * Based on earlier code:
  8. * Matt Porter <mporter@kernel.crashing.org>
  9. * Copyright 2002-2005 MontaVista Software Inc.
  10. *
  11. * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
  12. * Copyright (c) 2003-2005 Zultys Technologies
  13. *
  14. * Rewritten and ported to the merged powerpc tree:
  15. * Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
  16. * Copyright © 2011 David Kliekamp IBM Corporation
  17. *
  18. * This program is free software; you can redistribute it and/or modify it
  19. * under the terms of the GNU General Public License as published by the
  20. * Free Software Foundation; either version 2 of the License, or (at your
  21. * option) any later version.
  22. */
  23. #include <linux/init.h>
  24. #include <linux/of.h>
  25. #include <linux/of_platform.h>
  26. #include <linux/rtc.h>
  27. #include <asm/machdep.h>
  28. #include <asm/prom.h>
  29. #include <asm/udbg.h>
  30. #include <asm/time.h>
  31. #include <asm/uic.h>
  32. #include <asm/ppc4xx.h>
  33. #include <asm/mpic.h>
  34. #include <asm/mmu.h>
  35. #include <linux/pci.h>
  36. #include <linux/i2c.h>
  37. static const struct of_device_id ppc47x_of_bus[] __initconst = {
  38. { .compatible = "ibm,plb4", },
  39. { .compatible = "ibm,plb6", },
  40. { .compatible = "ibm,opb", },
  41. { .compatible = "ibm,ebc", },
  42. {},
  43. };
  44. /* The EEPROM is missing and the default values are bogus. This forces USB in
  45. * to EHCI mode */
  46. static void quirk_ppc_currituck_usb_fixup(struct pci_dev *dev)
  47. {
  48. if (of_machine_is_compatible("ibm,currituck")) {
  49. pci_write_config_dword(dev, 0xe0, 0x0114231f);
  50. pci_write_config_dword(dev, 0xe4, 0x00006c40);
  51. }
  52. }
  53. DECLARE_PCI_FIXUP_HEADER(0x1033, 0x0035, quirk_ppc_currituck_usb_fixup);
  54. /* Akebono has an AVR microcontroller attached to the I2C bus
  55. * which is used to power off/reset the system. */
  56. /* AVR I2C Commands */
  57. #define AVR_PWRCTL_CMD (0x26)
  58. /* Flags for the power control I2C commands */
  59. #define AVR_PWRCTL_PWROFF (0x01)
  60. #define AVR_PWRCTL_RESET (0x02)
  61. static struct i2c_client *avr_i2c_client;
  62. static void avr_halt_system(int pwrctl_flags)
  63. {
  64. /* Request the AVR to reset the system */
  65. i2c_smbus_write_byte_data(avr_i2c_client,
  66. AVR_PWRCTL_CMD, pwrctl_flags);
  67. /* Wait for system to be reset */
  68. while (1)
  69. ;
  70. }
  71. static void avr_power_off_system(void)
  72. {
  73. avr_halt_system(AVR_PWRCTL_PWROFF);
  74. }
  75. static void avr_reset_system(char *cmd)
  76. {
  77. avr_halt_system(AVR_PWRCTL_RESET);
  78. }
  79. static int avr_probe(struct i2c_client *client,
  80. const struct i2c_device_id *id)
  81. {
  82. avr_i2c_client = client;
  83. ppc_md.restart = avr_reset_system;
  84. pm_power_off = avr_power_off_system;
  85. return 0;
  86. }
  87. static const struct i2c_device_id avr_id[] = {
  88. { "akebono-avr", 0 },
  89. { }
  90. };
  91. static struct i2c_driver avr_driver = {
  92. .driver = {
  93. .name = "akebono-avr",
  94. },
  95. .probe = avr_probe,
  96. .id_table = avr_id,
  97. };
  98. static int __init ppc47x_device_probe(void)
  99. {
  100. i2c_add_driver(&avr_driver);
  101. of_platform_bus_probe(NULL, ppc47x_of_bus, NULL);
  102. return 0;
  103. }
  104. machine_device_initcall(ppc47x, ppc47x_device_probe);
  105. static void __init ppc47x_init_irq(void)
  106. {
  107. struct device_node *np;
  108. /* Find top level interrupt controller */
  109. for_each_node_with_property(np, "interrupt-controller") {
  110. if (of_get_property(np, "interrupts", NULL) == NULL)
  111. break;
  112. }
  113. if (np == NULL)
  114. panic("Can't find top level interrupt controller");
  115. /* Check type and do appropriate initialization */
  116. if (of_device_is_compatible(np, "chrp,open-pic")) {
  117. /* The MPIC driver will get everything it needs from the
  118. * device-tree, just pass 0 to all arguments
  119. */
  120. struct mpic *mpic =
  121. mpic_alloc(np, 0, MPIC_NO_RESET, 0, 0, " MPIC ");
  122. BUG_ON(mpic == NULL);
  123. mpic_init(mpic);
  124. ppc_md.get_irq = mpic_get_irq;
  125. } else
  126. panic("Unrecognized top level interrupt controller");
  127. }
  128. #ifdef CONFIG_SMP
  129. static void smp_ppc47x_setup_cpu(int cpu)
  130. {
  131. mpic_setup_this_cpu();
  132. }
  133. static int smp_ppc47x_kick_cpu(int cpu)
  134. {
  135. struct device_node *cpunode = of_get_cpu_node(cpu, NULL);
  136. const u64 *spin_table_addr_prop;
  137. u32 *spin_table;
  138. extern void start_secondary_47x(void);
  139. BUG_ON(cpunode == NULL);
  140. /* Assume spin table. We could test for the enable-method in
  141. * the device-tree but currently there's little point as it's
  142. * our only supported method
  143. */
  144. spin_table_addr_prop =
  145. of_get_property(cpunode, "cpu-release-addr", NULL);
  146. if (spin_table_addr_prop == NULL) {
  147. pr_err("CPU%d: Can't start, missing cpu-release-addr !\n",
  148. cpu);
  149. return 1;
  150. }
  151. /* Assume it's mapped as part of the linear mapping. This is a bit
  152. * fishy but will work fine for now
  153. *
  154. * XXX: Is there any reason to assume differently?
  155. */
  156. spin_table = (u32 *)__va(*spin_table_addr_prop);
  157. pr_debug("CPU%d: Spin table mapped at %p\n", cpu, spin_table);
  158. spin_table[3] = cpu;
  159. smp_wmb();
  160. spin_table[1] = __pa(start_secondary_47x);
  161. mb();
  162. return 0;
  163. }
  164. static struct smp_ops_t ppc47x_smp_ops = {
  165. .probe = smp_mpic_probe,
  166. .message_pass = smp_mpic_message_pass,
  167. .setup_cpu = smp_ppc47x_setup_cpu,
  168. .kick_cpu = smp_ppc47x_kick_cpu,
  169. .give_timebase = smp_generic_give_timebase,
  170. .take_timebase = smp_generic_take_timebase,
  171. };
  172. static void __init ppc47x_smp_init(void)
  173. {
  174. if (mmu_has_feature(MMU_FTR_TYPE_47x))
  175. smp_ops = &ppc47x_smp_ops;
  176. }
  177. #else /* CONFIG_SMP */
  178. static void __init ppc47x_smp_init(void) { }
  179. #endif /* CONFIG_SMP */
  180. static void __init ppc47x_setup_arch(void)
  181. {
  182. /* No need to check the DMA config as we /know/ our windows are all of
  183. * RAM. Lets hope that doesn't change */
  184. swiotlb_detect_4g();
  185. ppc47x_smp_init();
  186. }
  187. static int board_rev = -1;
  188. static int __init ppc47x_get_board_rev(void)
  189. {
  190. int reg;
  191. u8 *fpga;
  192. struct device_node *np = NULL;
  193. if (of_machine_is_compatible("ibm,currituck")) {
  194. np = of_find_compatible_node(NULL, NULL, "ibm,currituck-fpga");
  195. reg = 0;
  196. } else if (of_machine_is_compatible("ibm,akebono")) {
  197. np = of_find_compatible_node(NULL, NULL, "ibm,akebono-fpga");
  198. reg = 2;
  199. }
  200. if (!np)
  201. goto fail;
  202. fpga = (u8 *) of_iomap(np, 0);
  203. of_node_put(np);
  204. if (!fpga)
  205. goto fail;
  206. board_rev = ioread8(fpga + reg) & 0x03;
  207. pr_info("%s: Found board revision %d\n", __func__, board_rev);
  208. iounmap(fpga);
  209. return 0;
  210. fail:
  211. pr_info("%s: Unable to find board revision\n", __func__);
  212. return 0;
  213. }
  214. machine_arch_initcall(ppc47x, ppc47x_get_board_rev);
  215. /* Use USB controller should have been hardware swizzled but it wasn't :( */
  216. static void ppc47x_pci_irq_fixup(struct pci_dev *dev)
  217. {
  218. if (dev->vendor == 0x1033 && (dev->device == 0x0035 ||
  219. dev->device == 0x00e0)) {
  220. if (board_rev == 0) {
  221. dev->irq = irq_create_mapping(NULL, 47);
  222. pr_info("%s: Mapping irq %d\n", __func__, dev->irq);
  223. } else if (board_rev == 2) {
  224. dev->irq = irq_create_mapping(NULL, 49);
  225. pr_info("%s: Mapping irq %d\n", __func__, dev->irq);
  226. } else {
  227. pr_alert("%s: Unknown board revision\n", __func__);
  228. }
  229. }
  230. }
  231. /*
  232. * Called very early, MMU is off, device-tree isn't unflattened
  233. */
  234. static int __init ppc47x_probe(void)
  235. {
  236. unsigned long root = of_get_flat_dt_root();
  237. if (of_flat_dt_is_compatible(root, "ibm,akebono"))
  238. return 1;
  239. if (of_flat_dt_is_compatible(root, "ibm,currituck")) {
  240. ppc_md.pci_irq_fixup = ppc47x_pci_irq_fixup;
  241. return 1;
  242. }
  243. return 0;
  244. }
  245. define_machine(ppc47x) {
  246. .name = "PowerPC 47x",
  247. .probe = ppc47x_probe,
  248. .progress = udbg_progress,
  249. .init_IRQ = ppc47x_init_irq,
  250. .setup_arch = ppc47x_setup_arch,
  251. .restart = ppc4xx_reset_system,
  252. .calibrate_decr = generic_calibrate_decr,
  253. };