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arch
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powerpc
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platforms
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82xx
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pq2ads.h

pq2ads.h 1.5 KB
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  1. /*
    2. 

  2.  * PQ2/mpc8260 board-specific stuff
    3. 

  3.  *
    4. 

  4.  * A collection of structures, addresses, and values associated with
    5. 

  5.  * the Freescale MPC8260ADS/MPC8266ADS-PCI boards.
    6. 

  6.  * Copied from the RPX-Classic and SBS8260 stuff.
    7. 

  7.  *
    8. 

  8.  * Author: Vitaly Bordug <vbordug@ru.mvista.com>
    9. 

  9.  *
    10. 

  10.  * Originally written by Dan Malek for Motorola MPC8260 family
    11. 

  11.  *
    12. 

  12.  * Copyright (c) 2001 Dan Malek <dan@embeddedalley.com>
    13. 

  13.  * Copyright (c) 2006 MontaVista Software, Inc.
    14. 

  14.  *
    15. 

  15.  * This program is free software; you can redistribute  it and/or modify it
    16. 

  16.  * under  the terms of  the GNU General  Public License as published by the
    17. 

  17.  * Free Software Foundation;  either version 2 of the  License, or (at your
    18. 

  18.  * option) any later version.
    19. 

  19.  */
    20. 

  20. 

  21. #ifdef __KERNEL__
    22. 

  22. #ifndef __MACH_ADS8260_DEFS
    23. 

  23. #define __MACH_ADS8260_DEFS
    24. 

  24. 

  25. #include <linux/seq_file.h>
    26. 

  26. 

  27. /* The ADS8260 has 16, 32-bit wide control/status registers, accessed
    28. 

  28.  * only on word boundaries.
    29. 

  29.  * Not all are used (yet), or are interesting to us (yet).
    30. 

  30.  */
    31. 

  31. 

  32. /* Things of interest in the CSR.
    33. 

  33.  */
    34. 

  34. #define BCSR0_LED0		((uint)0x02000000)      /* 0 == on */
    35. 

  35. #define BCSR0_LED1		((uint)0x01000000)      /* 0 == on */
    36. 

  36. #define BCSR1_FETHIEN		((uint)0x08000000)      /* 0 == enable*/
    37. 

  37. #define BCSR1_FETH_RST		((uint)0x04000000)      /* 0 == reset */
    38. 

  38. #define BCSR1_RS232_EN1		((uint)0x02000000)      /* 0 ==enable */
    39. 

  39. #define BCSR1_RS232_EN2		((uint)0x01000000)      /* 0 ==enable */
    40. 

  40. #define BCSR3_FETHIEN2		((uint)0x10000000)      /* 0 == enable*/
    41. 

  41. #define BCSR3_FETH2_RST		((uint)0x80000000)      /* 0 == reset */
    42. 

  42. 

  43. #endif /* __MACH_ADS8260_DEFS */
    44. 

  44. #endif /* __KERNEL__ */
    45.