common.c 2.8 KB

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  1. /*
  2. * Routines common to most mpc85xx-based boards.
  3. *
  4. * This is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #include <linux/of_irq.h>
  9. #include <linux/of_platform.h>
  10. #include <asm/qe.h>
  11. #include <sysdev/cpm2_pic.h>
  12. #include "mpc85xx.h"
  13. static const struct of_device_id mpc85xx_common_ids[] __initconst = {
  14. { .type = "soc", },
  15. { .compatible = "soc", },
  16. { .compatible = "simple-bus", },
  17. { .name = "cpm", },
  18. { .name = "localbus", },
  19. { .compatible = "gianfar", },
  20. { .compatible = "fsl,qe", },
  21. { .compatible = "fsl,cpm2", },
  22. { .compatible = "fsl,srio", },
  23. /* So that the DMA channel nodes can be probed individually: */
  24. { .compatible = "fsl,eloplus-dma", },
  25. /* For the PMC driver */
  26. { .compatible = "fsl,mpc8548-guts", },
  27. /* Probably unnecessary? */
  28. { .compatible = "gpio-leds", },
  29. /* For all PCI controllers */
  30. { .compatible = "fsl,mpc8540-pci", },
  31. { .compatible = "fsl,mpc8548-pcie", },
  32. { .compatible = "fsl,p1022-pcie", },
  33. { .compatible = "fsl,p1010-pcie", },
  34. { .compatible = "fsl,p1023-pcie", },
  35. { .compatible = "fsl,p4080-pcie", },
  36. { .compatible = "fsl,qoriq-pcie-v2.4", },
  37. { .compatible = "fsl,qoriq-pcie-v2.3", },
  38. { .compatible = "fsl,qoriq-pcie-v2.2", },
  39. { .compatible = "fsl,fman", },
  40. {},
  41. };
  42. int __init mpc85xx_common_publish_devices(void)
  43. {
  44. return of_platform_bus_probe(NULL, mpc85xx_common_ids, NULL);
  45. }
  46. #ifdef CONFIG_CPM2
  47. static void cpm2_cascade(struct irq_desc *desc)
  48. {
  49. struct irq_chip *chip = irq_desc_get_chip(desc);
  50. int cascade_irq;
  51. while ((cascade_irq = cpm2_get_irq()) >= 0)
  52. generic_handle_irq(cascade_irq);
  53. chip->irq_eoi(&desc->irq_data);
  54. }
  55. void __init mpc85xx_cpm2_pic_init(void)
  56. {
  57. struct device_node *np;
  58. int irq;
  59. /* Setup CPM2 PIC */
  60. np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
  61. if (np == NULL) {
  62. printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
  63. return;
  64. }
  65. irq = irq_of_parse_and_map(np, 0);
  66. if (irq == NO_IRQ) {
  67. of_node_put(np);
  68. printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
  69. return;
  70. }
  71. cpm2_pic_init(np);
  72. of_node_put(np);
  73. irq_set_chained_handler(irq, cpm2_cascade);
  74. }
  75. #endif
  76. #ifdef CONFIG_QUICC_ENGINE
  77. void __init mpc85xx_qe_init(void)
  78. {
  79. struct device_node *np;
  80. np = of_find_compatible_node(NULL, NULL, "fsl,qe");
  81. if (!np) {
  82. np = of_find_node_by_name(NULL, "qe");
  83. if (!np) {
  84. pr_err("%s: Could not find Quicc Engine node\n",
  85. __func__);
  86. return;
  87. }
  88. }
  89. if (!of_device_is_available(np)) {
  90. of_node_put(np);
  91. return;
  92. }
  93. qe_reset();
  94. of_node_put(np);
  95. }
  96. void __init mpc85xx_qe_par_io_init(void)
  97. {
  98. struct device_node *np;
  99. np = of_find_node_by_name(NULL, "par_io");
  100. if (np) {
  101. struct device_node *ucc;
  102. par_io_init(np);
  103. of_node_put(np);
  104. for_each_node_by_name(ucc, "ucc")
  105. par_io_of_config(ucc);
  106. }
  107. }
  108. #endif