sbc8548.c 3.2 KB

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  1. /*
  2. * Wind River SBC8548 setup and early boot code.
  3. *
  4. * Copyright 2007 Wind River Systems Inc.
  5. *
  6. * By Paul Gortmaker (see MAINTAINERS for contact information)
  7. *
  8. * Based largely on the MPC8548CDS support - Copyright 2005 Freescale Inc.
  9. *
  10. *
  11. * This program is free software; you can redistribute it and/or modify it
  12. * under the terms of the GNU General Public License as published by the
  13. * Free Software Foundation; either version 2 of the License, or (at your
  14. * option) any later version.
  15. */
  16. #include <linux/stddef.h>
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/errno.h>
  20. #include <linux/reboot.h>
  21. #include <linux/pci.h>
  22. #include <linux/kdev_t.h>
  23. #include <linux/major.h>
  24. #include <linux/console.h>
  25. #include <linux/delay.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/initrd.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/fsl_devices.h>
  30. #include <linux/of_platform.h>
  31. #include <asm/pgtable.h>
  32. #include <asm/page.h>
  33. #include <linux/atomic.h>
  34. #include <asm/time.h>
  35. #include <asm/io.h>
  36. #include <asm/machdep.h>
  37. #include <asm/ipic.h>
  38. #include <asm/pci-bridge.h>
  39. #include <asm/irq.h>
  40. #include <mm/mmu_decl.h>
  41. #include <asm/prom.h>
  42. #include <asm/udbg.h>
  43. #include <asm/mpic.h>
  44. #include <sysdev/fsl_soc.h>
  45. #include <sysdev/fsl_pci.h>
  46. #include "mpc85xx.h"
  47. static int sbc_rev;
  48. static void __init sbc8548_pic_init(void)
  49. {
  50. struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
  51. 0, 256, " OpenPIC ");
  52. BUG_ON(mpic == NULL);
  53. mpic_init(mpic);
  54. }
  55. /* Extract the HW Rev from the EPLD on the board */
  56. static int __init sbc8548_hw_rev(void)
  57. {
  58. struct device_node *np;
  59. struct resource res;
  60. unsigned int *rev;
  61. int board_rev = 0;
  62. np = of_find_compatible_node(NULL, NULL, "hw-rev");
  63. if (np == NULL) {
  64. printk("No HW-REV found in DTB.\n");
  65. return -ENODEV;
  66. }
  67. of_address_to_resource(np, 0, &res);
  68. of_node_put(np);
  69. rev = ioremap(res.start,sizeof(unsigned int));
  70. board_rev = (*rev) >> 28;
  71. iounmap(rev);
  72. return board_rev;
  73. }
  74. /*
  75. * Setup the architecture
  76. */
  77. static void __init sbc8548_setup_arch(void)
  78. {
  79. if (ppc_md.progress)
  80. ppc_md.progress("sbc8548_setup_arch()", 0);
  81. fsl_pci_assign_primary();
  82. sbc_rev = sbc8548_hw_rev();
  83. }
  84. static void sbc8548_show_cpuinfo(struct seq_file *m)
  85. {
  86. uint pvid, svid, phid1;
  87. pvid = mfspr(SPRN_PVR);
  88. svid = mfspr(SPRN_SVR);
  89. seq_printf(m, "Vendor\t\t: Wind River\n");
  90. seq_printf(m, "Machine\t\t: SBC8548 v%d\n", sbc_rev);
  91. seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
  92. seq_printf(m, "SVR\t\t: 0x%x\n", svid);
  93. /* Display cpu Pll setting */
  94. phid1 = mfspr(SPRN_HID1);
  95. seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
  96. }
  97. machine_arch_initcall(sbc8548, mpc85xx_common_publish_devices);
  98. /*
  99. * Called very early, device-tree isn't unflattened
  100. */
  101. static int __init sbc8548_probe(void)
  102. {
  103. unsigned long root = of_get_flat_dt_root();
  104. return of_flat_dt_is_compatible(root, "SBC8548");
  105. }
  106. define_machine(sbc8548) {
  107. .name = "SBC8548",
  108. .probe = sbc8548_probe,
  109. .setup_arch = sbc8548_setup_arch,
  110. .init_IRQ = sbc8548_pic_init,
  111. .show_cpuinfo = sbc8548_show_cpuinfo,
  112. .get_irq = mpic_get_irq,
  113. .restart = fsl_rstcr_restart,
  114. #ifdef CONFIG_PCI
  115. .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
  116. .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
  117. #endif
  118. .calibrate_decr = generic_calibrate_decr,
  119. .progress = udbg_progress,
  120. };