ep88xc.c 4.4 KB

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  1. /*
  2. * Platform setup for the Embedded Planet EP88xC board
  3. *
  4. * Author: Scott Wood <scottwood@freescale.com>
  5. * Copyright 2007 Freescale Semiconductor, Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public License
  8. * version 2. This program is licensed "as is" without any warranty of any
  9. * kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/of_address.h>
  13. #include <linux/of_fdt.h>
  14. #include <linux/of_platform.h>
  15. #include <asm/machdep.h>
  16. #include <asm/io.h>
  17. #include <asm/udbg.h>
  18. #include <asm/cpm1.h>
  19. #include "mpc8xx.h"
  20. struct cpm_pin {
  21. int port, pin, flags;
  22. };
  23. static struct cpm_pin ep88xc_pins[] = {
  24. /* SMC1 */
  25. {1, 24, CPM_PIN_INPUT}, /* RX */
  26. {1, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
  27. /* SCC2 */
  28. {0, 12, CPM_PIN_INPUT}, /* TX */
  29. {0, 13, CPM_PIN_INPUT}, /* RX */
  30. {2, 8, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CD */
  31. {2, 9, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CTS */
  32. {2, 14, CPM_PIN_INPUT}, /* RTS */
  33. /* MII1 */
  34. {0, 0, CPM_PIN_INPUT},
  35. {0, 1, CPM_PIN_INPUT},
  36. {0, 2, CPM_PIN_INPUT},
  37. {0, 3, CPM_PIN_INPUT},
  38. {0, 4, CPM_PIN_OUTPUT},
  39. {0, 10, CPM_PIN_OUTPUT},
  40. {0, 11, CPM_PIN_OUTPUT},
  41. {1, 19, CPM_PIN_INPUT},
  42. {1, 31, CPM_PIN_INPUT},
  43. {2, 12, CPM_PIN_INPUT},
  44. {2, 13, CPM_PIN_INPUT},
  45. {3, 8, CPM_PIN_INPUT},
  46. {4, 30, CPM_PIN_OUTPUT},
  47. {4, 31, CPM_PIN_OUTPUT},
  48. /* MII2 */
  49. {4, 14, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  50. {4, 15, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  51. {4, 16, CPM_PIN_OUTPUT},
  52. {4, 17, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  53. {4, 18, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  54. {4, 19, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  55. {4, 20, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  56. {4, 21, CPM_PIN_OUTPUT},
  57. {4, 22, CPM_PIN_OUTPUT},
  58. {4, 23, CPM_PIN_OUTPUT},
  59. {4, 24, CPM_PIN_OUTPUT},
  60. {4, 25, CPM_PIN_OUTPUT},
  61. {4, 26, CPM_PIN_OUTPUT},
  62. {4, 27, CPM_PIN_OUTPUT},
  63. {4, 28, CPM_PIN_OUTPUT},
  64. {4, 29, CPM_PIN_OUTPUT},
  65. /* USB */
  66. {0, 6, CPM_PIN_INPUT}, /* CLK2 */
  67. {0, 14, CPM_PIN_INPUT}, /* USBOE */
  68. {0, 15, CPM_PIN_INPUT}, /* USBRXD */
  69. {2, 6, CPM_PIN_OUTPUT}, /* USBTXN */
  70. {2, 7, CPM_PIN_OUTPUT}, /* USBTXP */
  71. {2, 10, CPM_PIN_INPUT}, /* USBRXN */
  72. {2, 11, CPM_PIN_INPUT}, /* USBRXP */
  73. /* Misc */
  74. {1, 26, CPM_PIN_INPUT}, /* BRGO2 */
  75. {1, 27, CPM_PIN_INPUT}, /* BRGO1 */
  76. };
  77. static void __init init_ioports(void)
  78. {
  79. int i;
  80. for (i = 0; i < ARRAY_SIZE(ep88xc_pins); i++) {
  81. struct cpm_pin *pin = &ep88xc_pins[i];
  82. cpm1_set_pin(pin->port, pin->pin, pin->flags);
  83. }
  84. cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
  85. cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_TX); /* USB */
  86. cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_RX);
  87. cpm1_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
  88. cpm1_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
  89. }
  90. static u8 __iomem *ep88xc_bcsr;
  91. #define BCSR7_SCC2_ENABLE 0x10
  92. #define BCSR8_PHY1_ENABLE 0x80
  93. #define BCSR8_PHY1_POWER 0x40
  94. #define BCSR8_PHY2_ENABLE 0x20
  95. #define BCSR8_PHY2_POWER 0x10
  96. #define BCSR9_USB_ENABLE 0x80
  97. #define BCSR9_USB_POWER 0x40
  98. #define BCSR9_USB_HOST 0x20
  99. #define BCSR9_USB_FULL_SPEED_TARGET 0x10
  100. static void __init ep88xc_setup_arch(void)
  101. {
  102. struct device_node *np;
  103. cpm_reset();
  104. init_ioports();
  105. np = of_find_compatible_node(NULL, NULL, "fsl,ep88xc-bcsr");
  106. if (!np) {
  107. printk(KERN_CRIT "Could not find fsl,ep88xc-bcsr node\n");
  108. return;
  109. }
  110. ep88xc_bcsr = of_iomap(np, 0);
  111. of_node_put(np);
  112. if (!ep88xc_bcsr) {
  113. printk(KERN_CRIT "Could not remap BCSR\n");
  114. return;
  115. }
  116. setbits8(&ep88xc_bcsr[7], BCSR7_SCC2_ENABLE);
  117. setbits8(&ep88xc_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER |
  118. BCSR8_PHY2_ENABLE | BCSR8_PHY2_POWER);
  119. }
  120. static int __init ep88xc_probe(void)
  121. {
  122. unsigned long root = of_get_flat_dt_root();
  123. return of_flat_dt_is_compatible(root, "fsl,ep88xc");
  124. }
  125. static const struct of_device_id of_bus_ids[] __initconst = {
  126. { .name = "soc", },
  127. { .name = "cpm", },
  128. { .name = "localbus", },
  129. {},
  130. };
  131. static int __init declare_of_platform_devices(void)
  132. {
  133. /* Publish the QE devices */
  134. of_platform_bus_probe(NULL, of_bus_ids, NULL);
  135. return 0;
  136. }
  137. machine_device_initcall(ep88xc, declare_of_platform_devices);
  138. define_machine(ep88xc) {
  139. .name = "Embedded Planet EP88xC",
  140. .probe = ep88xc_probe,
  141. .setup_arch = ep88xc_setup_arch,
  142. .init_IRQ = mpc8xx_pics_init,
  143. .get_irq = mpc8xx_get_irq,
  144. .restart = mpc8xx_restart,
  145. .calibrate_decr = mpc8xx_calibrate_decr,
  146. .set_rtc_time = mpc8xx_set_rtc_time,
  147. .get_rtc_time = mpc8xx_get_rtc_time,
  148. .progress = udbg_progress,
  149. };