Kconfig 9.5 KB

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  1. menu "Platform support"
  2. source "arch/powerpc/platforms/powernv/Kconfig"
  3. source "arch/powerpc/platforms/pseries/Kconfig"
  4. source "arch/powerpc/platforms/chrp/Kconfig"
  5. source "arch/powerpc/platforms/512x/Kconfig"
  6. source "arch/powerpc/platforms/52xx/Kconfig"
  7. source "arch/powerpc/platforms/powermac/Kconfig"
  8. source "arch/powerpc/platforms/maple/Kconfig"
  9. source "arch/powerpc/platforms/pasemi/Kconfig"
  10. source "arch/powerpc/platforms/ps3/Kconfig"
  11. source "arch/powerpc/platforms/cell/Kconfig"
  12. source "arch/powerpc/platforms/8xx/Kconfig"
  13. source "arch/powerpc/platforms/82xx/Kconfig"
  14. source "arch/powerpc/platforms/83xx/Kconfig"
  15. source "arch/powerpc/platforms/85xx/Kconfig"
  16. source "arch/powerpc/platforms/86xx/Kconfig"
  17. source "arch/powerpc/platforms/embedded6xx/Kconfig"
  18. source "arch/powerpc/platforms/44x/Kconfig"
  19. source "arch/powerpc/platforms/40x/Kconfig"
  20. source "arch/powerpc/platforms/amigaone/Kconfig"
  21. config KVM_GUEST
  22. bool "KVM Guest support"
  23. default n
  24. select EPAPR_PARAVIRT
  25. ---help---
  26. This option enables various optimizations for running under the KVM
  27. hypervisor. Overhead for the kernel when not running inside KVM should
  28. be minimal.
  29. In case of doubt, say Y
  30. config EPAPR_PARAVIRT
  31. bool "ePAPR para-virtualization support"
  32. default n
  33. help
  34. Enables ePAPR para-virtualization support for guests.
  35. In case of doubt, say Y
  36. config PPC_NATIVE
  37. bool
  38. depends on 6xx || PPC64
  39. help
  40. Support for running natively on the hardware, i.e. without
  41. a hypervisor. This option is not user-selectable but should
  42. be selected by all platforms that need it.
  43. config PPC_OF_BOOT_TRAMPOLINE
  44. bool "Support booting from Open Firmware or yaboot"
  45. depends on 6xx || PPC64
  46. default y
  47. help
  48. Support from booting from Open Firmware or yaboot using an
  49. Open Firmware client interface. This enables the kernel to
  50. communicate with open firmware to retrieve system information
  51. such as the device tree.
  52. In case of doubt, say Y
  53. config UDBG_RTAS_CONSOLE
  54. bool "RTAS based debug console"
  55. depends on PPC_RTAS
  56. default n
  57. config PPC_SMP_MUXED_IPI
  58. bool
  59. help
  60. Select this opton if your platform supports SMP and your
  61. interrupt controller provides less than 4 interrupts to each
  62. cpu. This will enable the generic code to multiplex the 4
  63. messages on to one ipi.
  64. config IPIC
  65. bool
  66. default n
  67. config MPIC
  68. bool
  69. default n
  70. config MPIC_TIMER
  71. bool "MPIC Global Timer"
  72. depends on MPIC && FSL_SOC
  73. default n
  74. help
  75. The MPIC global timer is a hardware timer inside the
  76. Freescale PIC complying with OpenPIC standard. When the
  77. specified interval times out, the hardware timer generates
  78. an interrupt. The driver currently is only tested on fsl
  79. chip, but it can potentially support other global timers
  80. complying with the OpenPIC standard.
  81. config FSL_MPIC_TIMER_WAKEUP
  82. tristate "Freescale MPIC global timer wakeup driver"
  83. depends on FSL_SOC && MPIC_TIMER && PM
  84. default n
  85. help
  86. The driver provides a way to wake up the system by MPIC
  87. timer.
  88. e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup"
  89. config PPC_EPAPR_HV_PIC
  90. bool
  91. default n
  92. select EPAPR_PARAVIRT
  93. config MPIC_WEIRD
  94. bool
  95. default n
  96. config MPIC_MSGR
  97. bool "MPIC message register support"
  98. depends on MPIC
  99. default n
  100. help
  101. Enables support for the MPIC message registers. These
  102. registers are used for inter-processor communication.
  103. config PPC_I8259
  104. bool
  105. default n
  106. config U3_DART
  107. bool
  108. depends on PPC64
  109. default n
  110. config PPC_RTAS
  111. bool
  112. default n
  113. config RTAS_ERROR_LOGGING
  114. bool
  115. depends on PPC_RTAS
  116. default n
  117. config PPC_RTAS_DAEMON
  118. bool
  119. depends on PPC_RTAS
  120. default n
  121. config RTAS_PROC
  122. bool "Proc interface to RTAS"
  123. depends on PPC_RTAS && PROC_FS
  124. default y
  125. config RTAS_FLASH
  126. tristate "Firmware flash interface"
  127. depends on PPC64 && RTAS_PROC
  128. config MMIO_NVRAM
  129. bool
  130. default n
  131. config MPIC_U3_HT_IRQS
  132. bool
  133. default n
  134. config MPIC_BROKEN_REGREAD
  135. bool
  136. depends on MPIC
  137. help
  138. This option enables a MPIC driver workaround for some chips
  139. that have a bug that causes some interrupt source information
  140. to not read back properly. It is safe to use on other chips as
  141. well, but enabling it uses about 8KB of memory to keep copies
  142. of the register contents in software.
  143. config IBMVIO
  144. depends on PPC_PSERIES
  145. bool
  146. default y
  147. config IBMEBUS
  148. depends on PPC_PSERIES
  149. bool "Support for GX bus based adapters"
  150. help
  151. Bus device driver for GX bus based adapters.
  152. config EEH
  153. bool
  154. depends on (PPC_POWERNV || PPC_PSERIES) && PCI
  155. default y
  156. config PPC_MPC106
  157. bool
  158. default n
  159. config PPC_970_NAP
  160. bool
  161. default n
  162. config PPC_P7_NAP
  163. bool
  164. default n
  165. config PPC_INDIRECT_PIO
  166. bool
  167. select GENERIC_IOMAP
  168. config PPC_INDIRECT_MMIO
  169. bool
  170. config PPC_IO_WORKAROUNDS
  171. bool
  172. source "drivers/cpufreq/Kconfig"
  173. menu "CPUIdle driver"
  174. source "drivers/cpuidle/Kconfig"
  175. endmenu
  176. config PPC601_SYNC_FIX
  177. bool "Workarounds for PPC601 bugs"
  178. depends on 6xx && PPC_PMAC
  179. help
  180. Some versions of the PPC601 (the first PowerPC chip) have bugs which
  181. mean that extra synchronization instructions are required near
  182. certain instructions, typically those that make major changes to the
  183. CPU state. These extra instructions reduce performance slightly.
  184. If you say N here, these extra instructions will not be included,
  185. resulting in a kernel which will run faster but may not run at all
  186. on some systems with the PPC601 chip.
  187. If in doubt, say Y here.
  188. config TAU
  189. bool "On-chip CPU temperature sensor support"
  190. depends on 6xx
  191. help
  192. G3 and G4 processors have an on-chip temperature sensor called the
  193. 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
  194. temperature within 2-4 degrees Celsius. This option shows the current
  195. on-die temperature in /proc/cpuinfo if the cpu supports it.
  196. Unfortunately, on some chip revisions, this sensor is very inaccurate
  197. and in many cases, does not work at all, so don't assume the cpu
  198. temp is actually what /proc/cpuinfo says it is.
  199. config TAU_INT
  200. bool "Interrupt driven TAU driver (DANGEROUS)"
  201. depends on TAU
  202. ---help---
  203. The TAU supports an interrupt driven mode which causes an interrupt
  204. whenever the temperature goes out of range. This is the fastest way
  205. to get notified the temp has exceeded a range. With this option off,
  206. a timer is used to re-check the temperature periodically.
  207. However, on some cpus it appears that the TAU interrupt hardware
  208. is buggy and can cause a situation which would lead unexplained hard
  209. lockups.
  210. Unless you are extending the TAU driver, or enjoy kernel/hardware
  211. debugging, leave this option off.
  212. config TAU_AVERAGE
  213. bool "Average high and low temp"
  214. depends on TAU
  215. ---help---
  216. The TAU hardware can compare the temperature to an upper and lower
  217. bound. The default behavior is to show both the upper and lower
  218. bound in /proc/cpuinfo. If the range is large, the temperature is
  219. either changing a lot, or the TAU hardware is broken (likely on some
  220. G4's). If the range is small (around 4 degrees), the temperature is
  221. relatively stable. If you say Y here, a single temperature value,
  222. halfway between the upper and lower bounds, will be reported in
  223. /proc/cpuinfo.
  224. If in doubt, say N here.
  225. config QUICC_ENGINE
  226. bool "Freescale QUICC Engine (QE) Support"
  227. depends on FSL_SOC && PPC32
  228. select PPC_LIB_RHEAP
  229. select CRC32
  230. help
  231. The QUICC Engine (QE) is a new generation of communications
  232. coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
  233. Selecting this option means that you wish to build a kernel
  234. for a machine with a QE coprocessor.
  235. config QE_GPIO
  236. bool "QE GPIO support"
  237. depends on QUICC_ENGINE
  238. select ARCH_REQUIRE_GPIOLIB
  239. help
  240. Say Y here if you're going to use hardware that connects to the
  241. QE GPIOs.
  242. config CPM2
  243. bool "Enable support for the CPM2 (Communications Processor Module)"
  244. depends on (FSL_SOC_BOOKE && PPC32) || 8260
  245. select CPM
  246. select PPC_LIB_RHEAP
  247. select PPC_PCI_CHOICE
  248. select ARCH_REQUIRE_GPIOLIB
  249. help
  250. The CPM2 (Communications Processor Module) is a coprocessor on
  251. embedded CPUs made by Freescale. Selecting this option means that
  252. you wish to build a kernel for a machine with a CPM2 coprocessor
  253. on it (826x, 827x, 8560).
  254. config AXON_RAM
  255. tristate "Axon DDR2 memory device driver"
  256. depends on PPC_IBM_CELL_BLADE && BLOCK
  257. default m
  258. help
  259. It registers one block device per Axon's DDR2 memory bank found
  260. on a system. Block devices are called axonram?, their major and
  261. minor numbers are available in /proc/devices, /proc/partitions or
  262. in /sys/block/axonram?/dev.
  263. config FSL_ULI1575
  264. bool
  265. default n
  266. select GENERIC_ISA_DMA
  267. help
  268. Supports for the ULI1575 PCIe south bridge that exists on some
  269. Freescale reference boards. The boards all use the ULI in pretty
  270. much the same way.
  271. config CPM
  272. bool
  273. config OF_RTC
  274. bool
  275. help
  276. Uses information from the OF or flattened device tree to instantiate
  277. platform devices for direct mapped RTC chips like the DS1742 or DS1743.
  278. config SIMPLE_GPIO
  279. bool "Support for simple, memory-mapped GPIO controllers"
  280. depends on PPC
  281. select ARCH_REQUIRE_GPIOLIB
  282. help
  283. Say Y here to support simple, memory-mapped GPIO controllers.
  284. These are usually BCSRs used to control board's switches, LEDs,
  285. chip-selects, Ethernet/USB PHY's power and various other small
  286. on-board peripherals.
  287. config MCU_MPC8349EMITX
  288. bool "MPC8349E-mITX MCU driver"
  289. depends on I2C=y && PPC_83xx
  290. select ARCH_REQUIRE_GPIOLIB
  291. help
  292. Say Y here to enable soft power-off functionality on the Freescale
  293. boards with the MPC8349E-mITX-compatible MCU chips. This driver will
  294. also register MCU GPIOs with the generic GPIO API, so you'll able
  295. to use MCU pins as GPIOs.
  296. config XILINX_PCI
  297. bool "Xilinx PCI host bridge support"
  298. depends on PCI && XILINX_VIRTEX
  299. endmenu