setup.c 22 KB

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  1. /*
  2. * 64-bit pSeries and RS/6000 setup code.
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Adapted from 'alpha' version by Gary Thomas
  6. * Modified by Cort Dougan (cort@cs.nmt.edu)
  7. * Modified by PPC64 Team, IBM Corp
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. /*
  15. * bootup setup stuff..
  16. */
  17. #include <linux/cpu.h>
  18. #include <linux/errno.h>
  19. #include <linux/sched.h>
  20. #include <linux/kernel.h>
  21. #include <linux/mm.h>
  22. #include <linux/stddef.h>
  23. #include <linux/unistd.h>
  24. #include <linux/user.h>
  25. #include <linux/tty.h>
  26. #include <linux/major.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/reboot.h>
  29. #include <linux/init.h>
  30. #include <linux/ioport.h>
  31. #include <linux/console.h>
  32. #include <linux/pci.h>
  33. #include <linux/utsname.h>
  34. #include <linux/adb.h>
  35. #include <linux/export.h>
  36. #include <linux/delay.h>
  37. #include <linux/irq.h>
  38. #include <linux/seq_file.h>
  39. #include <linux/root_dev.h>
  40. #include <linux/of.h>
  41. #include <linux/of_pci.h>
  42. #include <linux/kexec.h>
  43. #include <asm/mmu.h>
  44. #include <asm/processor.h>
  45. #include <asm/io.h>
  46. #include <asm/pgtable.h>
  47. #include <asm/prom.h>
  48. #include <asm/rtas.h>
  49. #include <asm/pci-bridge.h>
  50. #include <asm/iommu.h>
  51. #include <asm/dma.h>
  52. #include <asm/machdep.h>
  53. #include <asm/irq.h>
  54. #include <asm/time.h>
  55. #include <asm/nvram.h>
  56. #include <asm/pmc.h>
  57. #include <asm/mpic.h>
  58. #include <asm/xics.h>
  59. #include <asm/ppc-pci.h>
  60. #include <asm/i8259.h>
  61. #include <asm/udbg.h>
  62. #include <asm/smp.h>
  63. #include <asm/firmware.h>
  64. #include <asm/eeh.h>
  65. #include <asm/reg.h>
  66. #include <asm/plpar_wrappers.h>
  67. #include "pseries.h"
  68. int CMO_PrPSP = -1;
  69. int CMO_SecPSP = -1;
  70. unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
  71. EXPORT_SYMBOL(CMO_PageSize);
  72. int fwnmi_active; /* TRUE if an FWNMI handler is present */
  73. static struct device_node *pSeries_mpic_node;
  74. static void pSeries_show_cpuinfo(struct seq_file *m)
  75. {
  76. struct device_node *root;
  77. const char *model = "";
  78. root = of_find_node_by_path("/");
  79. if (root)
  80. model = of_get_property(root, "model", NULL);
  81. seq_printf(m, "machine\t\t: CHRP %s\n", model);
  82. of_node_put(root);
  83. }
  84. /* Initialize firmware assisted non-maskable interrupts if
  85. * the firmware supports this feature.
  86. */
  87. static void __init fwnmi_init(void)
  88. {
  89. unsigned long system_reset_addr, machine_check_addr;
  90. int ibm_nmi_register = rtas_token("ibm,nmi-register");
  91. if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
  92. return;
  93. /* If the kernel's not linked at zero we point the firmware at low
  94. * addresses anyway, and use a trampoline to get to the real code. */
  95. system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START;
  96. machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
  97. if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
  98. machine_check_addr))
  99. fwnmi_active = 1;
  100. }
  101. static void pseries_8259_cascade(struct irq_desc *desc)
  102. {
  103. struct irq_chip *chip = irq_desc_get_chip(desc);
  104. unsigned int cascade_irq = i8259_irq();
  105. if (cascade_irq != NO_IRQ)
  106. generic_handle_irq(cascade_irq);
  107. chip->irq_eoi(&desc->irq_data);
  108. }
  109. static void __init pseries_setup_i8259_cascade(void)
  110. {
  111. struct device_node *np, *old, *found = NULL;
  112. unsigned int cascade;
  113. const u32 *addrp;
  114. unsigned long intack = 0;
  115. int naddr;
  116. for_each_node_by_type(np, "interrupt-controller") {
  117. if (of_device_is_compatible(np, "chrp,iic")) {
  118. found = np;
  119. break;
  120. }
  121. }
  122. if (found == NULL) {
  123. printk(KERN_DEBUG "pic: no ISA interrupt controller\n");
  124. return;
  125. }
  126. cascade = irq_of_parse_and_map(found, 0);
  127. if (cascade == NO_IRQ) {
  128. printk(KERN_ERR "pic: failed to map cascade interrupt");
  129. return;
  130. }
  131. pr_debug("pic: cascade mapped to irq %d\n", cascade);
  132. for (old = of_node_get(found); old != NULL ; old = np) {
  133. np = of_get_parent(old);
  134. of_node_put(old);
  135. if (np == NULL)
  136. break;
  137. if (strcmp(np->name, "pci") != 0)
  138. continue;
  139. addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
  140. if (addrp == NULL)
  141. continue;
  142. naddr = of_n_addr_cells(np);
  143. intack = addrp[naddr-1];
  144. if (naddr > 1)
  145. intack |= ((unsigned long)addrp[naddr-2]) << 32;
  146. }
  147. if (intack)
  148. printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
  149. i8259_init(found, intack);
  150. of_node_put(found);
  151. irq_set_chained_handler(cascade, pseries_8259_cascade);
  152. }
  153. static void __init pseries_mpic_init_IRQ(void)
  154. {
  155. struct device_node *np;
  156. const unsigned int *opprop;
  157. unsigned long openpic_addr = 0;
  158. int naddr, n, i, opplen;
  159. struct mpic *mpic;
  160. np = of_find_node_by_path("/");
  161. naddr = of_n_addr_cells(np);
  162. opprop = of_get_property(np, "platform-open-pic", &opplen);
  163. if (opprop != NULL) {
  164. openpic_addr = of_read_number(opprop, naddr);
  165. printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
  166. }
  167. of_node_put(np);
  168. BUG_ON(openpic_addr == 0);
  169. /* Setup the openpic driver */
  170. mpic = mpic_alloc(pSeries_mpic_node, openpic_addr,
  171. MPIC_NO_RESET, 16, 0, " MPIC ");
  172. BUG_ON(mpic == NULL);
  173. /* Add ISUs */
  174. opplen /= sizeof(u32);
  175. for (n = 0, i = naddr; i < opplen; i += naddr, n++) {
  176. unsigned long isuaddr = of_read_number(opprop + i, naddr);
  177. mpic_assign_isu(mpic, n, isuaddr);
  178. }
  179. /* Setup top-level get_irq */
  180. ppc_md.get_irq = mpic_get_irq;
  181. /* All ISUs are setup, complete initialization */
  182. mpic_init(mpic);
  183. /* Look for cascade */
  184. pseries_setup_i8259_cascade();
  185. }
  186. static void __init pseries_xics_init_IRQ(void)
  187. {
  188. xics_init();
  189. pseries_setup_i8259_cascade();
  190. }
  191. static void pseries_lpar_enable_pmcs(void)
  192. {
  193. unsigned long set, reset;
  194. set = 1UL << 63;
  195. reset = 0;
  196. plpar_hcall_norets(H_PERFMON, set, reset);
  197. }
  198. static void __init pseries_discover_pic(void)
  199. {
  200. struct device_node *np;
  201. const char *typep;
  202. for_each_node_by_name(np, "interrupt-controller") {
  203. typep = of_get_property(np, "compatible", NULL);
  204. if (strstr(typep, "open-pic")) {
  205. pSeries_mpic_node = of_node_get(np);
  206. ppc_md.init_IRQ = pseries_mpic_init_IRQ;
  207. setup_kexec_cpu_down_mpic();
  208. smp_init_pseries_mpic();
  209. return;
  210. } else if (strstr(typep, "ppc-xicp")) {
  211. ppc_md.init_IRQ = pseries_xics_init_IRQ;
  212. setup_kexec_cpu_down_xics();
  213. smp_init_pseries_xics();
  214. return;
  215. }
  216. }
  217. printk(KERN_ERR "pSeries_discover_pic: failed to recognize"
  218. " interrupt-controller\n");
  219. }
  220. static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data)
  221. {
  222. struct of_reconfig_data *rd = data;
  223. struct device_node *parent, *np = rd->dn;
  224. struct pci_dn *pdn;
  225. int err = NOTIFY_OK;
  226. switch (action) {
  227. case OF_RECONFIG_ATTACH_NODE:
  228. parent = of_get_parent(np);
  229. pdn = parent ? PCI_DN(parent) : NULL;
  230. if (pdn) {
  231. /* Create pdn and EEH device */
  232. update_dn_pci_info(np, pdn->phb);
  233. eeh_dev_init(PCI_DN(np), pdn->phb);
  234. }
  235. of_node_put(parent);
  236. break;
  237. case OF_RECONFIG_DETACH_NODE:
  238. pdn = PCI_DN(np);
  239. if (pdn)
  240. list_del(&pdn->list);
  241. break;
  242. default:
  243. err = NOTIFY_DONE;
  244. break;
  245. }
  246. return err;
  247. }
  248. static struct notifier_block pci_dn_reconfig_nb = {
  249. .notifier_call = pci_dn_reconfig_notifier,
  250. };
  251. struct kmem_cache *dtl_cache;
  252. #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
  253. /*
  254. * Allocate space for the dispatch trace log for all possible cpus
  255. * and register the buffers with the hypervisor. This is used for
  256. * computing time stolen by the hypervisor.
  257. */
  258. static int alloc_dispatch_logs(void)
  259. {
  260. int cpu, ret;
  261. struct paca_struct *pp;
  262. struct dtl_entry *dtl;
  263. if (!firmware_has_feature(FW_FEATURE_SPLPAR))
  264. return 0;
  265. if (!dtl_cache)
  266. return 0;
  267. for_each_possible_cpu(cpu) {
  268. pp = &paca[cpu];
  269. dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL);
  270. if (!dtl) {
  271. pr_warn("Failed to allocate dispatch trace log for cpu %d\n",
  272. cpu);
  273. pr_warn("Stolen time statistics will be unreliable\n");
  274. break;
  275. }
  276. pp->dtl_ridx = 0;
  277. pp->dispatch_log = dtl;
  278. pp->dispatch_log_end = dtl + N_DISPATCH_LOG;
  279. pp->dtl_curr = dtl;
  280. }
  281. /* Register the DTL for the current (boot) cpu */
  282. dtl = get_paca()->dispatch_log;
  283. get_paca()->dtl_ridx = 0;
  284. get_paca()->dtl_curr = dtl;
  285. get_paca()->lppaca_ptr->dtl_idx = 0;
  286. /* hypervisor reads buffer length from this field */
  287. dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
  288. ret = register_dtl(hard_smp_processor_id(), __pa(dtl));
  289. if (ret)
  290. pr_err("WARNING: DTL registration of cpu %d (hw %d) failed "
  291. "with %d\n", smp_processor_id(),
  292. hard_smp_processor_id(), ret);
  293. get_paca()->lppaca_ptr->dtl_enable_mask = 2;
  294. return 0;
  295. }
  296. #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
  297. static inline int alloc_dispatch_logs(void)
  298. {
  299. return 0;
  300. }
  301. #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
  302. static int alloc_dispatch_log_kmem_cache(void)
  303. {
  304. dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES,
  305. DISPATCH_LOG_BYTES, 0, NULL);
  306. if (!dtl_cache) {
  307. pr_warn("Failed to create dispatch trace log buffer cache\n");
  308. pr_warn("Stolen time statistics will be unreliable\n");
  309. return 0;
  310. }
  311. return alloc_dispatch_logs();
  312. }
  313. machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache);
  314. static void pseries_lpar_idle(void)
  315. {
  316. /*
  317. * Default handler to go into low thread priority and possibly
  318. * low power mode by cedeing processor to hypervisor
  319. */
  320. /* Indicate to hypervisor that we are idle. */
  321. get_lppaca()->idle = 1;
  322. /*
  323. * Yield the processor to the hypervisor. We return if
  324. * an external interrupt occurs (which are driven prior
  325. * to returning here) or if a prod occurs from another
  326. * processor. When returning here, external interrupts
  327. * are enabled.
  328. */
  329. cede_processor();
  330. get_lppaca()->idle = 0;
  331. }
  332. /*
  333. * Enable relocation on during exceptions. This has partition wide scope and
  334. * may take a while to complete, if it takes longer than one second we will
  335. * just give up rather than wasting any more time on this - if that turns out
  336. * to ever be a problem in practice we can move this into a kernel thread to
  337. * finish off the process later in boot.
  338. */
  339. long pSeries_enable_reloc_on_exc(void)
  340. {
  341. long rc;
  342. unsigned int delay, total_delay = 0;
  343. while (1) {
  344. rc = enable_reloc_on_exceptions();
  345. if (!H_IS_LONG_BUSY(rc))
  346. return rc;
  347. delay = get_longbusy_msecs(rc);
  348. total_delay += delay;
  349. if (total_delay > 1000) {
  350. pr_warn("Warning: Giving up waiting to enable "
  351. "relocation on exceptions (%u msec)!\n",
  352. total_delay);
  353. return rc;
  354. }
  355. mdelay(delay);
  356. }
  357. }
  358. EXPORT_SYMBOL(pSeries_enable_reloc_on_exc);
  359. long pSeries_disable_reloc_on_exc(void)
  360. {
  361. long rc;
  362. while (1) {
  363. rc = disable_reloc_on_exceptions();
  364. if (!H_IS_LONG_BUSY(rc))
  365. return rc;
  366. mdelay(get_longbusy_msecs(rc));
  367. }
  368. }
  369. EXPORT_SYMBOL(pSeries_disable_reloc_on_exc);
  370. #ifdef CONFIG_KEXEC
  371. static void pSeries_machine_kexec(struct kimage *image)
  372. {
  373. long rc;
  374. if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
  375. rc = pSeries_disable_reloc_on_exc();
  376. if (rc != H_SUCCESS)
  377. pr_warning("Warning: Failed to disable relocation on "
  378. "exceptions: %ld\n", rc);
  379. }
  380. default_machine_kexec(image);
  381. }
  382. #endif
  383. #ifdef __LITTLE_ENDIAN__
  384. long pseries_big_endian_exceptions(void)
  385. {
  386. long rc;
  387. while (1) {
  388. rc = enable_big_endian_exceptions();
  389. if (!H_IS_LONG_BUSY(rc))
  390. return rc;
  391. mdelay(get_longbusy_msecs(rc));
  392. }
  393. }
  394. static long pseries_little_endian_exceptions(void)
  395. {
  396. long rc;
  397. while (1) {
  398. rc = enable_little_endian_exceptions();
  399. if (!H_IS_LONG_BUSY(rc))
  400. return rc;
  401. mdelay(get_longbusy_msecs(rc));
  402. }
  403. }
  404. #endif
  405. static void __init find_and_init_phbs(void)
  406. {
  407. struct device_node *node;
  408. struct pci_controller *phb;
  409. struct device_node *root = of_find_node_by_path("/");
  410. for_each_child_of_node(root, node) {
  411. if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
  412. strcmp(node->type, "pciex") != 0))
  413. continue;
  414. phb = pcibios_alloc_controller(node);
  415. if (!phb)
  416. continue;
  417. rtas_setup_phb(phb);
  418. pci_process_bridge_OF_ranges(phb, node, 0);
  419. isa_bridge_find_early(phb);
  420. phb->controller_ops = pseries_pci_controller_ops;
  421. }
  422. of_node_put(root);
  423. pci_devs_phb_init();
  424. /*
  425. * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
  426. * in chosen.
  427. */
  428. of_pci_check_probe_only();
  429. }
  430. static void pseries_setup_rfi_flush(void)
  431. {
  432. struct h_cpu_char_result result;
  433. enum l1d_flush_type types;
  434. bool enable;
  435. long rc;
  436. /* Enable by default */
  437. enable = true;
  438. rc = plpar_get_cpu_characteristics(&result);
  439. if (rc == H_SUCCESS) {
  440. types = L1D_FLUSH_NONE;
  441. if (result.character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
  442. types |= L1D_FLUSH_MTTRIG;
  443. if (result.character & H_CPU_CHAR_L1D_FLUSH_ORI30)
  444. types |= L1D_FLUSH_ORI;
  445. /* Use fallback if nothing set in hcall */
  446. if (types == L1D_FLUSH_NONE)
  447. types = L1D_FLUSH_FALLBACK;
  448. if (!(result.behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
  449. enable = false;
  450. } else {
  451. /* Default to fallback if case hcall is not available */
  452. types = L1D_FLUSH_FALLBACK;
  453. }
  454. setup_rfi_flush(types, enable);
  455. }
  456. static void __init pSeries_setup_arch(void)
  457. {
  458. set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
  459. /* Discover PIC type and setup ppc_md accordingly */
  460. pseries_discover_pic();
  461. /* openpic global configuration register (64-bit format). */
  462. /* openpic Interrupt Source Unit pointer (64-bit format). */
  463. /* python0 facility area (mmio) (64-bit format) REAL address. */
  464. /* init to some ~sane value until calibrate_delay() runs */
  465. loops_per_jiffy = 50000000;
  466. fwnmi_init();
  467. pseries_setup_rfi_flush();
  468. /* By default, only probe PCI (can be overridden by rtas_pci) */
  469. pci_add_flags(PCI_PROBE_ONLY);
  470. /* Find and initialize PCI host bridges */
  471. init_pci_config_tokens();
  472. find_and_init_phbs();
  473. of_reconfig_notifier_register(&pci_dn_reconfig_nb);
  474. pSeries_nvram_init();
  475. if (firmware_has_feature(FW_FEATURE_LPAR)) {
  476. vpa_init(boot_cpuid);
  477. ppc_md.power_save = pseries_lpar_idle;
  478. ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
  479. } else {
  480. /* No special idle routine */
  481. ppc_md.enable_pmcs = power4_enable_pmcs;
  482. }
  483. ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
  484. if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
  485. long rc;
  486. rc = pSeries_enable_reloc_on_exc();
  487. if (rc == H_P2) {
  488. pr_info("Relocation on exceptions not supported\n");
  489. } else if (rc != H_SUCCESS) {
  490. pr_warn("Unable to enable relocation on exceptions: "
  491. "%ld\n", rc);
  492. }
  493. }
  494. }
  495. static int __init pSeries_init_panel(void)
  496. {
  497. /* Manually leave the kernel version on the panel. */
  498. #ifdef __BIG_ENDIAN__
  499. ppc_md.progress("Linux ppc64\n", 0);
  500. #else
  501. ppc_md.progress("Linux ppc64le\n", 0);
  502. #endif
  503. ppc_md.progress(init_utsname()->version, 0);
  504. return 0;
  505. }
  506. machine_arch_initcall(pseries, pSeries_init_panel);
  507. static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx)
  508. {
  509. return plpar_hcall_norets(H_SET_DABR, dabr);
  510. }
  511. static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx)
  512. {
  513. /* Have to set at least one bit in the DABRX according to PAPR */
  514. if (dabrx == 0 && dabr == 0)
  515. dabrx = DABRX_USER;
  516. /* PAPR says we can only set kernel and user bits */
  517. dabrx &= DABRX_KERNEL | DABRX_USER;
  518. return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
  519. }
  520. static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx)
  521. {
  522. /* PAPR says we can't set HYP */
  523. dawrx &= ~DAWRX_HYP;
  524. return plapr_set_watchpoint0(dawr, dawrx);
  525. }
  526. #define CMO_CHARACTERISTICS_TOKEN 44
  527. #define CMO_MAXLENGTH 1026
  528. void pSeries_coalesce_init(void)
  529. {
  530. struct hvcall_mpp_x_data mpp_x_data;
  531. if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data))
  532. powerpc_firmware_features |= FW_FEATURE_XCMO;
  533. else
  534. powerpc_firmware_features &= ~FW_FEATURE_XCMO;
  535. }
  536. /**
  537. * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions,
  538. * handle that here. (Stolen from parse_system_parameter_string)
  539. */
  540. static void pSeries_cmo_feature_init(void)
  541. {
  542. char *ptr, *key, *value, *end;
  543. int call_status;
  544. int page_order = IOMMU_PAGE_SHIFT_4K;
  545. pr_debug(" -> fw_cmo_feature_init()\n");
  546. spin_lock(&rtas_data_buf_lock);
  547. memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
  548. call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
  549. NULL,
  550. CMO_CHARACTERISTICS_TOKEN,
  551. __pa(rtas_data_buf),
  552. RTAS_DATA_BUF_SIZE);
  553. if (call_status != 0) {
  554. spin_unlock(&rtas_data_buf_lock);
  555. pr_debug("CMO not available\n");
  556. pr_debug(" <- fw_cmo_feature_init()\n");
  557. return;
  558. }
  559. end = rtas_data_buf + CMO_MAXLENGTH - 2;
  560. ptr = rtas_data_buf + 2; /* step over strlen value */
  561. key = value = ptr;
  562. while (*ptr && (ptr <= end)) {
  563. /* Separate the key and value by replacing '=' with '\0' and
  564. * point the value at the string after the '='
  565. */
  566. if (ptr[0] == '=') {
  567. ptr[0] = '\0';
  568. value = ptr + 1;
  569. } else if (ptr[0] == '\0' || ptr[0] == ',') {
  570. /* Terminate the string containing the key/value pair */
  571. ptr[0] = '\0';
  572. if (key == value) {
  573. pr_debug("Malformed key/value pair\n");
  574. /* Never found a '=', end processing */
  575. break;
  576. }
  577. if (0 == strcmp(key, "CMOPageSize"))
  578. page_order = simple_strtol(value, NULL, 10);
  579. else if (0 == strcmp(key, "PrPSP"))
  580. CMO_PrPSP = simple_strtol(value, NULL, 10);
  581. else if (0 == strcmp(key, "SecPSP"))
  582. CMO_SecPSP = simple_strtol(value, NULL, 10);
  583. value = key = ptr + 1;
  584. }
  585. ptr++;
  586. }
  587. /* Page size is returned as the power of 2 of the page size,
  588. * convert to the page size in bytes before returning
  589. */
  590. CMO_PageSize = 1 << page_order;
  591. pr_debug("CMO_PageSize = %lu\n", CMO_PageSize);
  592. if (CMO_PrPSP != -1 || CMO_SecPSP != -1) {
  593. pr_info("CMO enabled\n");
  594. pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
  595. CMO_SecPSP);
  596. powerpc_firmware_features |= FW_FEATURE_CMO;
  597. pSeries_coalesce_init();
  598. } else
  599. pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
  600. CMO_SecPSP);
  601. spin_unlock(&rtas_data_buf_lock);
  602. pr_debug(" <- fw_cmo_feature_init()\n");
  603. }
  604. /*
  605. * Early initialization. Relocation is on but do not reference unbolted pages
  606. */
  607. static void __init pSeries_init_early(void)
  608. {
  609. pr_debug(" -> pSeries_init_early()\n");
  610. #ifdef CONFIG_HVC_CONSOLE
  611. if (firmware_has_feature(FW_FEATURE_LPAR))
  612. hvc_vio_init_early();
  613. #endif
  614. if (firmware_has_feature(FW_FEATURE_XDABR))
  615. ppc_md.set_dabr = pseries_set_xdabr;
  616. else if (firmware_has_feature(FW_FEATURE_DABR))
  617. ppc_md.set_dabr = pseries_set_dabr;
  618. if (firmware_has_feature(FW_FEATURE_SET_MODE))
  619. ppc_md.set_dawr = pseries_set_dawr;
  620. pSeries_cmo_feature_init();
  621. iommu_init_early_pSeries();
  622. pr_debug(" <- pSeries_init_early()\n");
  623. }
  624. /**
  625. * pseries_power_off - tell firmware about how to power off the system.
  626. *
  627. * This function calls either the power-off rtas token in normal cases
  628. * or the ibm,power-off-ups token (if present & requested) in case of
  629. * a power failure. If power-off token is used, power on will only be
  630. * possible with power button press. If ibm,power-off-ups token is used
  631. * it will allow auto poweron after power is restored.
  632. */
  633. static void pseries_power_off(void)
  634. {
  635. int rc;
  636. int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
  637. if (rtas_flash_term_hook)
  638. rtas_flash_term_hook(SYS_POWER_OFF);
  639. if (rtas_poweron_auto == 0 ||
  640. rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
  641. rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
  642. printk(KERN_INFO "RTAS power-off returned %d\n", rc);
  643. } else {
  644. rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
  645. printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
  646. }
  647. for (;;);
  648. }
  649. /*
  650. * Called very early, MMU is off, device-tree isn't unflattened
  651. */
  652. static int __init pseries_probe_fw_features(unsigned long node,
  653. const char *uname, int depth,
  654. void *data)
  655. {
  656. const char *prop;
  657. int len;
  658. static int hypertas_found;
  659. static int vec5_found;
  660. if (depth != 1)
  661. return 0;
  662. if (!strcmp(uname, "rtas") || !strcmp(uname, "rtas@0")) {
  663. prop = of_get_flat_dt_prop(node, "ibm,hypertas-functions",
  664. &len);
  665. if (prop) {
  666. powerpc_firmware_features |= FW_FEATURE_LPAR;
  667. fw_hypertas_feature_init(prop, len);
  668. }
  669. hypertas_found = 1;
  670. }
  671. if (!strcmp(uname, "chosen")) {
  672. prop = of_get_flat_dt_prop(node, "ibm,architecture-vec-5",
  673. &len);
  674. if (prop)
  675. fw_vec5_feature_init(prop, len);
  676. vec5_found = 1;
  677. }
  678. return hypertas_found && vec5_found;
  679. }
  680. static int __init pSeries_probe(void)
  681. {
  682. unsigned long root = of_get_flat_dt_root();
  683. const char *dtype = of_get_flat_dt_prop(root, "device_type", NULL);
  684. if (dtype == NULL)
  685. return 0;
  686. if (strcmp(dtype, "chrp"))
  687. return 0;
  688. /* Cell blades firmware claims to be chrp while it's not. Until this
  689. * is fixed, we need to avoid those here.
  690. */
  691. if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") ||
  692. of_flat_dt_is_compatible(root, "IBM,CBEA"))
  693. return 0;
  694. pr_debug("pSeries detected, looking for LPAR capability...\n");
  695. /* Now try to figure out if we are running on LPAR */
  696. of_scan_flat_dt(pseries_probe_fw_features, NULL);
  697. #ifdef __LITTLE_ENDIAN__
  698. if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
  699. long rc;
  700. /*
  701. * Tell the hypervisor that we want our exceptions to
  702. * be taken in little endian mode. If this fails we don't
  703. * want to use BUG() because it will trigger an exception.
  704. */
  705. rc = pseries_little_endian_exceptions();
  706. if (rc) {
  707. ppc_md.progress("H_SET_MODE LE exception fail", 0);
  708. panic("Could not enable little endian exceptions");
  709. }
  710. }
  711. #endif
  712. if (firmware_has_feature(FW_FEATURE_LPAR))
  713. hpte_init_lpar();
  714. else
  715. hpte_init_native();
  716. pm_power_off = pseries_power_off;
  717. pr_debug("Machine is%s LPAR !\n",
  718. (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
  719. return 1;
  720. }
  721. static int pSeries_pci_probe_mode(struct pci_bus *bus)
  722. {
  723. if (firmware_has_feature(FW_FEATURE_LPAR))
  724. return PCI_PROBE_DEVTREE;
  725. return PCI_PROBE_NORMAL;
  726. }
  727. struct pci_controller_ops pseries_pci_controller_ops = {
  728. .probe_mode = pSeries_pci_probe_mode,
  729. };
  730. define_machine(pseries) {
  731. .name = "pSeries",
  732. .probe = pSeries_probe,
  733. .setup_arch = pSeries_setup_arch,
  734. .init_early = pSeries_init_early,
  735. .show_cpuinfo = pSeries_show_cpuinfo,
  736. .log_error = pSeries_log_error,
  737. .pcibios_fixup = pSeries_final_fixup,
  738. .restart = rtas_restart,
  739. .halt = rtas_halt,
  740. .panic = rtas_os_term,
  741. .get_boot_time = rtas_get_boot_time,
  742. .get_rtc_time = rtas_get_rtc_time,
  743. .set_rtc_time = rtas_set_rtc_time,
  744. .calibrate_decr = generic_calibrate_decr,
  745. .progress = rtas_progress,
  746. .system_reset_exception = pSeries_system_reset_exception,
  747. .machine_check_exception = pSeries_machine_check_exception,
  748. #ifdef CONFIG_KEXEC
  749. .machine_kexec = pSeries_machine_kexec,
  750. #endif
  751. #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
  752. .memory_block_size = pseries_memory_block_size,
  753. #endif
  754. };